Corrected s4 Lab Manual 20jan2015

BASIC ELECTRONICS LAB

SOE, DIVISION OF ELECTRONICS 1

DIVISION OF ELECTRONICS

SCHOOL OF ENGINEERING

CUSAT, KOCHI

BTECH 4th

SEMESTER

ELECTRONIC CIRCUITS LAB EXPERIMENTS



LIST OF EXPERIMENTS

1. RC coupled amplifier

a. RC coupled amplifier for max: swin.. 5

b. RC coupled amplifier on removing bypass capacitor.6

2. FET Amplifier .....8

3. Feedback amplifier circuits

a. Current series .... 11

b. Voltage shunt ..14

4. RC phase shift oscillator ....17

5. Wien bridge oscillator.....19

6. Multivibrators

a. Astable .... 21

b. Bistable ....... 27

c. Monostable...29

7. Switch and Sweep circuits

a. Transistor switching circuits 31

b. transistor sweep................................................34

c. bootstrap sweep.................................................36

8. Power amplifier..38

9. SPICE: Simulation of experiments listed above using SPICE



1. RC COUPLED AMPLIFIER

AIM:

Design and plot the frequency response of RC coupled amplifier with lower cutoff frequency

500Hz for

(i) A gain of 100

(ii) Maximum swing and a gain of 100

(iii) Without bypass capacitor

(iv) Gain of 30

CIRCUIT DIAGRAM:

(i) RC Coupled Amplifier With Bypass Capacitor, Of Gain 100:

DESIGN:

Gain of 100

Let Vcc = 12V

Ic = 2mA

= 100

VRE = 10% of Vcc =



Ic = 2mA

RE =

VR2 = (VRE + 0.7) = 1.2 + 0.7 = 1.9V

IB =

R2 =

VR1 = VCC VR2 = (12 1.9) = 10.1V

So, R1 =

To find RC:

Gain =

; re =

100 =

XCE = RE /10

fL (C1& C2) =

Let C1& C2 10F

EXPECTED WAVE FORM



a. RC COUPLED AMPLIFIER FOR Max: SWING

DESIGN: VRE = 10% of VCC

VCE = 50% of VCC

VRC = 40% of VCC

Gain =

VRC = 40% of VCC = 4.8V

RC = 4.8/2mA = 2.4K 2.7K

To find RL:

100 =

EXPECTED GRAPH



b. RC COUPLED AMPLIFIER ON REMOVING BYPASS CAPACITOR

CIRCUIT DIAGRAM

DESIGN:

Gain =

EXPECTED GRAPH



c. FOR A GAIN OF 30:

DESIGN:

Gain =

30 =

RE1 = 67

RE1 + RE2 = 680 [RE = 680] RE2 = 680 67 = 613

EXPECTED GRAPH

RESULTS



2. FET AMPLIFIER

AIM:

Design an FET amplifier with a gain of 12

CIRCUIT DIGRAM:

FET Amplifier with Bypass Capacitor:

DESIGN

IDss = 20mA; Vp = 8V

ID = IDss

ID= 3mA

3x10-3

=IDss

= 20x10-3

So, VGS = -4.9V



gMD =

=

gM =gMD

= 1.9 x 10-3

Gain required is 12.

AV = 12

AV = gMx rd

12 = (1.9 x 10-3

) rdrd = 6.3K

VDSmin = VP - |VGS| + 1

= 8 4.9 + 1

= 4.1V

IDRD = 18.9V

WITH BYPASS CAPACITOR WITHOUT BYPASS CAPACITOR

F Log f Vo F Log f Vo



EXPECTED WAVE FORM

RESULT



3. FEEDBACK AMPLIFIER

a. CURRENT SERIES

AIM:

Design, setup and plot the frequency response of a current series amplifier and find its band

width.

DESIGN:

LET

VCC = 12V, IC =2ma, = 200, VBE = 0.6 V, S = 5

VCE =50% OF VCC = 6V

VRC = 40% OF VCC = 4.8V

VRE = 10% OF VCC = 1.2V

RC = VRC/IC = 4.8/2X10-3

= 2.4K =2.2 K

RE= VRE/IE =4.8/2X10-3

= 560

S =(1+B) (1+RB/RE)

5 =201+ (1+RB/560)

VR2= VCC (R2/R1+R2)

1.2+0.6 = 1.8 K

1.8 = 12 (R2/R1+R2)

R2 = 650

R1 = 5.66X R2 = 3.6 K

XC = 1/2PI FC = RC/10 =

IF F = 50 MHZ

XC = 10 F



CIRCUIT DIAGRAM:

EXPECTED WAVEFORM:



F VO AV Log F

RESULT:



b. VOLTAGE SHUNT

AIM:

Design, set up and plot the frequency response of voltage shunt amplifier and also find the

band width

DESIGN:

LET

VCC = 12V, IC =2ma, = 200, VBE = 0.6, S = 5

VCE =50% OF VCC = 6V

VRC = 40% OF VCC = 4.8V

VRE = 10% OF VCC = 1.2V

RC = VRC/IC = 4.8/2X10-3

= 2.4K =2.2 K

RE= VRE/IE =4.8/2X10-3

= 560

S =(1+B) (1+RB/RE)

5 =201+ (1+RB/560)

RB = 546

RB = R1. R2/R1+R2

R1 = 5.66X R2

R2 = 650

CC = 10 F

XCE =1/ 2PIFC

CE = 47 MF

RF = 20 K



CIRCUIT DIAGRAM:

EXPECTED WAVEFORM:



F

VO

AV

log

F

RESULT:



4. RC PHASE SHIFT OSCILLATOR

AIM:

Design and setup an RC phase shift oscillator using BJT for 2 KHz.

DESIGN:

Let Vcc = 12V

Ic = 2mA

= 100

VRE = 10% Vcc = 1.2V

RE =

VRC = 40% Vcc = 4.8V

RC =

VR2 = VRE + 0.7 = 1.9V

IR2 = 9IB =

So, R2 =

VR1 = Vcc VR2 = 12 1.9 = 10.1V

So, R1 =

For n/w:

= 1.5K

So, R>1.5K

Let R = 10K / 6.8K

C = 2.99nF / 4.7nF



CIRCUIT DIAGRAM:

EXPECTED GRAPH

RESULT



5. WEIN BRIDGE OSCILLATOR

AIM:

Design and setup a Wein bridge oscillator for 2 KHz.

DESIGN:

Let Vcc = 12V

Ic = 2mA

= 100

A1. A2 = 3. Let A1 = 2

VC = 40% Vcc = 4.8V

VRE = 10% Vcc = 1.2V

Gain =

VR2 = 1.2 + 0.7 = 1.9V

IR2 = 9IB =

R1 =

For the second amplifier:

Gain required = 3/2

RC = 12K

RE2 = 1K pot

F = 1/2R1R2C1C2

Let C1 = C2 = 0.01F



CIRCUIT DIAGRAM:

EXPECTED GRAPH

RESULT



6. MULTIVIBRATORS

a. ASTABLE MULTIVIBRATOR

AIM:

Design and setup an AstableMultivibrator for:

(i) Symmetrical output with a time period T= 1ms

(ii) Asymmetrical output with duty cycle 70% ; T = 1ms

(iii) Perfect square

(iv) VCO

CIRCUIT DIAGRAM

Symmetrical output with T = 1ms



DESIGN:

(i) For symmetrical output with a time period T= 1ms

T1 = 0.693RB1C1

T2 = 0.693RB2C2 (T2 is the time for which Transistor T2 is off.)

Let Vcc = +12V

Ic = 2mA

= 100 - 400

RC1 = RC2 =

When T2 is ON,

RB1 =

RB1 = RB2 = 100K

T1 = T2 = 0.5ms [T1 + T2 = 1ms &Tt = T1 + T2]

Tt = 1.38RB1C1

C1 =

EXPECTED GRAPH



CIRCUIT DIAGRAM

(ii) Asymmetrical output with T = 1ms and duty cycle 70%

DESIGN:

0.3tON = 0.7tOFF

0.3T1 = 0.7T2

T1 + T2 = 1ms T2 = 0.3ms &T1 = 0.7ms

Let RC1 = RC2 = 5.6K

RB1 = RB2 = 100K

T1 = 0.639RB1C1

C1 =

C2 =



EXPECTED GRAPH

CIRCUIT DIAGRAM

(iii) Perfect square



EXPECTED GRAPH

CIRCUIT DIAGRAM

(iv) As VCO



EXPECTED GRAPH

VBB Frequency

If VBB is varied, the time period of output T changes in accordance with the equation

T = 2RCln (1 + VCC=VBB). With a fixed value of VCC,

it can be seen from the equation that the output frequency of the circuit is nonlinear

function of VBB

RESULT



b. BISTABLE MULTIVIBRATOR

AIM:

Design and setup a bistable multivibrator.

DESIGN

Bistable multivibrator

Let Vcc = 12V, ICsat = 2mA, = 100

VRE = 2V, VR2 = VRE + VBE = 2.8V

VR1 = Vcc VR2 [when T2 is OFF and T1 is ON]

= 12 2.8 = 9.2V

IR1 = 10IBsat

R1 = VR1/IR1 =

IR2 = 9IBsat

R2 =

CIRCUIT DIAGRAM:



EXPECTED GRAPH

RESULT:



c. MONOSTABLEMULTIVIBRATOR

AIM:

Design and setup a mono stable multivibrator.

DESIGN:

Let Vcc = 12V

Icsat = 2mA

= 100

Let VB1 = -2V

3R1 = 2.2R2

RC1 = RC2 =

IBsat = 5Ic/ = 0.1mA

IBsat = I1 I2

0.1mA =

Let I2 = 0.1mA

R2 =

So



CIRCUIT DIAGRAM:

EXPECTED GRAPH

RESULT:



7. SWITCH AND SWEEP CIRCUITS

a. TRANSISTOR SWITCHING CIRCUITS

AIM:

Design and setup normally ON and normally OFF switch using BJT.

DESIGN:

Normally ON:

Let Vcc = 12V

ICsat = 12mA

= 100

IBsat=

Vcc = VCE + ICRC

12 = 2 x 10-3

x RC + 0.2

RC = 11.8/ 2 x 10-3

= 5.6K

Vcc = IBRB + VBE

12 = 0.1 x 10-3

x RB + 0.8

RB = (12 0.8)/10-4

= 112K = 120K

Normally OFF:

Vcc = VCE + ICRC

12 = 2 x 10-3

x RC + 0.2

RC = 11.8/ 2 x 10-3

= 5.6K

RB =



CIRCUIT DIAGRAM:

Normally ON:

EXPECTED GRAPH



Normally OFF:

EXPECTED GRAPH

RESULT:



b. TRANSISTOR SWEEP CIRCUITS

AIM:

Design and setup a transistor sweep circuit.

DESIGN:

T/2 = RC.C

Let Vcc = 12V

ICsat = 2mA

= 100

IBsat = 5 x ICsat/ = 2 x 5/100 = 0.1mA

Vcc = VCE + ICRC

12 = 2 x 10-3

x RC + 0.2

RC = 11.8/ 2 x 10-3

= 5.6K

Vcc = IBRB + VBE

12 = 0.1 x 10-3

x RB + 0.8

RB = (12 0.8)/10-4

= 112K = 120K

For T = 2ms

C =

CIRCUIT DIAGRAM

Simple sweep circuit:



EXPECTED GRAPH

RESULT:



c. BOOTSTRAP SWEEP CIRCUIT

AIM:

Design and setup a bootstrapsweep circuit.

DESIGN

Let Vcc = 20V, VEE = -10V, = 100

ICsat = 2mA

CIRCUIT DIAGRAM

T = R1C1 , T = R1C1 = 1ms

C1 = 1ms/10K = 0.1f

RE = VCE/IE = VEE/ ISAT=4.2 K



EXPECTED GRAPH

RESULT:



8. POWER AMPLIFIERS

AIM:

To design and setup a power amplifier.

CIRCUIT DIAGRAM:

Class B Push Pull:

Class AB:

EXPECTED GRAPH:

Cross over distortion:



RESULT:

Documents

Corrected s4 Lab Manual 20jan2015