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Page 1: Converters Having AC Source Inductance Hiroshi Nomura

電気学会論文誌8  888

Paper

UDC 621.382.3:621.314.5:537.311.6

A New Method of Forced Commutation for Thyristor

Converters Having AC Source Inductance

By

Hiroshi Nomura Member

Kenichiro Fujiwara Member

Summary

The presence of the AC source inductance often makes the forced commutation scheme

difficult to apply to AC/DC and AC/AC thyristor converters. This paper proposes a novel

forced commutation method based on the voltage injection technique which handles the

inductive energy in the same manner as achieved with the line commutation. A comparative

analysis with the conventional capacitor-type commutation shows that the new method is

capable of commutating higher load current with less thyristor voltage, commutation time

and commutation power. A simple but effective pulse-width controlled AC/DC converter

with the new method is also presented with experimental results.

1. Introduction

With the demand of high power static converters, the forced commutation has frequently been con-sidered recently in AC / DC and AC / AC thyristor converters to improve the power factor and the wave-form of AC input current (1)-(13). The development of

high power gate-controlled thyristors (GTO, etc.) is also encouraging the use of the forced commutation scheme in AC systems.

However, there still exist several technical problems to be solved for the higher power applications, among which the next two are the most important.

(1) Even if the gate-controlled switches are used,the energy stored in AC source inductances (trans-former leakage inductance, etc.) must be handled

properly during the commutaion period. Absorb-ing the energy into the snubber circuit is a com-mon practice, but it usually lowers the efficiency or increases the thyristor voltage.

(2) Most circuits with commutating capacitors suffer from excessively high or low capacitor

voltage which depends greatly on the source in-

ductance, phase-control angle and load current,

resulting in an increased valve stress and/or an

unstable commutation.

Some ways of solving those problems have been

proposed°xps' These techniques can be adopted for

Hiroshi Nonura & Keniclairo Fujiuvra are with Kochi Technical College. Manuscript received Sept. 22, 1983.

本稿は

specific applications but they do not seem to be the fundamental solutions from the viewpoint of handling the source inductance energy.

This paper proposes a novel forced commutation method which settles the difficulties mentioned above. The principal underlying idea is to establish an artificial line commutation through voltage injection, commutating the current and recovering the inductive energy in the same manner as that with the usual line commutation. This basic technique was proposed and studied by Gilsing and Freris for the first time (1) using injection transformers in series with the AC lines, which did not appear to be sufficient for practical use.

In this paper, the authors generalize the basic idea as an excellent means of forced commutation by showing two types of practical commutation circuit, both of which possibly have a wide variety of applications. A comparative analysis with the conventional ca-

pacitor-type commutation is tried with regard to the commutation time, thyristor voltage and commutation

power. The results indicate that this new method is superior to the conventional one judging from almost every angle. A simple but effective pulse - width controlled AC/DC converter with the new method is also presented with some experimental results.

2. Basic Operation of New Commutation

Circuits

In order to clarify some important differences and

Section E (Trans. I. E. E. of Japan, Vol. 104, No. 7/8, July/Aug., p . 137; か らの転載で ある。

〈88〉 104巻12号

Page 2: Converters Having AC Source Inductance Hiroshi Nomura

889  交 流電 源 リア クタ ンス エネ ル ギ ー処理

characteristics of the new method, a typical com-

mutation process by the capacitor is to be considered

briefly.

2.1 Commutation by capacitor

Fig. 1 shows an example of a force-commutated

rectifier circuit. Typical current and voltage wave-

forms at commutation are shown in Fig. 2, where it is

assumed that the inductance 1o in the resonant circuit

is much smaller than the source inductance 1 and then,

10 does not affect the waveforms except in [Interval

I ]. It is also assumed throughout the discussions

below that the source voltages as well as the load

current Ia remain unchanged during the commutation

period.

The capacitor C has been left charged in the polari-

ty indicated in the figure to a voltage vc= V00 by the

previous commutation. The commutation from ThA

to Th8 is initiated by triggering ThF.

[Interval ‡T] : v0 reverses its polarity to v0= - Vco

resonantly.

[Interval ‡U] : Th.4 goes off as i Ti, is taken over by

i2 through C. v0 gives a reverse voltage across ThA

until it discharges to zero.

[Interval ‡V] : v0 rises linearly in the initial por-

ality up to v0=eA-e8. At this point The, the next

thyristor to conduct, is foward-biased.

[Interval ‡W] : iTh,, builds up overlapping on i2 as

energy transfer between source inductances takes

place. When iTba reaches Id,' i,=0 and the final

capacitor voltage should be Vco.

In this commutation process, [Intervals ‡T and ‡V]

are the inherent time-delays, and the reverse-bias time

in [Interval II] may become much longer than

needed, depending on the phase-control angle a and

the load current. Consequently, if this circuit were

operated as a pulse-width controlled rectifier, the

adjustable output range might be limited considerably.

Moreover, the capacitor is always charged higher than

the line to line source voltage by an amount raised by

the source inductance. Since the maximum capacitor

voltage determines the thyristor voltage rating, more

capacitance is needed to limit the voltage to an accept-

able value, resulting in a longer commutation time.

The presence of these contradictory conditions is one

of the biggest problems associated with the capacitor-

type commutation.

2.2 Commutation by voltage superimposition"

Fig. 3 shows one of the newly-devised commutation

circuits applied to the six-pulse bridge circuit. In this

circuit G represents a force-commutated switch which

can be composed either of a thyristor DC chopper

circuit or a gate-controlled device, and E60 is an

auxiliary DC source constructed by an isolation

transformer, a diode bridge and a smoothing capacitor

of electrolytic type. E, should be set higher than the

maximum line voltage En,, to assure successful com-

mutation over the entire range of a.

With ThA and Th' conducting, the commutation

from Th, to The follows the steps illustrated in Fig.

4.

[Interval ‡T] : Upon triggering SB, G and Th,

simultaneously, E01 is superimposed on e8, satisfying

the condition eB+Ec >eA. Therefore, iTrta (current

through ThA) begins to decrease, and at the same rate

isB (current through SB, G and Th+) increases in

accordance with the following expressions.

From these equations,

where

Fig. 1. A capacitor-type force-commutated

rectifier circuit.

Fig. 3. Commutation by voltage superimposition.

Fig. 2. Typical waveforms during commutation from Th, to Tha.

Fig. 4. Typical waveforms during commutation

from Th, to The.

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電気学会論文誌8  890

At t=tu this commutation overlap comes to an end.

Letting i Ti,.=0 in Eq. ( 3) , we have

[Interval ‡U] : Th., is reverse-biased by E,,, while

all of the load current Id is supplied through the

commutating circuit. This interval must be longer than

the turn-off time of ThA to let it recover the forward

blocking capability.

[Interval ‡V] : Then, the force-commutated switch

G is turned off with Th. having been supplied with a

gate pulse. The load current transfers instantaneously

to Tha from the commutating circuit, thus completing

the commutation. Commutations of other thyristors

are performed in a similar manner to the one ex-

plained by proper selection of the steering thyristors,

SA to Sb Th, and Th-.

With a commutation DC voltage superimposed on

the next coming phase voltage through a force-

commutated switch and some auxiliary thyristors,

an artificial line commutation is achieved and the com-

mutation process has a close resemblance to the usual

line commutation. This type of commutation is re-

ferred to as "commutation by voltage superimposition"

or "CVS" in this paper.

2.3 Commutation at output terminals

Another commutation circuit with special character-

istics comes from the same basic idea of handling the

inductive energy. A commutation circuit connected in

parallel with the load commutates the current from all

the thyristors temporarily. This action is particularly

useful where the free wheeling of the load current is

involved in the circuit operation as illustrated in the

later section.

Fig. 5 shows the circuit configulation, where G1 and

G2 are the gate-controlled switches and E.2 is set

higher than Em, just like in the previous commutation

circuit.

With Th, and The conducting, the commutation

from Th., to Th,, follows the steps illustrated in Fig.

6.

[Interval ‡T] : When both G1 and G2 are gated on,

the current is through G2, Ec2 and G1 starts to flow

overlapping on the current iA, since Ec2>eA-ec.

Equations similar to Eqs. (1) through (4) hold true

during-this interval except with E„ changed to E,2

as

By the end of this interval iA reduces to zero with all

the energy in both inductances being released to the

load.

[Interval ‡U] : EC2 now reverse-biases ThA and The

while it circulates the load current for an appropriate

time. During [Intervals ‡T and ‡U] the voltage across

the output terminals is raised to E42.

Fig. 5. Commutation at output terminals.

Fig. 6. Typical waveforms during commutation

from ThA to Th,.

[Interval ‡V] : G, and G2 are turned off simultane-

ously while Ths and also The have already been

supplied with gating pulses. At this moment the load

current is forced to circulate through D2, Ec2 and D,,

reversing the output terminal voltage to -Ec2. Since

Ec2>ec-es, another current overlap occurs, which

builds up the current iB (refer to Fig. 5) and decreases

the current through the diodes iD. Again this interval

can be described by using Eqs. (1) ^- (4) with E„

changed to E:2 as

The commutation process ends when is reaches id and io falls back to zero.

This type of commutation is referred to as "commu-tation at output terminals" or "COT" in this paper, as the commutation is achieved by voltage injection directly across the output terminals.

3. Comparative Analysis

3.1 Basic equations From the assumptions made in the previous section

for simplifying the analysis, and referring to Eqs. ( 1) -(7 ), one can easily derive the equations for each

circuit which are listed in Table 1. For the new commutation circuits, a net com-

mutating voltage E, is defined as a voltage difference between E, (auxiliary DC source) and the supply volt-ages involved in the commutation (refer to Eqs. ( 4 ), (6) and (7) ). E, contributes to the energy transfer of the source inductances and hence, it has direct influence upon the overlapping time to and so the commutation time tc. The higher the E,, the shorter the tu, but naturally a higher peak thyristor voltage

Err results in. E, must be selected higher than the maximum line voltage Em, so that E,>0 over 180'_--a 5360'. A convincing way of determining EC will be presented later in connection with the commutation

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891  交流電源リ ア クタンスエネルギー処理

Table 1. Basic equations.

power. The commutation time tc of the new circuits equals

to the "on" time of the force-commutated switch, a

part of which is used for the current overlap and the rest is available for reverse-biasing the main thyris-

tors. The t, can, therefore, be minimized to an opti-

mum length if the end of current overlap is detected.

In the capacitor-type commutation, to is determined

only by the circuit parameters independent of the

capacitor voltage and the source voltage, therefore,

the initial capacitor voltage Vco is shown in the table

instead of E,.

The peak thyristor voltage ETP is considered as the

maximum voltage which will possibly appear across a

main thyristor without snubber circuit operating over

the entire force commutation range of a.

The commutation power PP is either an average

reactive or a real power consumed by the capacitor or

the commutating DC source to accomplish commuta-

tions. CVS consumes only the real power, while in

COT some energy is fed back to Ec2 during the second

overlapping period.

3.2 Peak thyristor voltage and commutation time

With the specific numerical values shown in Fig. 7,

the commutation times (t,) in Table 1 are compared

with each other in terms of the same peak thyristor

voltage. Operations over 180°Sas360' are assumed.

It is also assumed that for CVS and COT, a minimum

reverse bias time of 50 Its is controlled constant irre-

spective of the load current and the phase-control

angle, and that the capacitor type keeps at least 50 ps

Fig. 7. Comparison of commutation times with

respect to peak thyristor voltage.

for reverse-biasing with a minimum capacitance used.

For a given peak thyristor voltage, Eq. (B) yields a

necessary capacitance C and then, t. is calculated

with this capacitance. The commutation time can be

reduced if a smaller capacitance is used at the expense

of an increased thyristor voltage, but the requirement

of the minimum reverse-bias time limits the operation

at a=180•‹ or 360•‹ where Vco takes a minimum value as

indicated in Fig. 7.

In CVS and COT, on the other hand, E., and E<2 are

determined first for a given peak thyristor voltage by

Eqs. (H) and (N) respectively and then tc, and tc2 are

calculated with these values. The commutation times

plotted in Fig. 7 are the maximum values which occur

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電気学会論文誌B  892

Fig. 9. Comparison of CVS and COT.

Fig. 8. Comparison of commutation powers with

respect to peak thyristor voltage.

at a=270' for CVS and at 330' for COT, where the net

commutating voltages E„ and E,2 are minimum

respectively.

Three vertical lines in Fig. 7 indicate the theoretical

minimum values of peak thyristor voltage for these

circuits. 2E., is the theoretical minimum for the

capacitor type, while the new methods allow less

voltages when Ec, and Ec2 are made equal to E.,

Fig. 7 clearly shows a typical advantage of the new

methods that a quicker commutation can be accom-

plished with lower voltage thyristors, and that this difference from the capacitor type becomes wider at

higher output power.

3.3 Commutation power

With the same numerical values in Fig. 7, Eqs. (F),

(L) and (R) are used to compute the maximum com-mutation power for each circuit and they are com-

pared for the same peak thyristor voltage in Fig. 8. In the new circuits, a part of the commutation power is

used for the current overlap and the rest for reverse-

biasing. Since the overlapping time decreases in the

high voltage region, most power consumed is due to

the reverse-biasing, hence the total power increases

linearly with the thyristor voltage.

It is evident that both CVS and COT require less

commutation power at reasonable thyristor voltages.

COT consumes much less average power because some

energy is fed back to E,2 during the latter part of the

commutation period.

3.4 Determining E,

Since the commutating DC source Ec used in the new

method affects the peak thyristor voltage, commuta-

tion time and commutation power respectively, the

design criteria for determining Ec must be changed

according to what is considered most important. The

phase-control angle range to be used is another factor to take into account. However, one useful way of

determining Ec, or Ec2 is to choose the one which

requires the least energy. From Fig. 7 and 8, it is seen

that Ec, or E.2 determined in such a manner gives a

commutation time which is close to its minimum with

an acceptable thyristor voltage.

3.5 CVS and COT

In Fig. 7 and Fig. 8, CVS and COT have been

compared with each other for the same peak thyristor

voltage. Under that condition, COT is much superior

to CVS in both the commutation time and the commu-

tation power.

In Fig. 9, CVS and COT are compared for the same

commutating voltage of Ec,=Ec2=1.63Emt. As for

the thyristor voltage, CVS imposes higher voltage on

thyristors at 300•‹•¬ a 5 360•‹, though it would be possible

to improve this if E,, were varied with a. As for the

commutation time, COT needs longer time because of

the successive double overlaps.

COT produces an output voltage with positive and

negative spikes, as have been seen in Fig. 6, which

may cause a little higher ripple current in the load.

It is also seen, from Fig. 6, that the input current

waveform of COT has a "notch" at every commutation

since all the thyristors are temporarily turned off in

[Interval ‡U]. These narrow notches slightly increases

5th and 11th harmonics in the line current.

Both CVS and COT usually have good and bad

points depending on the kind of converter circuit. Then

a careful examination should be made as to which

method is more preferable to the specific application.

Furthermore the combined use of CVS and COT, as

demonstrated in the next section, can sometimes give

a solution.

4. Application (a Pulse-Width Controlled

AC/DC Converter)

The pulse-width controlled AC/DC converters have

been proposed for the purpose of improving the power

factor and waveform of AC line current(s)-(10). The

new commutation methods (CVS and COT) find one of

the most suitable applications in this area because of

the following reasons.

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893  交流電源 リアクタンスエネルギー 処理

(1) In the multiple pulse-width controlled circuits,the power associated with the source inductances

may become large and, therefore, it should be

handled in some ways.

(2) The commutation time must be short toobtain a wide voltage control range.

(3) In the PWM operation, every forced commu-

tation is usually followed by a free-wheeling of

the load current, which allows COT a commuta-

tion as fast as the one with CVS (refer to t., in

Fig. 9). Moreover, a combined use of COT and

CVS simplifies the PWM circuit cosiderably.

4.1 Circuit and operation

Fig. 10 shows the proposed single-phase circuit

which is capable of rectifying and inverting operations

by PWM control. In case only the rectifying operation

is required, the circuit is still more simplified with S,

and S2 removed, Tit, and Tit, replaced by diodes and

the dotted line connected.

Fig. 11 shows the sequence of the gate pulses over a

cycle of the source voltage and associated voltage and

current waveforms when the circuit is in the rectifying

operation. A triangular voltage of frequency 14 times

the source frequency is used as a carrier wave e6 to

compare with a rectified sinusoidal voltage es which is

in phase with the source voltage.

A forced commutation is needed at the time t1 in

Fig. 11, for instance, where a powering mode (through

Th4 and Th,) must transfer to a free-wheeling mode

(Tb3, Th3). In order to commutate the current from

Th, to Tit,, Sz and G are triggered with Th4 kept

gated. It should be noted that E. has been connected across the output terminals and hence, this is the COT.

After having the current overlap between iTh, and i.2,

Fig. 10. Single-phase pulse-width controlled

AC/DC converter using new commu-

tation method.

Fig. 11. Control method and waveforms

(rectifying operation).

Fig. 12. Control method and waveforms

(inverting operation).

Ti1, is reverse-biased by E,-e(e>0) for more than

its turn-off time. The free-wheeling mode is provided

by gating Th3 on and turning G off. This commutation

process is the same as the basic one in Fig. 5 except

[Interval ‡V] is missing, therefore, the commutation

time is shorter. The commutation at t2 is the line

commutation.

Fig. 12 illustrates the inverting operation of the

same circuit. A forced-commutation is needed at t2 in

this case, where a free-wheeling mode (Ti2,, Tit,)

must be transfered to a powering mode (Th,, Th3 ).

S, and G are turned on to commutate the current from

Th, to Th3. It is noted that this commutation is the

CVS because E3 is superimposed on the source voltage,

obtaining a net commutating voltage of E3-e (e >0).

Th, goes off after the current overlap and when G is

turned off, with Th3 having a gate pulse, the load

current starts to flow through The, e and Th3, thus

completing the commutation. The commutation at t1

is provided by the source voltage.

Some outstanding features of this circuit are

(1) The circuit configulation is quite simple.

(2) No thyristor voltage exceeds E3 in both rectifying and inverting operations.

(3) Commutation time is short to have a wide

adjustable range of output voltage.

These merits result from the selective use of COT and

CVS.

The new commutation methods can be applied to

the three-phase PWM circuits in various manners,

having the same advantages mentioned abovepz'.

4.2 Experimental results

Fig. 13 shows the load characteristics of the single-

phase PWM circuit in Fig. 10, with the conitions shown in the figure. For the AC supply voltage e of

the commutating DC voltage of magni-

tude E3=180 V=1.27Emt, was selected to assure a

stable commutation at e=Emt. A power transistor

switch was used for G in Fig. 10 and its conduction

time Tc(=tu+t8)= t,)=700pswaskeptconstant. Thyris-

tors Th, and Th3 are of inverter use, while Tit, and

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電気学会論文誌B  894

Fig. 13. Load characteristics of Fig. 10.

(a) Output and thyristor voltage.

(b) Input current.

Fig. 14. Waveforms (rectifying, conditions

shown in Fig. 13).

Th4 can be of general use. An overall efficiency, including the commutation

circuit, of more than 90% was obtained. It is seen from the figure that at I,=10 A, about 15% of the maximum output power (at r=1) is injected from the commu-tation circuit. This is because the constant Tc was mostly used for reverse-biasing in this experiment. It is theoretically possible to reduce it to about 6% if & were determined optimally and the reverse-bias time were controlled constant (say 30 ps). The voltage and current waveforms when operating as a rectifier are shown in Fig. 14 (a ),( b ). It can be seen that no thyristor voltage exceeds E. and that no surge cur-rent and voltage is observed at commutation as is often the case with the capacitor-type commutation.

5. Conclusions

Looking for a means of settling the problems as-sociated with the forced commutation in AC systems, we have proposed two types of the commutation method (CVS and COT) based on the voltage in-

jection technique. Their basic characteristics when applied to the phase-controlled converter and the

pulse-width controlled converter were examined both theoretically and experimentally. As a result, it has been shown that the new commutation circuits are capable of stable operation at any value of a without the operational disadvantages usually associated with the capacitor-type commutations.

The use of a force-commutated switch as one of the commutating components, like in the proposed cir-cuits, does not seem to be much of a disadvantage considering the recent development of the gate-controlled thyristors of high power. The new method is applicable to any converters having AC source in-ductances. And it can be more advantageous than the capacitor-type from the economical point of view, considering the high-power converters with com-mutating capacitors often require a voltage clamp circuit and/or an additional capacitor-charging circuit and other improvements to reduce the commutation time. The pulse-width controlled AC/DC converter

presented in this paper is especially suitable for AC traction applications where the line inductance is large, and a good waveform and power factor of AC current are required.

It should also be pointed out that the converter circuits with the new method allow any abrupt change of the load current since the end of commutation is detected, not predicted. No consideration was given to the control method of the commutating voltage as well as the reverse-bias time, with which every commu-tation could be optimized. These are left to future studies.

The authors wish to thank Dr. R. G. Hoft, Professor of Electrical Engineering, University of Missouri, for his valuable suggestions during the preparation of this

paper.References

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(1978) (7) T. Gilsing & L. Freris : IEEE Trans. Pawer Apparatus Syst.,

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Electronics Conference Record, p. 1396

〈94〉  104巻12号