Computer Data Acquisition and Signal Conversion Chuck Kammin
ABE 425 March 27, 2006
Slide 2
Overview High Level DAQ System Description Quick Review of
Digital Fundamentals Digital to Analog Conversion Analog to Digital
Conversion
Slide 3
High Level System Description A data acquisition (DAQ) system
is a collection of add- on hardware and software components that
allow your computer to receive real- world information from
sensors. It consists of Sensors I/O terminal panel(s) DAQ board(s)
Software
Slide 4
Digital Fundamentals Binary Number System Bits and Bytes Binary
/ Decimal Conversion 2s compliment Logic Gates NOT, AND, NAND.
Digital Devices Decoder, Encoder
Slide 5
Bits and Bytes 8 Bits = 1 Byte For n bits, highest decimal
number = 2 n - 1
Decimal to Binary Conversion Fractions: Repeated Multiplication
by 2 Convert 0.3125 10 to binary: 0.3125 X 2 = 0.625 MSB = 0 0.625
X 2 = 1.25 =1 0.25 X 2 = 0.5 = 0 0.5 X 2= 1.0 LSB = 1 0.3125 10 =
0.0101 2
Slide 8
Binary to Decimal Conversion Sum of Weights Binary: 2 n 2 n -1
. 2 2 2 1 2 0. 2 -1 2 -2 .. Convert 1100.0101 2 to Decimal: (1 X 2
3) + (1 X 2 2 ) + (0 X 2 1 ) + (0 X 2 0 ) + (0 X 2 -1 ) + (1 X 2 -2
) + (0 X 2 -3 ) + (1 X 2 -4 ) = 1100.0101 2 = 12.3125 10
Slide 9
2s Compliment Flip 0s to 1 and 1s to 0 and add 1. Example: 2s
compliment of 00001001 is 11110110 + 1 = 11110111 Binary
subtraction can be performed via addition using the 2s compliment.
Example: 8 3 = 8 + (-3) = 5 00001000 + 11111101 (2s compliment of
-3) 1 00000101 carry over eliminated
Slide 10
NOT Gate (Inverter) Truth Table Input AOutput Q 01 10 AQ
Slide 11
AND Gate Truth Table Input AInput BOutput Q 000 010 100 111 A B
Q
Slide 12
NAND Gate Truth Table Input AInput BOutput Q 001 011 101 110 A
B Q
Slide 13
OR Gate Truth Table Input AInput BOutput Q 000 011 101 111 A B
Q
Slide 14
NOR Gate Truth Table Input AInput BOutput Q 001 010 100 110 A B
Q
Slide 15
EX-OR Gate Truth Table Input AInput BOutput Q 000 011 101 110 A
B Q
Slide 16
EX-NOR Gate Truth Table A B Q Input AInput BOutput Q 001 010
100 111
Slide 17
Decoder 3-to-8 Line Decoder y 0 = abc y 1 = abc y 2 = abc y 3 =
abc y 4 = abc y 5 = abc y 6 = abc y 7 = abc a b c Truth Table
Slide 18
Encoder y0y0 y1y1 y2y2 y3y3 y4y4 y5y5 y6y6 y7y7 8 to 3 Encoder
a b c Truth Table
Slide 19
Multiplexer 4-to-1 MUX I0I0 I1I1 I2I2 I3I3 AB Z ABI3ABI3 A B I
2 A B I 1 A B I 0 Z
Slide 20
Digital to Analog Conversion Converter Types Binary Weighted
Input R/2R Ladder Performance Characteristics Resolution Accuracy
Linearity Monotonicity Settling Time
Slide 21
D/A Binary Weighted Input
Slide 22
D/A R/2R Ladder Converter
Slide 23
D/A Performance Characteristics Resolution - reciprocal to
number of discrete steps in D/A output. For n bit output,
resolution = 1 / (2 n - 1). Accuracy - comparison of actual output
with expected output expressed as a percentage of full scale. Ideal
accuracy is at most 0.5 of LSB. For 8 bit converter LSB = 1/2 8 =
1/256 = 0.0039. Accuracy 0.2%
Slide 24
D/A Performance Characteristics Linearity - deviation from
ideal straight-line output of D/A converter. Special case is offset
error which is D/A converter output when input is all zeros.
Monotonicity - D/A converter is monotonic if it does not take any
reverse steps when it is sequenced over entire range of input
bits.
Slide 25
D/A Performance Characteristics Settling Time - the time it
takes D/A converter to settle within 1/2 LSB of its final value
when a change occurs in the input value.
Slide 26
Analog to Digital Conversion Converter Types Flash Stair Step
Ramp Tracking Single and Dual Slope Successive Approximation
Slide 27
A/D Flash Short Conversion Time N-bit output requires 2 N -1
comparators
Slide 28
A/D Flash
Slide 29
A/D Stair Step Ramp Slower than Flash A/D Converter Worst case
counter must sequence through max number of states before
conversion made. Conversion time dependant on analog voltage.
Slide 30
A/D Stair Step Ramp
Slide 31
A/D Tracking Counter tracks analog input voltage. Disadvantage
- counter oscillates between up and down state if input voltage
constant.
Slide 32
A/D Tracking
Slide 33
A/D Single Slope
Slide 34
Slide 35
A/D Dual Slope Counter Latches Analog Input Ramp generator
Comparator Clock Control Logic Binary Output Switch -V ref A1
A2
Slide 36
A/D Successive Approximation Most widely used A/D converter
Faster than other methods except for flash method Fixed conversion
time
Slide 37
A/D Successive Approximations
Slide 38
PBL 1 Digital to Analog Conversion Determine the resolution
expressed as a percentage, for each of the following D/A
converters: a) 3-bit b) 10-bit c) 18-bit
Slide 39
PBL 1 Answer a) 3-bit converter, 1/(2 3 -1) X 100 = 14.3% b)
10-bit converter, 1/(2 10 -1) X 100 = 0.098% c) 18-bit converter,
1/(2 18 -1) X 100 = 3.8E-4%
Slide 40
PBL 2 How many comparators are required for a 4-bit output
flash A/D converter?
