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Complementary CMOS Logic Style Construction (cont.)
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Example Gate: NAND
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Example Gate: NOR
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Example Gate: COMPLEX CMOS GATE
VDD
A
B
C
D
D
A
B C
OUT = D + A• (B+C)
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
4-input NAND Gate
Out
In1 In2 In3 In4
In3
In1
In2
In4
In1 In2 In3 In4
VDD
Out
GND
VDD
In1 In2 In3 In4
Vdd
GND
Out
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Properties of Complementary CMOS Gates
High noise margins:
VOH and VOL are at VDD and GND, respectively.
No static power consumption:
There never exists a direct path between VDD and
VSS (GND) in steady-state mode.
Comparable rise and fall times:
(under the appropriate scaling conditions)
Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
Complex Gate Structures
A
C
B
A
B C
Vdd
Gnd
Out
Out = A+(B*C) ...
ABC
And-Or-Invert (AOI)
How to add terms?
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
OAI/AOI Duality
A
C
B
A
B C
Vdd
Gnd
Out
Out = A*(B+C) ...
ABC
Or-And-Invert (OAI)
Out = A+(B*C) ...
Switch from:
To:
Demorgan’s Law in Action
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
Demorgan’s Law in Action
Out = A*(B+C) ...
ABC
Or-And-Invert (OAI)
A
C
B
A
B C
Vdd
Gnd
Out
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
Demorgan’s Law in Action
Out = A*(B+C) ...
ABC
Or-And-Invert (OAI)
A
C
B
A
BC
Vdd
Gnd
Out
What is the Magic command to do this?
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
Step by Step Layout of XNOR Gate
– The equation for XNOR is: f = (a * b) + (a' * b')
– using DeMorgan's law on each of the two terms gives: f = (a'+ b')' + (a + b)'
– using DeMorgan's law on the two terms together gives: f = ((a'+ b') * (a + b))'
– This could be directly implemented with a single complementary CMOS gate: the equation is in a simple negated product of sums form. This form can be implemented with the standard Or-And-Invert (OAI) style gate.
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
Non-Inverted Inputs
– However, using DeMorgan's law one more time on the left term gives: f = ((a * b)' * (a + b))’
– This form uses no inverted inputs and can be implemented with two gates a NAND gate and an OAI gate.
ab f
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
Now lets lay it out
Start with Vdd! and GND! power buses. Without any more information, about the
use of this cell, make the power and ground lines in metal 1
sized 3 and 3 apart. Use poly as inputs A B and guess that
C might be used.
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
Step by Step
Now put in a stripe of N diffusion (green) creating a series of 2 n-channel transistors for the pull down structure for the first NAND gate.
Also put in a stripe of P diffusion (brown) and center connection to Vdd to plan for a parallel connection for the pull up structure for the NAND gate.
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
By step
Now finish wiring up the NAND gate. Strap the two ends of the pull-up
parallel transistors and tie them to the series pull down.
Use the polly line, C to tie them together.
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
Or Gate
Begin to add the OR structure for the OAI gate above the NAND gate transistors.
This allows us to share the poly lines for A and B inputs.
Since we are building an OR structure, its series in the pull up and parallel in the pull down.
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
1-Bit Full Adder
Sum = A xor B xor C Cout = AB + AC + BC
expand sum
Sum = ABC+AB’C’+A’BC’+A’B’C
(exactly 1 or 3 inputs true)
use Cout to help generate Sum Sum = ABC + Cout’(A+B+Cin)
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
Full Adder (4 gates)
Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction
Full Adder (4 gates)
