COLAB_Lect1

8/8/2019 COLAB_Lect1

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DrNoor Mahammad Sk

6August2010 1DrNoorMahammadSk


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Outline

8086Architecture

InstructionSet

AssemblyLanguageProgramming Pro rammin Assi nments

8086Interfacing

InterfacingHardwaredesignsanditsprogramming

MicrocomputerSystemDesign

Givenspecifications

Applications

6Au ust2010 2DrNoorMahammadSk


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8086MicroprocessorTwoparts

BusInterfaceUnit BIU

Hardwarefunctions

GenerationofthememoryandI/Oaddressesforthe

transferofdatabetweentheoutsideworldandviceversa

ExecutionUnit(EU) ReceivestheprograminstructioncodesanddatafromBIU

Executestheseinstructions,andstorestheresultsinthe

. BypassingthedatabacktoBIU,datacanalsobestoredin

amemorylocationorwrittentoanoutputdevice.



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InternalBlockDiagramof8086Addressbus Databus

I

nArithmetic

Address generation

and bus control

6 5 4 3 2 1

t

e

r

n

LogicUnitFlags

a

l

D

AH AL

BH BL

GeneralPurposeRegistersAX

BX

CS

ES

SS

a

t

a

CH CL

DH DL

BP

CX

DX

DS

Instruction Pointer

B

u

s

SI

SP

BusInterfaceUnit(BIU)Execution

Unit

(EU)



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FetchandExecution

(IP)ontotheaddressbus,causingtheselectedbyteorwordto

bereadintotheBIU.

Register

IP

is

incremented

by

1

to

prepare

for

the

next

instructionfetch

, u u u .

Thisfirstin,firstoutstorageregistersometimeslikenedtoa

pipeline

Assumingthequeueisinitiallyempty.TheEUimmediately

drawsthisinstructionfromthequeueandbeginsexecution

e sexecu ng s ns ruc on, e procee s ofetchanewinstruction.

De endin ontheexecutionofthefirstinstruction theBIU

mayfillthequeuewithseveralnewinstructionsbeforetheEU

isreadytodrawitsnextinstruction6Au ust2010 5DrNoorMahammadSk


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ProgrammingModelAH ALAX Accumulator

CH CLDH DL

CXDX

CountData

FlagsH FlagsL

ControlFlags

SP StackPointer ExtraSe mentBP

SI

DI

BasePointer

SourceIndex

DestinationIndex

CS CodeSegment

DS DataSegment

IP InstructionPointer



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FlagRegisterBit

Position

Name Function

0 CF Setonhighorderbitcarryorbarrow;clearedotherwise

4 AF Setoncarryfromorborrow totheloworder4bitsofAL;clearedotherwise

6 ZF Setifresult iszero;clearedotherwise

7 SF Setequaltohighorderbitofresult(0ispositive, 1ifnegative)

8 TF Onceset, asinglestepinterruptoccursafterthenextinstructionexecutes;TFisclearedby

thesinglestepinterrupt

9 IF W enset,

mas a e interrupts

wi

cause

t e

CPU

to

trans er

contro

to

an

interrupt

vector

specifiedlocation

10 DF Causesstringinstructionstoautodecrementtheappropriateindexregister whenset;

clearingDFcausesautoincrement

11 OF Setifthesignedresultcannotbeexpressedwithinthenumberofbitsinthedestination

operand;clearedotherwise



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SegmentedMemory8086microprocessorhas20bitaddresslines

220 Addresslocationscanbeaccessed

Eachmemorylocationstore1byte(8bits)ofinformationIthas16bitdatalines

Twomemorylocationshold1wordofinformation

Itmeansitwillhavelowerbyteandhigherbyte Alllowerbytescanbestoredinevenlocations

CalledEVENbank

e g er y escan es ore neven oca ons CalledODDBank



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MemoryBanksByte 1048574

Byte 1048575Word 524287

EvenBank OddBank1048574 1048574

Byte 7Word

68

79

Byte 4

Byte 5

Read 1

eastartingat an oddaddress

Byte 4

Byte 5Word 2

0

2

4

1

3

5

Byte 1

Byte 2

Byte 3Word 1

16 bit data word to 8086

If a 16 bit word begins at an oddaddress, the 8086 will require

two memory read or write cycles

Byte 0



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MemoryMapRAM 00000Hto3FFFFH

ROM FF000HtoFFFFFH

Reserved FFFFBHtoFFFFFH S stemInterru tsandresetfunction

Dedicated FFFF0HtoFFFFAH

OSCalls



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SegmentRegisters1MBmemoryspaceof8086definesfour64KB

memoryblocks

CodeSegment Holdsprograminstructioncodes

DataSegment

Stores

data

for

program ac egmen

Storeinterruptandsubroutinereturnaddresses

Extradatasegment(oftenusedforshareddata)

stackallhavetosharethesamememory.



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SegmentedMemoryData Segment

FFFFFH

EFFFFH

E000

DataSegment

E0000H

C3FEFHCodeSegment

o e egmen

B3FF0H

StackSegment

6D26FHStack

Segment 6288FH

5D27

ExtraSegment

5 270 Segment

52B90H

00000H



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DrNoor Mahamamd Sk

6August2010 13DrNoorMahammadSk


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DataTransferInstructionsMOV Destination, Source ExampleMOV Register, Register MOV AX,BX; (AX BX)

MOV AH,BL (AH BL)

MOV Memory, Register MOV MEMWDS,BX ;[1000H]BL;[1001H]BH

MOV

MEMBDS,BL

;[1002H]BL

MOV Register, Memory MOV AX,MEMWDS ;AL [1000H];AH [1001H]MOV AL,MEMBDS ;AL [1002H]

MOV Memory, ImmediateData MOV MEMWDS,1234H ;[1000H] 34H;[1001H]12HMOV MEMBDS,56H ;[1002H] 56H

MOV Register, ImmediateDataMOV BL,18H ;BL 18H

MOV CX,5678H ;CL 78H, CH 56H

MOV AX/AL, Memory MOV AL,28H ;AL 28HMOV AX,5678H ;AL 78H, AH 56H

MOV Memory, AX/AL MOV MEMWDS,AX ;[1000H]AL;[1001H]AHMOV MEMBDS AL 1002H AL

MOV SegRegister, Memory16MOV ES,MEMWDS ;ES [1001H:1000H]

MOV SegRegister , Register16MOV DS, AX ;DS AX

emory16, eg eg s er ,

MOV Register16

, SegRegister MOV DX,ES ;DX ES



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DataTransferInstructionsXCHG Operand1 Operand2 ExampleXCHG Register, Memory XCHGBX, [SI] ;BL [SI]; BH [SI+1]

XCHG AX,BX ;AX BX,XCHG AL,BH ;AL BH

XCHG Memory Register XCHG[SI],DX ;[SI] DL; [SI+1] DH

IN Accumulator, Port IN AL, 26H ;AL port26HIN AX, 26H ;AL port26H; AH port27H

OUT Port Accumulator OUT 26H, AL ;port26H ALOUT 26H, AX ;port26H AL;port27H AH

LEA Destination Source LEA BX,MEMBDS ;BL 00H;BH 10H`;Effectiveaddressofthesourceoperandistransferredtothe

destinationoperand

XLAT NoOperands AL [BX+AL] ; ReplacethebyteinALwithabytefromthe256bytetablebeginningat[BX]; UseALasanoffsetintothis

table

LAHF NoO erands AH Fla s ;Co thelower orderfla b teintoAH

SAHF NoOperands FlagsL AH ;CopyAHintotheloworderflagbyte



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LogicalInstructionsOpcode Destination, Source ExampleNOT Register NOT BX ; BX ~BX

NOT [SI] ;[SI] ~[SI]

AND Destination SourceOR Destination Source

XOR Destination Source

TEST Destination Source TESTCX,DX ;Performs abitbybitANDofthesourceanddestinationbyteorwordoperands;

TheoperandsremainsunchangedAllflagsgetupdatedexceptAF

Usage:

AND Register Register AND CX,DX

AND Memory Register AND [SI},AX

AND Register Memory AND AX, [SI]

AND BX,8000H

AND Memory Immediate Data AND [SI], FF00H



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ShiftandRotateInstructionsOpcode Destination, Count Example

SHL Register 1 Logical LeftShiftby1

SHL Register Immediate Logical LeftShiftby thevalueofImmediateSHL Memory Immediate Logical LeftShiftby thevalueofImmediate

SHL Register CL Logical LeftShiftby thecontentofCLregister

SHL Memory CL Logical LeftShiftby thecontentofCLregister

SAL Destination, Count Arithmetic LeftShift leavingSignBit

SAR Destination, Count Arithmetic RightShift leavingSignBit

SHR Destination, Count LogicalRightShift

,

RCR Destination, Count Rotatethrough CarryRight

ROL Destination, Count RotateLeft

ROR Destination, Count RotateRight



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ShiftandRotateInstructionsDATA

Bit0Bit7/15

CF 0 LogicalLeftShift SHL

Bit0Bit7/15Lo icalRi htShift SHR

DATA CF ArithmeticRightShift

SF DATACFSAL

0



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RotateInstructionsCF DATA

RCL

RotateThroughCarryLeft

RCR

CF DATAROLRotateLeft

CFDATARORRotateRight



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ArithmeticInstructionsOpcode Destination, Source Expression

ADD Dest Src Dest =Dest +Src

=

SUB Dest Src Dest =Dest SrcSBB Dest Src Dest =Dest Src C

CMP Dest Src Dest Src (andsetflags);OperandsRemainedUnchanged

INC Dest Dest =Dest +1DEC Dest Dest =Dest 1

NEG Dest Dest = Dest ;(2scomplement ofDest)

MUL Src [DX][AX] [AX] *[Dest]

[AX] [AL]*[Dest]

IMUL Src [DX][AX] [AX] *[Dest]

[AX] [AL]*[Dest]

Signed Multiplication


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