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1 Code Generation Tools Tips & Tricks For ARM CGT v4.4.x April 2008

Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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Page 1: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

1

Code Generation Tools Tips & TricksFor ARM CGT v4.4.x

April 2008

Page 2: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

2

Agenda

• ARM Processors & Compiler Switches• Transition to EABI

– Preliminaries– Conditional Linking– How Sections Change– C Callable Assembly

• Compressed Auto-Initialization• Recommended Build Options• GCC Extensions• New RTS Library

Page 3: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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ARM Processors Overview

Processor Arch Ver Switch -mt Neon VFP BE8

ARM7 ARMv4T -mv4 Thumb N N --be8

ARM9 ARMv5TE -mv5e Thumb N Y --be8

ARM11 ARMv6 -mv6 Thumb N Y Default

Cortex-A8 ARMv7A -mv7A8 Thumb2 Y Y Default

Cortex-R4 ARMv7R -mv7R4 Thumb2 N Y Default

Cortex-M3 ARMv7M -mv7M3 Nothing N N Default

• Details on next slide

Page 4: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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ARM Processors Overview

• Processor: Common name for the processor• Arch Ver: Version of the architecture

– Early non-TI ARM9 devices use ARMv4T• Switch: Compiler switch to use• -mt: What does –mt mean?

– Has no effect for Cortex-M3 always Thumb2• Neon: Is Neon SIMD supported?

– Enable with --neon• VFP: Is Vector Floating Point supported?

– Enable with --float_support=vfp_option– Must use EABI

• BE8: How to enable BE8 byte ordering– --be8: code is little endian, data is big endian– --be32: code and data is big endian– Linker build switch cl470 … -z --be8 …

Page 5: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

5

Agenda

• ARM Processors & Compiler Switches• Transition to EABI

– Preliminaries– Conditional Linking– How Sections Change– C Callable Assembly

• Compressed Auto-Initialization• Recommended Build Options• GCC Extensions• New RTS Library

Page 6: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

6

EABI Preliminaries

• EABI includes– New object file format: ELF– Changes in runtime environment conventions

• Cannot link COFF and ELF together– Libraries from external vendors must be converted first– All other code must be recompiled

• Build option cl470 --abi=eabi– Default ABI remains TI_ARM9_ABI

• RTS lib must be EABI enabled– Chosen automatically when linking C/C++ code– Will include “eabi” in the name, e.g. rtsv5_T_be_eabi.lib

• Downstream utilities must understand ELF– cg_xml package provides roadmap

Page 7: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

7

Agenda

• ARM Processors & Compiler Switches• Transition to EABI

– Preliminaries– Conditional Linking– How Sections Change– C Callable Assembly

• Compressed Auto-Initialization• Recommended Build Options• GCC Extensions• New RTS Library

Page 8: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

8

Conditional Linking Differences

• Conditional linking enabled for all input sections– COFF: Only sections marked .clink are so affected

• Section must be symbolically referenced through path starting at entry point, else it is ignored

• Disable: --unused_section_elimination=off• Use --retain on section that defines interrupt

vectors• To force a connection in assembly code

– .symdepend child section, parent section– .symdepend “mysect”, “.text” means .text uses mysect

even though there is no symbolic reference• Unusual cases that may require --retain

– Sections created entirely in LCF (link command file)– Sections where only symbol definitions are in LCF

Page 9: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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Reference Graphname

file Input section “name” from “file”.obj

“parent” section makes a reference to a “sym” definedin the “child” section

sym

.textboot

.textmain

.bssmain

.textuser

.datauser

main var1

var2

func_call etc …

• Initial symbol is entry point• For C code, this is _c_int00 defined in boot.obj

from the RTS library• A section must be in this graph to be included by

default

Page 10: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

10

Agenda

• ARM Processors & Compiler Switches• Transition to EABI

– Preliminaries– Conditional Linking– How Sections Change– C Callable Assembly

• Compressed Auto-Initialization• Recommended Build Options• GCC Extensions• New RTS Library

Page 11: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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How Sections Change

Name COFF ELF

.text Code Same

.bss All RW Global Data Uninit’d RW Global Data

.data Not used by compiler Init’d RW Global Data

.const RO Global Data Same

.cinit Data init tables Similar, but compressed

.sysmem Heap Same

.stack Stack Same

.debug_* Dwarf Debug Info Same

• RW = Read or Write RO = Read only• Uninit’d = Uninitialized Init’d = Initialized• Ignores sections used only by C++ code• Heap or stack may be managed by an OS

Page 12: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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New ELF Sections

Name Contains.ARM.attributes Build attribute information.symtab Symbol table.strtab String table.shstrtab Section name string table(NULL) Empty

• None of these sections are loaded in memory• In COFF, similar functionality is provided in a

different, less flexible, manner• Most users can safely ignore these sections• C++ code adds more sections not shown• Do not need to add to link command file

Page 13: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

13

Agenda

• ARM Processors & Compiler Switches• Transition to EABI

– Preliminaries– Conditional Linking– How Sections Change– C Callable Assembly

• Compressed Auto-Initialization• Recommended Build Options• GCC Extensions• New RTS Library

Page 14: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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C Callable Assembly

• No leading ‘_’ or ‘$’ on C variables– Always var. No longer _var or $var.

• SP must be maintained as 8-byte aligned– Type long long requires 8-byte alignment

• Register conventions see few changes– Sign extension details are different– long long args passed in specific register pairs

• Structs passed/returned differently• Bit fields are laid out differently

– Do you use bit fields to model HW registers?• Array alignment is different

– More relaxed under EABI

Page 15: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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Manage ABI Differences;*******************************************************************; Note old tools do not have built-in ABI symbols.; Must NOT use the default ARM9ABI of tools 4.1.X or higher.;*******************************************************************

.if $$isdefed("__TI_ARM9ABI_ASSEMBLER").if __TI_ARM9ABI_ASSEMBLER

.emsg "Must build with --abi=[tiabi|eabi]".endif

.endif

;*******************************************************************; Define your own variables for which ABI is being used.;*******************************************************************

.if $$isdefed("__TI_EABI_ASSEMBLER") ; Use predefined symEABI .set __TI_EABI_ASSEMBLER ; if it exists

.else ; otherwiseEABI .set 0 ; not using EABI

.endif

.if EABI ; TIABI is oppositeTIABI .set 0 ; of EABI

.elseTIABI .set 1

.endif

;*******************************************************************; Note old tools do not have built-in ABI symbols.; Must NOT use the default ARM9ABI of tools 4.1.X or higher.;*******************************************************************

.if $$isdefed("__TI_ARM9ABI_ASSEMBLER").if __TI_ARM9ABI_ASSEMBLER

.emsg "Must build with --abi=[tiabi|eabi]".endif

.endif

;*******************************************************************; Define your own variables for which ABI is being used.;*******************************************************************

.if $$isdefed("__TI_EABI_ASSEMBLER") ; Use predefined symEABI .set __TI_EABI_ASSEMBLER ; if it exists

.else ; otherwiseEABI .set 0 ; not using EABI

.endif

.if EABI ; TIABI is oppositeTIABI .set 0 ; of EABI

.elseTIABI .set 1

.endif

Page 16: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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Manage Symbols Between ABI’s.if EABI.asg global_data, _global_data.asg func_name, _func_name….endif

.if EABI

.asg global_data, _global_data

.asg func_name, _func_name….endif

• Good for changing over existing code• Every instance of _func_name is replaced by func_name

• Like C’s #define _func_name func_name

Page 17: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

17

Agenda

• ARM Processors & Compiler Switches• Transition to EABI

– Preliminaries– Conditional Linking– How Sections Change– C Callable Assembly

• Compressed Auto-Initialization• Recommended Build Options• GCC Extensions• New RTS Library

Page 18: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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COFF –c ROM Init Model

burn ROM

.out file

.cinit .cinit ROM

.bss RAM

boot code

Memory

Page 19: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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COFF –cr RAM Init Model

Loader

.out file

.cinit

.bss RAM

Memory

Page 20: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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EABI -cr Initialization

loader

.out file

.data .data RAM

Memory

• .data handled like any other initialized section• Cannot be burned in ROM must be writable

Page 21: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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EABI –c Compressed ROM Init Model

.out file

compressed.cinit .cinit ROM

.data RAM

boot code

Memory

burn ROMELF linker.data

f1.obj

.data

f2.obj

.data

f3.obj• No .cinit in .obj files• Linker creates .cinit by compressing

.data sections• .data becomes uninit’d section like .bss

Page 22: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

22

Agenda

• ARM Processors & Compiler Switches• Transition to EABI

– Preliminaries– Conditional Linking– How Sections Change– C Callable Assembly

• Compressed Auto-Initialization• Recommended Build Options• GCC Extensions• New RTS Library

Page 23: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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Recommended Build Options

• For fastest speed– When code size does not matter– -o3 –mf5 –oi200 -mvtarget

• Cortex Thumb2– Small code size– Fast speed, though not always the fastest– -mt -o3 –mf –oi200 –mvtarget

– This recommendation subject to change• For smallest code size

– -mt -o3 –mf0 –oi0 –mvtarget

Page 24: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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Recommended Build Options

• -o3– Highest of 5 levels of optimization– None, -o0, -o1, -o2, -o3

• -mfn– Control trade-off between speed and space

• -oin– Automatic function inlining threshold– Functions under size n are automatically inlined– See size of a function

• Build with –o3 –on2• Inspect .nfo file

– -oi0 disables automatic inlining

• -mt– Use Thumb instructions– Means Thumb2 for Cortex

Page 25: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

25

Agenda

• ARM Processors & Compiler Switches• Transition to EABI

– Preliminaries– Conditional Linking– How Sections Change– C Callable Assembly

• Compressed Auto-Initialization• Recommended Build Options• GCC Extensions• New RTS Library

Page 26: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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GCC Extensions

• GCC defines several extensions to ANSI C (link)• v4.4 Compiler supports most of them

– Must use option --gcc– Details in Compiler User’s Guide

• Typical use case: existing code uses extensions• Example: Case Ranges

switch (val) {case 1 ... 5 : statements; // must have spaces around “...”case ‘A’ ... ‘Z’ : statements;

}

switch (val) {case 1 ... 5 : statements; // must have spaces around “...”case ‘A’ ... ‘Z’ : statements;

}

• Example: Deprecate Variablesextern int old_var __attribute__ ((deprecated)); // from header fileint old_var; // declare itint try() { return old_var; } // use it ==> get warning

extern int old_var __attribute__ ((deprecated)); // from header fileint old_var; // declare itint try() { return old_var; } // use it ==> get warning

• Many more …

Page 27: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

27

Agenda

• ARM Processors & Compiler Switches• Transition to EABI

– Preliminaries– Conditional Linking– How Sections Change– C Callable Assembly

• Compressed Auto-Initialization• Recommended Build Options• GCC Extensions• New RTS Library

Page 28: Code Generation Tools Tips & Tricksprocessors.wiki.ti.com/images/b/ba/Cgtips_arm44.pdf · For ARM CGT v4.4.x April 2008. 2 Agenda • ... ARM Processors Overview Processor Arch Ver

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New RTS Library

• Previous lib remains the default• Comes from Dinkumware Ltd (link)• Big win for C++ users• Less so for C users• New C features include

– locale.h• Example: Format numbers based on local conventions

– time.h is more complete– printf

• Supports more %something formats• Uses locale.h settings• Thus it is bigger and slower vs older lib

• Library organization different in next release– Matters if you link with lib_name.a today