1CMS Latency Review, 13th March 2007 CSC Trigger

Latency and Synchronization update

2CMS Latency Review, 13th March 2007 CSC Trigger

Latency: Sources of numbers

1. previous numbers were measured! Components individually measured/understood by

responsibles*except the CSC-->DT part. UCLA RICE Florida

System measured as a whole during 2003 testbeam System partially re-measured 2005 at slice-test System partially re-measured 2006 at MTCC & overall

validation vs DT arrival time @ GMT understood.

2. The new numbers presented today reflect well-understood “deltas” from previous estimates

3CMS Latency Review, 13th March 2007 CSC Trigger

(Previous) Chamber + Peripheral Crate

Chamber, CFEB, AFEB, ALCT

MPC

TMB/CLCT

Chamber; TOF, AFEB, CFEB, ALCT

10bx

Cables (8-14.5m)incl mux

/demux

4bx

14bx muon to peripheral crate

TMB/CLCT 19bx

Backplane incl

(de)mux

2bx

MPC 5bx

Optical fibers (94m)2m coil+2m spare

19 bx

45bx peripheral crate to track-finder

14.5m cable

94m optical fibers

SP

11m cables to GMT

MS

SP (using BXA) 13bx

Backplane incl GTLP conversion 0.5bx

MS 6bx

11m Cables to GMT 2 bx

SP+cables(9m)+transition card to DT-TF

8 bx

21.5 bx track-finder crate to GMT

8bx track-finder crate to DT-TF

Cathode/Anode Front End Board

Cathode/Anode LCT finders

Trigger Mother Board

Muon Port Card

Sector Processor

Muon Sorter

4CMS Latency Review, 13th March 2007 CSC Trigger

(previous) ..add it up:

Chamber --> Peripheral Crate 14 bx

Peripheral Crate--> Track-finder

45 bx

Track-finder --> GMT 21.5 bx

Total Chamber-->GMT 80.5 bx +/- 1

Total Chamber-->DT-TF 67 bx +/-1Critical path

5CMS Latency Review, 13th March 2007 CSC Trigger

CSC DTTF Critical Path This path is too slow:

CSC primitives a bit slower than TDR estimate DTTF a bit slower than TDR estimate CSC primitives arrive at DTTF at 67 bx (this path not broken out in the TDR)

Revised estimate using TMB2005 firmware 64.2 bx CSC primitives arrive at DTTF

New estimate using TMB2007 firmware 62.2 bx CSC primitives arrive at DTTF

6CMS Latency Review, 13th March 2007 CSC Trigger

(TMB2005) Chamber + Peripheral Crate

Chamber, CFEB, AFEB, ALCT

MPC

TMB/CLCT

Chamber; TOF, AFEB, CFEB, ALCT

12bx

Cables (8-14.5m)incl mux

/demux

3.2bx

15.2bx muon to peripheral crate

TMB/CLCT 16bx

Backplane incl

(de)mux

1bx

MPC 5bx

Optical fibers (94m)2m coil+2m spare

19 bx

41bx peripheral crate to track-finder

14.5m cable

94m optical fibers

SP

11m cables to GMT

MS

SP (using BXA) 13bx

Backplane incl GTLP conversion 0.5bx

MS 6bx

11m Cables to GMT 2 bx

SP+cables(9m)+transition card to DT-TF

8 bx

21.5 bx track-finder crate to GMT

8bx track-finder crate to DT-TF

Cathode/Anode Front End Board

Cathode/Anode LCT finders

Trigger Mother Board

Muon Port Card

Sector Processor

Muon Sorter

7CMS Latency Review, 13th March 2007 CSC Trigger

Revised estimate using TMB2005 firmware

CSCDTTF total 6764.2 bx, difference is -2.8 bx Front-end is +1.2 bx:

-0.8bx because critical path is actually ME4/1, not ME1/1 (longer optical fibers to SP), Skewclear are shorter.

+1.0bx maximum drift delay 3 bx, not 2bx. +1.0bx because comparator delay to peak of CFEB amplifier

output better set at 3 bx, not 2 bx. TMB processing is -3 bx:

previously waited for ALCT before CLCT started “pretrigger” stage (configuration mistake, i.e. “pilot error”)

19 bx 16 bx (TDR was 15.5) TMBMPC is -1 bx:

previously overestimated backplane propagation as 2 bx

8CMS Latency Review, 13th March 2007 CSC Trigger

New estimate using TMB2007 firmware CSCDTTF total 6762.2 bx, difference is -4.8 bx TMB processing 1614 bx:

-1.0 bx in CLCT processing I/O synchronization: input from CFEB save 0.5 bx, output to TMB matching logic with ALCT save 0.5 bx.

-1.0 bx in internal processing of ALCT-CLCT matching.

9CMS Latency Review, 13th March 2007 CSC Trigger

Details:

ItemCrit

path?Item BX

Item ns

Cum. BX

Item BX

Item ns

Cum. BX

Sub BX

Item BX

Item ns

Cum. BX

Sub BX

TOF time-of-flight to ME4/1, 11m Y 0.0 0.0 0.0 1.5 37 1.5 1.5 37 1.5CFEB drift delay to last hit of 6 layers expectedY 3.0 75.0 3.0 3.0 75 4.5 3.0 75.0 4.5

ALCT drift delay to last hit of 6 layers expected 3.0 75 3.0 3.0 75 4.5 3.0 75 4.5Signal prop. on strips and CFEB cables Y 0.8 20.0 3.8 0.8 20 5.3 0.8 20 5.3

P reamp latency Y 1.0 25.0 4.8 1.0 25 6.3 1.0 25.0 6.3

Comparator delay for peaking time Y 2.0 50.0 6.8 3.0 75 9.3 3.0 75.0 9.3

Comparator latency, clk to first triad Y 2.0 50.0 8.8 2.0 50 11.3 2.0 50 11.3

CFEB mux to triads Y 1.5 37.5 10.3 1.5 38 12.8 1.5 38 12.8

AFEB latency 3.0 75.0 6.0 3.0 75 7.5 3.0 75 7.5Longest Skewclear delay Y 1.4 35 11.7 2.4 59 15.2 15.2 2.4 59 15.2 15.2ALCT input delay lines and multiplexors 4.0 100 10.0 4.0 100 11.5 4.0 100 11.5ALCT valid out 3.0 75 13.0 3.0 75 14.5 3.0 75 14.5ALCT propagation to TMB input 1.4 35.0 14.4 2.4 59 16.9 2.4 59 16.9ALCT propagation through RAT into TMB FP GA2.0 50 16.4 2.0 50 18.9 2.0 50 18.9TMB triad demux/synchronization Y 1.0 25.0 12.7 1.0 25 16.2 0.0 0 15.2TMB triad decoding to 1/2-strips Y 4.0 100.0 16.7 4.0 100 20.2 4.0 100 19.2TMB pretrigger (#layers>thresh) Y 1.0 25.0 17.7 1.0 25 21.2 1.0 25 20.2Best 1/32 envelopes/CFEB Y 2.0 50.0 19.7 2.0 50 23.2 2.0 50 22.2Best 2/5 CLCT patterns Y 3.0 75.0 22.7 3.0 75 26.2 2.0 50 24.2ALCT matching if ALCT in time Y 4.0 100.0 26.7 4.0 100 30.2 4.0 100 28.2MP C frame leaves TMB Y 1.0 25.0 27.7 1.0 25 31.2 16.0 1.0 25 29.2 14.0Error during 2006 Slice Test only 3.0 75.0 30.7 - - - - - - - -Backplane propagation Y 1.0 25.0 31.7 1.0 25 32.2 1.0 25 30.2

2006 Slice Test CMS, TMB2005 CMS, TMB2007

10CMS Latency Review, 13th March 2007 CSC Trigger

Latency Summary

CSC-TF path: Previous estimate 80.5 bx This is reduced to 77.7 bx currently Reduces to 75.7 bx with new firmware (compare to TDR 78 bx)

CSCDTTF path: Previous estimate 67 bx This is reduced to 64.2 bx currently Reduces to 62.2 bx with new firmware No TDR estimate, but DTTF waits for CSC primitives starting at

bx 60 (Janos Ero, longer-than-anticipated optical cables)

11CMS Latency Review, 13th March 2007 CSC Trigger

Synchronization spreadsheet update Spreadsheet: re-ordered plots sensibly and added a “key” to describe all

the Excel plots

alct_tx_clock_delay comparison

0

5

10

15

20

25

30

0 10 20 30 40 50 60 70

2*(65-skewclear) (ns)

alc

t_tx

_c

loc

k_

de

lay

(n

s)

Good correlation with 2X Skewclear cable delay, as expected

alct_tx vs skewclear (ns) Alct_tx_clock_delay settings (2.2 ns/bin) are seen to be clearly related to the skewclear cable delay (ns), with a slope of -2 and a wrap-around every 12.5ns in Skewclear delay length.

alct_tx_clock_delay comparison

Same as previous, except plot the alct_tx_clock_delay in units of ns, and plot against 2*(65-skewclear_delay) (ns) and see the slope=1 and wrap-around every 25 ns. The y-intercept is 10 ns.

alct_tx vs skewclear (ns)

0

2

4

6

8

10

12

14

30 35 40 45 50 55 60 65 70

ALCT Skewclear delay (ns)

alct

_tx_

cloc

k_de

lay

12CMS Latency Review, 13th March 2007 CSC Trigger

Sync Spreadsheet: updating parameters after “pilot error” fix

L1A timing looks much more sensible

+Z TMB L1A vs ALCT cable delay

154.8

155

155.2

155.4

155.6

155.8

156

156.2

0 10 20 30 40 50 60 70

alct_skewclear_delay (ns)

tmb_

l1a_

dela

y

13CMS Latency Review, 13th March 2007 CSC Trigger

Comments Data taken with various comparator thresholds

Quick look: 12mV best? Would like to verify with DQM and other offline study

Use 12 mV for subsequent studies Best trigger timing settings?

Data taken with various drift_delays for ALCT and CLCT Data taken with various comparator delays to peak Data taken with various “triad persistence” values NEED information on what happens to trigger efficiencies Also need to run with new pattern-finding firmware as soon as it’s

ready to verify some of the settings.

14CMS Latency Review, 13th March 2007 CSC Trigger

ALCT fine delays Dayong “test” of analysis: revert to old firmware

phases, try diddling fine delays a little, take data and see if he can find the offset.

Also, a few typos to fix (mine) in getting from Misha’s numbers to the XML file.

Otherwise, new TMB clocking phases should result in constant offset in clock time to all ALCTs, should be invisible to cosmic ray data – to verify.

Then, apply Dayong corrections – is relative timing perfect?

I still want to “predict” ALCT fine delays with spreadsheet… just need a few hours analysis time…

15CMS Latency Review, 13th March 2007 CSC Trigger

Comments I

Best trigger timing settings? 12 mV deemed best comparator threshold, but is it? Data taken with various drift_delays for ALCT and CLCT Data taken with various comparator delays to peak Data taken with various “triad persistence” values NEED information on what happened to trigger efficiencies

New pattern-finding firmware: We’d like to verify some of the timing settings (some will change,

e.g. pretrigger earlier with 2 layers rather than 4). Changes to CLCT/TMB emulator code will be needed (Slava).

16CMS Latency Review, 13th March 2007 CSC Trigger

Comments II TMB qualities: 4-bit = 16 choices: 6 di-strip qualities gone

Can get by for now just using 10 out of 16 qualities Slava: reassignment of qualities should be intimately connected

with accelerator vs. collision muons question. Nobody thought through accelerator muons all the way:

Tailor ALCT collision patterns specific to chamber? ALCT accelerator patterns switched on? What priority do accelerator muons have? (currently TMB

low quality, but people do want accel. muon trigger) The SP doesn’t yet handle accelerator muons appropriately

(horizontal coincidence)