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THIT KVI MCH TƯƠNG TƯƠ CHƯƠNG 5: CURRENT MIRRORS TP.HChí Minh 04/2012 Hoàng Trang-bmôn KThut ĐinT[email protected] 1 1

CHƯƠNG 5: CURRENT MIRRORS

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Microsoft PowerPoint - AnalogICdesign-chapter5_Current Mirror [Compatibility Mode]THIT K VI MCH TNG T CHNG 5: CURRENT MIRRORS
TP.H Chí Minh 04/2012
11
Content
Basic current sources
11 - 4 - 2012 Analog IC Design 3
p g
Problems
Output current depends on Output current depends on Supply (Vdd) Process (W/L,VTH):VTH vary from wafer ocess ( / , TH) TH a y o a e
to wafer Temperature (R1,R2, , )nμ THV
Output current is poorly defined
IS THERE A WAY OF GENERATING RELIABLE CURRENTS ?
11 - 4 - 2012 Analog IC Design 4
Basic Idea
A h I f i il bl d i iAssume that Iref is available and pricise How do we guarantee Iout = IREF ?
11 - 4 - 2012 Analog IC Design 5
Basic current mirror
2( )
mirror (For NMOS)
Basic current mirror
Multiple current sources
Problems
While
How to copy the IREF in this case ?
11 - 4 - 2012 Analog IC Design 9
DS2 y q DS1 this case ?
Cascode Current Mirrors
If h M d M3 h
How do we generate Vb to ensure Vx = Vy ? 23 (W/L)(W/L)
If we chose M0 and M3, so that 1
2
0
3
(W/L) ( )
(W/L) ( )
then we have V 3 = V 0 and V = V
11 - 4 - 2012 Analog IC Design 10
then we have Vgs3 Vgs0 and Vx Vy
Cascode Current Mirrors (cont)
In (b) : the minimum allowable voltage at P is : V P,min = VN – VTH = VGS0 + VGS1 – VTH = (Vgs0 – VTH ) + (Vgs1 – VTH ) + VTH
In (a) : V b is chosen to allow the lowest possible value of Vp but I out does not accurately keep track I REF because V DS1 differ V DS2
In (b) : I keep track I at higher accuracy but the minimum level Vp
11 - 4 - 2012 Analog IC Design 11
In (b) : I out keep track I REF at higher accuracy but the minimum level Vp is higher by VTH
Cascode Current Mirrors (cont)
Low-voltage cascode mirror
Modification of cascode mirror for low voltage operation
M1 and M2 are in saturation: M2: Vb – VTH2 ≤ VX (= VGS1) M1: = VGS1 – VTH1 ≤ VA (= Vb - VGS1) VGS2 + (VGS1 – VTH1 ) ≤ Vb ≤ VGS2 – VTH2
11 - 4 - 2012 Analog IC Design 13
Low-voltage cascode mirror (cont)
If Vb = VGS2 + (VGS1 – VTH1 )= VGS4 + (VGS3 – VTH3 ) Then the casecode current source M3-M4Then the casecode current source M3-M4 consumes minimum headroom while M1 and M3 sustain equal drain-souce voltage ,allowing accurate copy IREF
11 - 4 - 2012 Analog IC Design 14
Low-voltage cascode mirror (cont)
M1 and M2 are in saturation: Vb,min = VGS2 + (VGS1 – VTH1 )
Select: VGS5 ≈ VGS2
M7 : large (W/L)7 so that VGS7≈VTH7
VDS6 ≈ VGS6 – VTH7VDS6 ≈ VGS6 VTH7
Vb = VGS5 + VGS6 – VTH7
Low-voltage cascode mirror (cont)
Low voltage cascode using a source follower level shifter
If MS is biased at a very low current density,ID/(W/L), then VGSS ≈ VTHS ≈ VTH3, i.e., VN’≈ VN − VTH3, and
VB = VGS1 + VGS0 − VTH3 − VGS3 = VGS1 − VTH3 implying that M2 is at the edge of the triode region.
In this topology, however, V ≠ VVDS2≠ VDS1
If the body effect is considered for M0 , MS and M3, it is different to guarantee that M2 operates in
saturationsaturation.
Active current mirrors
Current mirror processing a signal
M1 and M2 are identical: Iout = Iin (for λ = 0)Iout = Iin (for λ = 0)
11 - 4 - 2012 Analog IC Design 17
Differential pair with current source load
Calculate G Assuming γ = 0
outI G
Calculate Gm
11 - 4 - 2012 Analog IC Design 18
Differential pair with current source load (cont)
Calculate Vp /Vin
Calculate Vout /Vp

Note: if ro4 → 0, Vp /Vin → 1/2, and if , p , ro4 →∞, Vp /Vin → 1.
Calculate Vout /Vinout in
oo o4r
1 o2r
Concept of combining the drain currents of M1 and M2
M3 and M4 are identical
11 - 4 - 2012 Analog IC Design 20
Differential pair with active current mirror (large signal analysis)( g g y )
Operation: + If Vin1 << Vin2, M1 is off and so are M3 and M4.
M2 and M5 operate in triode region, carrying zero current. Thus, Vout = 0. + As Vin1 approaches Vin2 for a small difference, M2 and M4 + As Vin1 approaches Vin2 for a small difference, M2 and M4 are saturated, providing a high gain. + As Vin1 becomes more positive than Vin2, ID1, |ID3|, and |ID4| increase and ID2 decreases, eventually driving M4 into h i d ithe triode region. + If Vin1 >> Vin2, M2 turns off, M4 operates in deep triode region with zero current, and Vout = VDD.
The choice of the input common-mode voltage: For M2 to be saturated, Vout ≥ Vin,CM − VTH. Thus, to allow maximum output swings, the input CM level must be as low as possible ith V V + V
11 - 4 - 2012 Analog IC Design 21
possible, with Vin,CM = VGS1,2 + VDS5,min
Differential pair with active current mirror (small signal analysis)( g y )
Asymmetric swings in a differential pair with active current mirrorpair with active current mirror
Calculate Gm ,node P can be viewed as a virtual ground
2 inm1.Vg
inm1,2.Vg D4ID2IoutI
Differential pair with active current mirror (small signal analysis)(cont)( g y )( )
Calculate Rout o4r XV
01 2//r1 o1 22r
01,2 m3Go1,2
where the factor 2 accounts for current copying action of M3 and M4. For 2ro1 2 >> (1/gm3)||ro3 we have Rout ≈ ro2 || ro4For 2ro1,2 >> (1/gm3)||ro3, we have Rout ≈ ro2 || ro4
Calculate Av
11 - 4 - 2012 Analog IC Design 23
| Av | GmRout gm1,2 (ro2 || ro4)
Differential pair with active current mirror (small signal analysis)(cont)( g y )( )
Substitution of the input differential pair by a Thevenin equivalent
Calculate Veq and Reqq q
ino1,2m1,2eq
r2R
V.r.V
o1,2eq r2R
Differential pair with active current mirror (small signal analysis)(cont)( g y )( )
Calculate Av = Vout / Vin The current through Req is
The fraction of this current that flows through o3//r
m3g 1
g
The fraction of this current that flows through 1/gm3 is mirrored into M4 with unity gain. That is
0outVo3rinV.01,2r.m1,2outV 2I
0 o4r ou.
)r//r( o3,4o1,2m1,203 4r1 2r 01,2r03,4.r.m1,2
iV outV g
,,,03,4ro1,2rinV
Differential pair with active current mirror sensing a common-mode change
p p ( )
The CM gain is defined in terms of the single-ended output component produced by the input CM change:
inV outV
Differential pair with active current mirror common mode properties(cont)
Simplified circuit of CM circuit
1
. SS.m1,2g21
1
m1,22g
R
where we have assumed 1/(2gm3,4) << ro3,4 and neglected the effect of ro1,2 /2. Even with perfect symmetry, the output signal is corrupted by input CM variations, a d b k th t d t i t i th f ll diff ti l i itdrawback that does not exist in the fully differential circuits
CMRR
)o3,4//ro1,2)(rSSRm1,22g(1m3,4g m1,2g