Chpt3 Slides

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Chapter 3

Gate-Level Minimization

Karnaugh Maps

an mp cat onsDon’t Care Conditions

NAND and NOR Implementations

Parity Generation and Detection



Learning Objectives

• Given a function (completely or incompletely specified) ofthree to five variables, plot it on a Karnaugh map and useto simplify Boolean expressions. The function may be

given in minterms, maxterms, or algebraic form.• Determine the essential prime implicants of a function

from a map.

- - - -form of a function from a map.

• Determine all of the prime implicants of a function from amap.

• Understand the relation between operations performedusing the map and the corresponding algebraicoperations.



K-Map

• Provides an alternative technique for representingBoolean functions

• One Box/square on map is for each row i.e minterm or

maxterm of the function in Truth Table• Karnaugh map's input values must be ordered such

that the values for adjacent columns vary by only asingle bit, for example, 00, 01, 11, and 10. This is

necessary to observe the variable transitions – Known as a Gray code



Multiple Inputs K-Map

• Three and Four-variable maps



K-Map Method

• The Karnaugh Map (K-Map) method uses a simpleprocedure for minimizing Boolean functions. – The map is a diagram made up of squares with each square

representing one minterm of the function.

– The key is to learn to identify visual patterns.

– The result is always an expression that is in one of the two standardforms, SOP or POS.

– Much faster and more more efficient than previous minimizationtechniques with Boolean algebra.

– It is possible to find two or more expressions that satisfy theminimization criteria.

– Rules to consider

Every cell containing a 1 must be included at least once.

The largest possible “power of 2 rectangle” must be enclosed.

The 1’s must be enclosed in the smallest possible number of rectangles.



Two-Variable Map

• A two-variable mapholds four minterms fortwo variables. – We mark the squares of the

given function.



Representing 2-Variable Functions

• K-Map for AND • K-Map for OR



Three-Variable Map

• A three-variable mapholds eight minterms forthree variables. – Again, we mark the squares

to a given function.

– Note that the sequence is notarranged in a binary way.

– The sequence used, similarto Gray code, allows only onebit to change from column tocolumn and row to row.



Three-Variable Map

• Correction: Columns are yz and not xz in fig 3-3 (book)



Mapping Functions for three-variable map

• When you have already been provided a function, youcan map the function into a K-map by remembering – the cells of a k-map represent minterms

– a 1 in a cell indicates that the minterm is part of the function

– two adjacent 1’s represent a two literal term

– four adjacent 1’s represent a one literal term

– eight adjacent 1’s represent a true function, F = 1



Minimization Characteristics in 3-Variable Maps

• Since any two adjacent cells in a 3-variable maprepresent a change in only a single bit, we use this todo minimization. – Consider the two cells for m0 and m1 where the difference is the

.

– F = m0 + m1 = x’y’z’ + x’y’z = x’y’(z’ + z) = x’y’



Minimization Example

• Each of the two adjacent pairs of entries can besimplified by eliminating the changing bit (z in bothcases). – F (x,y,z) = x’y’ + xy



Note on Adjacency

• So far, we have assumed that adjacent cells in themap need to touch each other but this is not alwaysthe case. – m0 and m2 are considered adjacent

» m0

+ m2

= x’y’z’ + x’yz’ = x’z’(y’ + y) = x’z’

– m4 and m6 are considered adjacent

» m4 + m6 = xy’z’ + xyz’ = xz’(y’ + y) = xz’



Another Example

• The four adjacent squares can be combined to givethe single literal term z’

• The remaining single term is combined with thead acent s uare that was alread used to ive us the

term x’y’• F = z’ + x’y’



3-Variable Map Patterns

• The number of adjacent squares that may becombined always represent a number that is a powerof 2 such as 1, 2, 4, and 8. – One square represents one minterm with three literals.

– Two adjacent squares represents a term of two literals.

– Four adjacent squares represents a term of one literal.

– Eight adjacent squares represents the entire map and produces afunction that is always equal to 1.



Mapping Functions (Example)

• Given the function – F = x’z + xy’ + xy’z + yz

• Map the function• Determine the sum of minterms equation

• Determine the minimum sum of products expression

1 1

1 11

1

1

• Sum of minterms: F = ∑(1, 3, 4, 5, 7)• Minimum sum of products: F = z + xy’



Another Minimization Example

• Each of the two adjacent pairs of entries can besimplified by eliminating the changing bit. – x is eliminated in column 2

– y is eliminated in the other pair.

– F = y’z + x’z’




• Two variable maps. – F=AB +A′′′′B +AB′′′′

0A

1 1

1

B 0 1

0

1 F=A+B

• Three variable maps. – F=AB’C’ +AB ′′′′C +ABC +ABC ′′′′ + A’B’C + A’BC’

F=A+B ′′′′C +BC ′′′′0

A

1 1

100 01

0

1

BC

0

1 1

111 10




Alternate Labeling of k-map

G(A,B,C) =0 0 1 1

A

A

AB

C

F(A,B,C) = Σm(0,4,5,7)

B

1 0

0 0

0 1

1 1CB

A

= AC + B’C’




Few Simplifications

0 10

1

a

b 0 1

0

1

a

b0 1

0 1

f = a

1 1

0 0

g = b'

cab

00 01 11 10

0

1

cab

00 01 11 10

0

1

0 0 1 0

0 1 1 1

Cout = ab + bc + ac

0 0 1 1

0 0 1 1

f = a



Example 3-1

– Simplify Boolean functionF(x,y,z) = ΣΣΣΣ(2,3,4,5)

• Sol:

– 1 is marked in each minterm

that represents the function

– Find the possible adjacentsquares and mark them withrectangles

– The upper right rectanglerepresents the areaenclosed closed by x’y(eliminating the changingbit)

– Similarly lower left

rectangle represents xy’

– The logical sum of thesetwo terms gives:

F = x'y + xy'



Example 3-2

– F(x,y,z) = ΣΣΣΣ(3,4,6,7)

• Sol:

– 1 is marked in each mintermthat represents the function


– Two adjecent squares arecombined in the thirdcolumn to give a two-literalterm yz

– The remaining two squareswith 1’s are enclosed in halfrectangles. This gives two-

literal term xz’ – The logical sum of these

two terms gives:

F = y z + x z’



Example 3-3

– F(x,y,z) = ΣΣΣΣ(0,2,4,5,6)• Sol:


– Find the possible adjacent

squares and mark them withrectangles

– We combine four adjacentsquares to get a single literalterm z’ as m0+m2+m4+m6

= x'y'z'+x'yz'+xy'z'+xyz‘

= x'z'(y'+y) +xz'(y'+y)

= x'z' + xz‘ = z'

– The remaining two squareswith 1’s are enclosed by arectangle (with one square that

is already used once). Thisgives two-literal term xy’

– The logical sum of these twoterms gives:

F = z’ + xy’



Example 3-4

– F = A'C + A'B + AB'C + BC – express it in sum of minterms

find the minimal sum ofproducts expression

• Sol:

– The two squares correspondingto the first term A’C. (A’ firstrow and C two middle columns)

– A’B has 1’s in squares 011 and010 in the same way

– AB’C has 1 square 101 and BChas two 1’s in squares 011 and111

– The function has total of 5minterms as shown in figure

– Find the possible adjacent

squares and mark them withrectangles as shown in the map

– It can be simplified with onlytwo terms giving:

F = C + A’B



Four-Variable Map

• A four-variable map holds16 minterms for fourvariables. – Again, we mark the squares

to a given function. – Note that the sequence is not

arranged in a binary way.

– The sequence used is a Graycode and allows only one bit

to change from column tocolumn and row to row.



4-Variable Map

Minterms Labeling




• The number of adjacent squares that may becombined always represent a number that is a powerof 2 such as 1, 2, 4, 8, and 16. – One square represents one minterm with four literals.

– Two adjacent squares represents a term of three literals.

– Four adjacent squares represents a term of two literals.

– Eight adjacent squares represents a term of one literal.

– Sixteen adjacent squares represents the entire map and produces afunction that is always equal to 1.



Minimization Example

• The eight adjacent squares can be combined to formthe one literal term y.

• Four adjacent squares can be combined to form the

two literal term wz’.

• F = y+ wz’



Another Example

• Four adjacent corners can be combined to formthe two literal term x’z’.

• Four adjacent squares can be combined to formthe two literal term x’y.

• The remaining 1 is combined with a singleadjacent 1 to obtain the three literal term w’y’z’.

• F = x’z’ + x’y + w’y’z’



Another Example

• F=A′′′′BC

′′′′+A

′′′′CD

′′′′+ABC+AB

′′′′C′′′′D′′′′+ABC

′′′′+AB

′′′′C

00 01CD

11 10

F=BC ′′′′+CD ′′′′+ AC+ AD ′′′′

01 100001 00 11

11 0

111

10

11 1

1



Another Example

• F(A,B,C,D) = Σm(0,3,5,8,9,10,11,12,13,14,15)

– F = C + A’BD + B’D’

C + B’D’

A 11110111

1 0 0 1

+ A’BD

Solution set can be considered as a coordinateSystem!

D

B

A

B

CD

00001000

0 1 0 0

1 1

1 1

1 1

1 1C



Another Example

Magnitude Comparator

0 0

1 0

0 0

0 0D

A

1 1 0 1C

1 0

0 1

0 0

0 0D

A

0 0 1 0C

0 1

0 0

1 1

1 1D

A

0 0 0 0C

A' B' D + A' C + B' C D

B C' D' + A C' + A B D'

LT =EQ =

GT =

K-map for LT K-map for GT

1 1 0 0

B

K-map for EQ

0 0 0 1

B

0 0 1 0

B

A'B'C'D' + A'BC'D + ABCD + AB'CD’



Example 3-5

– F(w,x,y,z) =ΣΣΣΣ(0,1,2,4,5,6,8,9,12,13,14)

• Sol:



– We combine eight adjacentsquares to get a single literal

’

– The top two 1’s on the rightare combined with the toptwo 1,son the left to give theterm w’z’

– We combine the singlesquare left on right with threeadjecent squares that arealready used to give the termxz’

– The logical sum of thesethree terms gives:

F = y’ + w’z’+xz’

Correction in the book:

Add 1 in the square



Example 3-6

– F =A’B’C’+B’CD’+A’BCD’+AB’C’

• Sol:

– Each of three literal term inmap is represented by twosquares and four literal term

in map is represented by onesquare

– We combine the 1’s in the fourcorners to give the term B’D’

–

top row are combined withtwo 1’s in the bottom row togive the term B’C’

– The remaining 1’s may becombined in the two-squarearea to give the term A’CD’

– The logical sum of these threeterms gives:

F = B’D’ + B’C’+ A’CD’



Prime Implicants

• A prime implicant is a product term obtained bycombining the maximum possible number of adjacentsquares in the map. – A single 1 on a map represents a prime implicant if it is not adjacent

to any other 1.

– Two adjacent 1’s form a prime implicant, provided they are notwithin a group of four adjacent squares.

– Four adjacent 1’s form a prime implicant if they are not within agroup of eight adjacent squares, and so on.

• If a minterm in a square is covered by only one prime

implicant, that prime implicant is said to be essential. – They are found by looking at each square marked with a 1 andchecking the number of prime implicants that cover it. Those withonly one prime implicant are essential.



Finding Simplified Expressions

• The procedure for finding simplified expressions is – determine all essential prime implicants first

– determine the expression from the logical sum of the essential primeimplicants with other prime implicants needed to cover the

• There may be more than one simplified expression.



Example of Prime Implicants

• Two essential prime implicants (caused by m0 and m5) – This gives us two terms: x’z’ and xz

• Finding prime implicants for the remainders results in

four expressions: – F = xz + x’z’ + yz + wz

– F = xz + x’z’ + yz + wx’

– F = xz + x’z’ + x’y + wz

– F = xz + x’z’ + x’y + wx’



Five-Variable Map

• A five-variable map holdsthirty-two minterms forfive variables. – We use two four variable map

distinguishing between thetwo.

– Each square in the first mapis adjacent to thecorresponding square in the

second map (i.e. 4 and 20 areadjacent). It is just likeplacing one map on the topof the other.

5 V i bl M P




5 V i bl M P tt




• The number of adjacent squares that may becombined always represent a number that is a powerof 2 such as 1, 2, 4, 8, 16, and 32. – One square represents one minterm with five literals.

– Two adjacent squares represents a term of four literals.

– Four adjacent squares represents a term of three literals.

– Eight adjacent squares represents a term of two literals.

– Sixteen adjacent squares represents a term of one literal.

– Thirty-two adjacent squares represents the entire map and produces

a function that is always equal to 1.

Mi i i ti E l (5 V i bl M )



Minimization Example (5-Variable Map)

• Example 3-7

• Simplify the Boolean function

F(V,W,X,Y,Z) = ΣΣΣΣ(0,2,4,6,9,13,21,23,25,29,31)

v’w’z’vxz

• F = v’w’z’ + wy’z + vxz

wy’z

Product of Sums Minimization



Product of Sums Minimization

• By definition, all the squares in a map that are notmarked with a 1 represent the complement of thefunction. – If we mark the empty squares with 0s and then combine the zeros

,

complement of the function i.e., F’ – The complement of F’ [as (F’)’ = F] by DeMorgan’s theorem (by

taking the dual and complementing each literal, section 2-4), givesus the product of sums form

POS Minimization Example



POS Minimization Example

0

0

0

0

0

0

0

0

0w’x

xz yz

xy

• F’ = w’x + yz + xz + xy

• F = (F’)’

• =(w’x + yz + xz + xy)’ = (w + x’)(y’ + z’)(x’ + z’)(x’ + y’)

Example 3 8



Example 3-8

– F = ΣΣΣΣ(0,1,2,5,8,9,10)

– Simplify the function in

» sum of products (SOP)

» Product of sums (POS)

• Sol:

– The squares marked with 1’srepresents minterms and arecombined to form simplifiedfunction in sum of products(SOP). F=B’D’+B’C’+A’C’D

– If the squares marked with0’s are are combined weobtain the simplifiedcomplemented functionF’=AB+CD+BD’

– Applying DeMorgan’stheorem we obtain thesimplified function inproduct of sum form (POS)F=(A’+B’)(C’+D’)(B’+D)

SOP Gate Implementation



SOP Gate Implementation

• F1 = B’D’ + B’C’ + A’C’D

POS Gate Implementation



POS Gate Implementation

• F2 = (A’ + B’)(C’ + D’)(B’ + D)

SOP and POS Gate Implementation



SOP and POS Gate Implementation

Two-level logic diagrams

Function Comparison



Function Comparison

Working With Maxterms



Working With Maxterms

• At times, we may be required to work with maxterms. – The previous process actually worked with minterms. Remember

that the numbers used for minterms are the opposites of thenumbers used for maxterms:

» F(w, x, y, z) = ∑(0, 1, 2, 8, 9, 10, 11), uses minterms

» F w, x, , z = 3, 4, 5, 6, 7, 12, 13, 14, 15 , uses maxterms

– If you are given minterms, fill in 1’s for the minterms and then fill theremaining cells with 0’s

– If you are given maxterms, fill in 0’s for the maxterms and then fillthe remaining cells with 1’s

– For SOP simplification, solve the map for the 1’s

– For POS simplification, solve the map for the 0’s to getcomplemented function. Taking the complement of thiscomplemented function we obtain function in POS form

Don’t Care Conditions



o t Ca e Co d t o s

• So far, we have always assumed that all combinations

of the input values are necessary in our expressions.

• Sometimes there are unspecified combinations withina function. – For example, four bit binary has six combinations that are not used.

• Functions that have unspecified outputs for someinput combinations are called incompletely specifiedfunctions.

– These are called don’t care conditions because in most applications,we do not care what the specification of the combination is.

Indicating Don’t Care Conditions



g

• A don’t care condition cannot be specified with a 1

because it would require the function to always be 1for the combination.

• Likewise, a don’t care condition cannot be s ecifiedwith a 0 because it would require the function toalways be 0 for the combination.

• To specify don’t care conditions in a map, we use theletter ‘X’.

– When we choose adjacent squares to simplify the map, the don’tcare minterms can be assumed to be 0 or 1, whichever leads to thesimplest expression.

Simplify With Don’t Care Conditions



• Simplify the Boolean function: F (w,x,y,z) = ΣΣΣΣ(1,3,5,9,13)

• It has don’t-care conditions: d(w,x,y,z) = ΣΣΣΣ(0,2,7)

F1 = w’x’+y’z = ΣΣΣΣ(0, 1, 2, 3, 5, 9, 13)

F2 = w’z+y’z = ΣΣΣΣ(1, 3, 5, 7, 9, 13)

Example 3-9



• Simplify the Boolean function: F (w,x,y,z) = ΣΣΣΣ(1,3,7,11,15)

• It has don’t-care conditions: d(w,x,y,z) = ΣΣΣΣ(0,2,5)

F = ΣΣΣΣ(0,1,2,3,7,11,15) ; F = ΣΣΣΣ(1,3,5,7,11,15)Either of two are acceptable

More Examples with Don’t Care



F=A′C ′D+B+AC 0

AB

x x1

00 01

00

01

CD

0x 1

0

11 10

11

x 010 1 1

0AB

x x

100 01

00

01

CD

0

x 1

011 10

1x 0

111

10

11 1

xF=A′B ′C ′D+ABC ′+BC+AC

NAND and NOR Implementations



• Digital circuits are frequently constructed with NAND

and NOR implementations: – they are easier to make

– they are used in all IC digital logic families

• Because of their use, rules have been developed thatallow us to convert Boolean functions using AND, ORand NOT into the equivalent NAND and NOR logicdiagrams.

NAND Circuits



• The NAND gate is a universal gate that can be used toconstruct any gate, therefore being able to replace allAND and OR gates.

NAND Notation



• A convenient method for creating a NAND circuit is to

obtain the simplified Boolean function in terms ofBoolean operators and then convert the function toNAND logic.

equivalent alternative symbols as shown below forNAND gate

Two-Level Implementation



• The implementation of Boolean functions with NANDgates requires that the function be in sum of productsform. – F = AB + CD

• All three diagrams are equivalent




• F = AB+CD+E

• F = ((AB)' (CD)' E')' =AB+CD+E

Example 3-10



• Implement F(x,y,z)= ΣΣΣΣ(1,2,3,4,5,7) with NAND gates

2-Level NAND Rules



• Given a Boolean function, follow these rules to obtain

the NAND logic diagram: – Simplify the function and express it in sum of products

– Draw a NAND gate for each product term of the expression that has.

– Draw a single gate using the AND-invert or the invert-OR graphicsymbol in the second level, with inputs coming from outputs of firstlevel gates

– A term with a single literal requires an inverter in the first level,unless the single literal is already complemented

Multilevel NAND Circuits



• The general procedure for converting a multi-level

AND-OR diagram into an all-NAND diagram is asfollows: – Convert all AND gates to NAND gates with AND-invert graphic

– Convert all OR gates to NAND gates with invert-OR graphic symbols – Check all the bubbles in the diagram

» Every bubble that is not compensated by another along thesame line will require the insertion of an inverter or complementthe input literal

Multilevel NAND Example



Multilevel NAND Example



NOR Circuits



• The NOR operation is a dual of the NAND operationand therefore all procedures and rules for NOR logicare the dual of the corresponding procedures and

rules for the NAND logic.

NOR Notation



• A convenient method for creating a NOR circuit is to

obtain the simplified Boolean function in terms ofBoolean operators and then convert the function toNOR logic.




• The implementation of Boolean functions with NORgates requires that the function be in product of sums

form. – F = (A + B)(C + D)E

Nondegenerate Forms



• Consider that we have four types of gates:

AND, OR, NAND, and NOR.

• In a two-level circuit, we can have as many as 16 combinationsof two-level forms:

– Eight of these combinations are called degenerate forms because theydegenerate to a single operation

» For example, an AND-AND circuit is simple an AND of all inputs

• – AND-OR

– NAND-NAND

– NOR-OR

– OR-NAND

– OR-AND

– NOR-NOR – NAND-AND

– AND-NOR

AND - OR - INVERT Implementation



• The two forms NAND-AND and AND-NOR areequivalent and performs the AND-OR-INVERTfunction

• AND-NOR resembles the AND-OR except for theinversion done by the bubble in the output of NORgate

•

– F = (AB+CD+E)’

• F' = AB+CD+E (sum of products)

AND - OR - INVERT Implementation



OR - AND – INVERT Implementation



• The OR-NAND and NOR-OR forms performs the OR-AND-INVERT function

• OR-NAND resembles the OR-AND except for the

inversion done by the bubble in the output of NANDgate

• In the figure (next slide) the function implemented is

– F = [ (A+B)(C+D)E ]’

• F' = (A+B)(C+D)E (product of sums)

OR - AND – INVERT Implementation



Exclusive-OR Function



• Exclusive-OR (XOR) performs the following function – x ⊕⊕⊕⊕ y = xy’ + x’y

• This function is equal to one only if one of x or y isequal to one but not both.

• Exclusive NOR (XNOR) can be generated by taking thecomplement of an XOR operation – (x ⊕⊕⊕⊕ y)’ = xy + x’y’

•

• The following identities apply to XOR – x ⊕⊕⊕⊕ 0 = x

– x ⊕⊕⊕⊕ 1 = x’

– x ⊕⊕⊕⊕ x = 0

– x ⊕⊕⊕⊕ x’ = 1

– x ⊕⊕⊕⊕ y’ = x’ ⊕⊕⊕⊕ y = (x ⊕⊕⊕⊕ y)’

• XOR is also commutative and associative – A ⊕⊕⊕⊕ B = B ⊕⊕⊕⊕ A

– (A ⊕⊕⊕⊕ B) ⊕⊕⊕⊕ C = A ⊕⊕⊕⊕ (B ⊕⊕⊕⊕ C) = A ⊕⊕⊕⊕ B ⊕⊕⊕⊕ C

Exclusive-NOR Function



XOR Implementations



Odd Function



• The XOR operation with three or more variables can beconverted into an ordinary Boolean function by

replacing the ⊕⊕⊕⊕ with its equivalent Boolean expression – A ⊕⊕⊕⊕ B ⊕⊕⊕⊕ C = ( A ⊕⊕⊕⊕ B ) . C’ + (A ⊕⊕⊕⊕ B)’ . C

– (AB’ + A’B)C’ + (AB + A’B’)C [As (A ⊕ B)’ = AB + A’B’]

– + + +

– ∑(1, 2, 4, 7)• This function is equal to 1 only if one variable is equal

to 1 or if all three variables are equal to 1. – This implies that an odd number of variables must be one. This is

defined as an odd function.• The complement of an odd function is an even function.

Even Function



• The three input odd function is implemented by meansof 2-input exclusive- OR gates

• The complement of an odd function (i.e., even function)is obtained by replacing the output gate with anexclusive- NOR gate

Parity Generation and Checking



• XOR functions are very useful in systems requiringerror-detection and correction codes.

• Parity bit is for the purpose of detecting errors. It is anextra bit added to make the total number of 1’s eitherodd or even

and then checked at the receiving end for errors• An error is detected if the checked parity does not

correspond with the one transmitted – A circuit that generates a parity bit is called a parity generator.

– The circuit that checks the parity is called a parity checker.




• Table shows the truth table for even parity generator

• The three bits x, y and z constitute the message andare inputs. The parity bit P is the output

• P must be generated to make the total number of 1’seven. So P constitutes the odd function (three variableexclusive- OR function)




• The parity checker can also be implemented withexclusive- OR gates

• parity check: C = x ⊕⊕⊕⊕ y ⊕⊕⊕⊕ z ⊕⊕⊕⊕ P – C=1: an odd number of data bit error

– C=0: correct or an even number of data bit error



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