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Copyright © 2013 Elsevier Inc. All rights reserved. Chapter 6 Architecture

Chapter 6 Architecture - ElsevierTitle Slide 1 Author CEPHA Created Date 8/27/2012 3:02:13 PM

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Page 1: Chapter 6 Architecture - ElsevierTitle Slide 1 Author CEPHA Created Date 8/27/2012 3:02:13 PM

1 Copyright © 2013 Elsevier Inc. All rights reserved.

Chapter 6

Architecture

Page 2: Chapter 6 Architecture - ElsevierTitle Slide 1 Author CEPHA Created Date 8/27/2012 3:02:13 PM

2 Copyright © 2013 Elsevier Inc. All rights reserved.

Figure 6.1 Word-addressable memory

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Figure 6.2 Byte-addressable memory

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Figure 6.3 Big- and little-endian memory addressing

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Figure 6.4 Big-endian and little-endian data storage

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Figure 6.5 R-type machine instruction format

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Figure 6.6 Machine code for R-type instructions

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Figure 6.7 Machine code for the R-type instruction of Example 6.3

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Figure 6.8 I-type instruction format

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Figure 6.9 Machine code for I-type instructions

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Figure 6.10 Machine code for an l-type instruction

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Figure 6.11 J-type instruction format

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Figure 6.12 Machine code to assembly code translation

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Figure 6.13 Stored program

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Figure 6.14 Logical operations

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Figure 6.16 Shift instruction machine code

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Figure 6.16 Shift instruction machine code

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Figure 6.17 Shift operations

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Figure 6.18 Variable-shift instruction machine code

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Figure 6.19 Variable-shift operations

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Figure 6.20 Five-entry array with base address of 0x10007000

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Figure 6.21 Memory holding array[1000] starting at base address 0x23B8F000

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Figure 6.22 Instructions for loading and storing bytes

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Figure 6.23 The string “Hello!” stored in memory

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Figure 6.24 The stack

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Figure 6.25 The stack (a) before, (b) during, and (c) after diffofsums function call

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Figure 6.26 Stack during factorial function call when n = 3: (a) before call, (b) after last

recursive call, (c) after return

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Figure 6.27 Stack usage: (a) before call, (b) after call

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Figure 6.28 Machine code for beq

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Figure 6.29 bne machine code

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Figure 6.30 jal machine code

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Figure 6.31 MIPS memory map

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Figure 6.32 Steps for translating and starting a program

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Figure 6.33 Executable

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Figure 6.34 Executable loaded in memory

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Figure 6.35 F-type machine instruction format

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Figure 6.36 x86 registers

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Figure 6.37 x86 instruction encodings

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Figure M 01

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Figure M 02

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Figure M 03

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Figure M 04

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43 Copyright © 2013 Elsevier Inc. All rights reserved.

UNN Figure 1