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Question bank #1 Simplify the following expression using Boolean algebra. 1.A+AB 2.AB+AB’ 3.A’BC+AC 4.A’B+ABC’+ABC Ans: #2 Simplify the following expression using three variable maps. 1 F(x,y,z)= (0,1,5,7) 2 F(x,y,z)= (1,2,3,6,7) 3 F(x,y,z)= (3,5,6,7) 4 F(x,y,z)= (0,2,3,4,6)

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Question bank

#1 Simplify the following expression using Boolean algebra.

1. A+AB2. AB+AB’3. A’BC+AC4. A’B+ABC’+ABC

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#2 Simplify the following expression using three variable maps.

1 F(x,y,z)=∑(0,1,5,7)

2 F(x,y,z)=∑(1,2,3,6,7)

3 F(x,y,z)=∑(3,5,6,7)

4 F(x,y,z)=∑(0,2,3,4,6)

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#3 Convert the following numbers with indicated bases to decimal no. .

(12121)3 ,(4310)5, (50)7 ,(198)12

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#4 Convert the following decimals no. to binary: 1231,673,1998.

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#5 Convert the following decimals no. to base indicated.

a. 7562 to octalb. 1938 to hexc. 175 to binary

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#5 Convert the hexadecimal no. F3A7C2 to binary and octal.

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#6 Show the values of all bits of a 12 bit register that hold the no. equivalent to decimal 215 in binary,binary coded octal,binary coded hex,binary coded decimal.

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#7 Obtain 9’s complement of the following eight digit decimal no.:

12349867;00980100;90009951;00000000

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#8 Obtain 10’s complement of the following six digit decimal no.:

123900;090657;100000,000000

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#9 Obtain the 1’s and 2’s complements of following eight digit no’s:

10101110;10000001;10000000;00000001..

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Ans

#10 Perform the subtraction with following unsigned decimal no’s by taking 10’s complement of the subtrahend.

a. 5250-1321b. 1753-8640c. 20-100d. 1200-250

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#11 Perform the subtraction with following unsigned binary no’s by taking 2’s complement of the subtrahend.

a. 11010-10000b. 11010-1101c. 100-110000d. 1010100-1010100

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#12 Perform the arithmetic operation +42 + -13 and -42 - -13 in binary using signed-2’s complement representation.

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#13 Represent the decimal no. 8620 in a. BCD b. excess-3 code c. 2421 d. binary no. .

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#14 List the 10 BCD digits with an even parity in the left most position .Repeat with an odd parity.

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Chapter – 4

#1 Show the block diagram of the hardware that implements the following register transfer statement :

yT2: R2←R1 , R1←R2

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#2 Represent the following conditional control statement by two register transfer statements with control functions

If (p=1) then (R1←R2) else if (Q=1) then (R1←R3)

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#3 What has to be done with the bus system to be able to transfer information from any register to any other register ? Specifically , show the connections that

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must be included to provide a path from the outputs of register C to the input of register A?

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#4 Draw a diagram of a bus system similar to the one shown in fig 4-3 (refer morris mano) ,but use three state buffer and a decoder instead of the multiplexer.

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#5 A digital computer has a common bus system for 16 registers of 32 bits each. The bus is constructed with multiplexers.

a. How many selection inputs are there in each multiplexer?b. What size of multiplexers are needed?c. How many multiplexers are there in the bus?

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#6 The following transfer statements specify memory . Explain the memory operation in each use.

a. R2←M[AR]b. M[AR]←R3c. R5←M[R5]

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#7 The adder – subtractor circuit of fig 4-7 (refer morris mano) has the following values for input mode M and data inputs A and B . In each case, determine the values of the output : S3,S2,S1,S0 and C4

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M A B

a. 0 0111 0110b. 0 1000 1001 c. 1 1100 1000d. 1 0101 1010e. 1 0000 0001

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#8 Design a 4-bit combinational circuit decrementer using four full adder circuits .

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#9 Design an arithmetic circuit with one selection variable S and two n-bit data input A and B . The circuit generates the following four arithmetic operations in conjunction with the input carry Cin. Draw the logic diagram for the first two stages.

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S Cin =0 Cin =1

0 D = A+B (add) D = A+1 (increment)

1 D = A-1 (increment) D = A +B +1 (subtract)

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#10 Design a digital circuit that performs the four logic operations of exclusive –OR , exclusive –NOR ,NOR and NAND . use two selection variables . Show the logic diagram of one typical stage.

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#11 Register A holds the 8-bit binary 11011001.Determine the B operand and the logic microoperation to be performed in order to change the value in A to :

a. 01101101b. 11111101

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#12 Starting from the initial value of R = 11011101, Determine the sequence of binary values in R after a logical shift-left,followed by a circular shift right , followed by a logical shift – right and a circular shift – left.

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#13 The 8-bit register AR,BR,CR and DR initially have the following values:

AR = 11110010

BR = 11111111

CR = 10111001

DR = 11101010

Determine the 8-bit values in each register after the execution of the following sequence of microoperations.

AR ← AR +BR add BR to AR

CR ← CR ^ DR, BR ← BR +1 AND DR to CR , increment BR

AR ← AR –CR subtract CR from AR

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