Overview

With more microelectromechanical systems (MEMS) being widely used for automotive and consumer electronics, the need for a robust MEMS and mixed-signal co-design flow is becoming crucial. This flow should equally enable system-on-chip (SoC) and system-in-package (SiP) approaches. A clear-cut interface between a MEMS design sub-flow and the conventional mixed-signal sub-flow is necessary.

Provided as Virtual Integrated Computer-Aided Design (VCAD) Productivity Package, the Cadence® SIMPLI Mixed-Signal/MEMS Co-design Methodology handles the special requirements for a MEMS method-ology for both SoC and SiP applica-tions.

SIMPLI ensures efficient handling of concurrent design/optimization of the MEMS and electronics while handling engineering change orders (ECO) between the two domains.

The Cadence® SIMPLI Mixed-Signal/MEMS Co-design Methodology handles the special requirements for a MEMS methodology for both system-on-chip (SoC) and system-in-package (SiP) applications. Silicon MEMS Platform Interchange – SIMPLI, which supports Cadence Virtuoso® users, ensures efficient handling of concurrent design/optimization of the MEMS and electronics while handling engineering change orders (ECO) between the two domains.

Cadence SIMPLI Mixed-Signal/MEMS Co-design MethodologyFor Cadence Virtuoso Users

MEMSInter-digitized

Sendor

ClockTree C-to-V

SignalProc ADC

MEMS IP Analog + Mixed Signal +Digital Components

Single MonolithicCMOS-MEMS

MEMS Design Sub-Flow

Electro-mechanicalSimulation

PhysicalDesign

SIMPLI

FunctionalValidation

PhysicalIntegration

Mixed-Signal/MEMS DesignSub-Flow

ElectricalSimulation

PhysicalDesign

Foundry Design Kit

IC System Specifications

Electro-Mechanical

MEM

S SpecificationsDigital

Analog (M

ixed-Signal)

Top-Down

Top-Down

Bott

om-U

p

IntegrationPublishing

Figure 1

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Cadence SIMPLI Mixed-Signal/MEMS Co-design Methodology

A Monolithic Mixed-signal / MEMS Co-design Methodology

The MEMS sub-flow follows a top-down approach starting with behavioral modeling down to finite-element simulation.

For the MEMS sub-flow, a Cadence-based design sub-flow is readily available, yet the flow is equally portable to many third-party MEMS point tools through the use of SIMPLI.

The proposed MEMS sub-flow is demonstrated by 18 design tasks. An x-axis MEMS acceler-ometer design has been chosen to demonstrate these design tasks from specifications to publishing.

A meet-in-the middle approach is used for the mixed-signal sub-flow, a variant of the Cadence AMS Design Methodology. This will decrease the entry barrier for the integration of the MEMS structure. On the other hand, most of the specific steps that have to be handled by mixed-signal designers due to the presence of the MEMS structure are handled from a single cockpit called SIMPLI. Thus, mixed-signal designers will not need special training on the MEMS sub-flow.

2AMEMS

Executable Specifications

Creation

3AMEMS

TopologySelection

2BMEMS Design

ValidationStrategy

2CAuxiliary DRCRules Creation

5BMEMS BlockEarly Design

Rule Checking

3BP-Cells

Creation

4BMEMS Layout

Nominal DesignGeneration

4AGeometrical/Mechanical

NominalDesign

6Geometrical/Mechanical

ModelsEnhancement

7BGeometrical/Mechanical

DesignOptimization

7ANominal/Statistical

Verification withEnhanced

Models

7CMEMS Layout/Abstract Final

Design Generation

8AFinite-Element

Signoff

8BN-DOF

Reduced-OrderModel

Generation

8CMEMS BlockFinal Design

Rule Checking

9MEMS IPPackaging

8DMEMS Block

ElectricalParasitic

Extraction

5ANominal Finite

ElementVerification

MEMS Top-Down Functional DesignMEMS DesignDataInput

MEMS Top-Down Physical Design

1AMEMSDesignSpecs

1BFoundryDesign

Kit180nm

Figure 2: MEMS Design Sub Flow

2IC DesignValidationStrategy

3AMS DesignPartitioning

4Block

Specifications

6AIC DesignFunctionalConcept

Validation

7IC Design

Respecification

9IC Design

Functional PerformanceValidation

13IC Post-Layout

Validation

16IC DesignFunctional

Signoff

IC Top-Down Functional Design

IC Top-Down Functional Design

IC Top-Down Functional Design

IC DesignData Input

1ADesignSpecs

1BModifiedFoundry

Design Kit(180nm)

1CSystem-Level

Models

1DSystem-LevelTestbenches

1EMEMS

Packaged IP

1FMEMS DFII

Testbenches

1G3rd Party IP

1HLegacy IP

5AAnalog BlockCircuit Design

5EMEMS IPImport

5BAnalog Block

BehavioralDesign

8AAnalog Block

CircuitOptimization

10AAnalog Block

PhysicalEstimation

12AAnalog Block

Physical Design

10BDigital Block

PhysicalEstimation

12BDigital Block

Physical Design

14Block Physical

IntegrationPreparation

5DDigital

HierarchicalRTL Design

5CLegacy and 3rdParty IP Import

8BDigital Block

Synthesis

6BIC Design

EarlyFloorplanning

11IC RefinementFloorplanning

15IC DesignAssembly

Figure 3: Mixed Signal / MEMS Design Sub Flow

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Cadence SIMPLI Mixed-Signal/MEMS Co-design Methodology

SIMPLI: An IP Publishing and Importing Interface Dedicated to the MEMS Domain

One challenge in the co-design of the MEMS and the mixed-signal portions of the chip is the fact that they might not necessarily share the same flow. Moreover, the information required by the mixed-signal design team might not be readily available from the MEMS point tools.

An extra layer is needed to automate the generation of all the necessary infor-mation from the MEMS tools, while still allowing for IP protection.

SIMPLI operates on standard inputs and generates views required for mixed-signal design within the Cadence Design Framework.

Moreover, SIMPLI automates the extraction of parasitic coupling capaci-tances at the interface with the released MEMS structure.

With SIMPLI, you have the flexibility to export your layout as an abstract view and the behavioral or reduced-order models in a 128-bit RSA encrypted format, which will still be useful for simulation by the mixed-signal design group.

FunctionalDescription

FilesGDSIIFiles

LEFFiles

SpecificationFiles

MeasurementFiles

AssuraCustomization

CDLNetlist

LayoutGDSII File

EncryptedFunctional File

AbstractLEF File

FunctionalView

Spice,Spectre

Coupled CNetlists

Functional View

CDL Black-Box

SpectreBlack-Box

AbstractView

LayoutView

SymbolView

TargetPDK

SpiceBlack-Box

Black-Boxing

AbstractGeneration

Coupled CExtraction

SymbolGeneration

LayoutGeneration

DRC

SIMPLI LibraryProcessor

Required MEMS IP Input Files

Auxiliary Virtuoso not shipped

Figure 4: SIMPLI

Figure 5: Accelerometer example

Figure 6: SIMPLI generated abstract and RSA encrypted code

Cadence SIMPLI Mixed-Signal/MEMS Co-design Methodology

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SIMPLI Inspect

The purpose of SIMPLI Inspect is to help generate the necessary motion-aware parasitic capacitance contribution. SIMPLI Inspect can be used by either the MEMS or IC design teams, provided that the layout was originally created by SIMPLI.

MEMS Characterize lets you specify the number of points for extraction. The range of values are defined as part of the SIMPLI spec file and are saved together as part of the layout database. You

can identify the number of displacements either by the Linear Step Size or Number of Points. SIMPLI Inspect starts to move the floating part (saved as sub-instance) with respect to the fixed frame, and each time carry out the extraction using Cadence QRC Extraction.

MEMS Methodology Flows

The MEMS methodology is represented as three major flows. Each flow contains several executable scenarios.

MEMS Design Sub-flow

• Concept validation

• Functional verification

• Physical design

• Post-layout and sign-off

Figure 7: SIMPLI Inspect

MEMS IP Publishing and Importing

• MEMS IP publishing using SIMPLI

• MEMS IP importing using SIMPLI

Mixed-signal Design Sub-flow

• Concept validation

• Functional verification

• Full-chip assembly

• Post-layout and sign-off

• Full-chip co-optimization

VCAD Productivity Packages

VCAD Productivity Packages are a set of pre-packaged generic core solutions that increase design system productivity. Productivity Packages are available within services contracts, which include the package integration and maintenance of the customized solution. Cadence VCAD services targets the development, implementation, and ongoing improvement and mainte-nance of productive design systems to ensure short time to market and silicon success.

SIMPLI is available through Cadence VCAD Services. For more information, please contact:

Louis ThiamTel.: +49 89 4563 1957 E-mail: thiam@cadence.com

Ahmed Hussein Osman Tel.: +49 89 4563 1737 E-mail: ahmedo@cadence.com

Cadence Design Systems GmbH Mozartstrasse 2 85622 Feldkirchen Germany