NTUEE Electronics – L.H. Lu 7-1

CHAPTER 7 BUILDING BLOCKS OF INTEGRATED-CIRCUIT AMPLIFIERS

Chapter Outline7.1 IC Design Philosophy7.2 The Basic Gain Cell7.3 The Common-Gate and Common-Base Amplifiers7.4 The Cascode Amplifier7.5 IC Biasing7.6 Current-Mirror Circuits with Improved Performance

NTUEE Electronics – L.H. Lu 7-2

7.1 IC Design Philosophy

Integrated circuitsMore and more electronics circuits are integrated in a single chip More complicated functions Smaller size and lower cost Suitable for mass-production

Implementation cost depends on device area rather than device count Large/moderate-value resistors should be avoided Larger/moderate-value capacitors should be avoided Preferable to use transistors due to chip-area consideration

Design philosophyThe design philosophy for ICs is different from that of discrete-component circuits Realize as many of functions as possible by using transistors only Rely on device matching or size ratios for circuit design Active loads are typically used for amplifier designs

7.2 The Basic Gain Cell

The CS and CE amplifier with current-source loadsCurrent-source-load CS amplifier: Equivalent circuit

Intrinsic gain

Intrinsic gain is only 20 to 40 V/V for a MOSFET in a modern short-channel technologyFor a given technology (fixed nCox, VT and VA): larger A0 as L increasesFor a given transistor (fixed nCox, VT, VA, W and L): A0 increases as VOV and ID decreaseGain levels off at very low currents as the MOSFET enters the subthreshold region operation

where the drain current deviates from the saturation mode and becomes similar to a BJT with an exponential current-voltage characteristics

NTUEE Electronics – L.H. Lu 7-3

𝑅 = 𝑟

𝐴 = −𝑔 𝑟

𝑅 = ∞

𝑔 =𝐼

𝑉 /2= 2𝜇 𝐶 (𝑊/𝐿)𝐼

𝑟 =𝑉

𝐼=

𝑉 𝐿

𝐼

𝐴 ≡ 𝑔 𝑟 =𝑉

𝑉 /2=

2𝑉 𝐿

𝑉= 𝑉

2𝜇 𝐶 𝑊𝐿

𝐼

Output resistance of the current-source loadThe current source can be realized by using a PMOS in saturation The output resistance is no longer infinite due to channel-length modulation

Voltage gain of the CS amplifier with a current-source load

The voltage gain is reduced due to the finite output resistance of the current-source load The gain is reduced by half if Q1 has the same Early voltage as Q2 does (ro1 = ro2)

NTUEE Electronics – L.H. Lu 7-4

𝐼 =1

2𝜇 𝐶

𝑊

𝐿𝑉 − 𝑉 − |𝑉 |

𝑟 =|𝑉 |

𝐼

𝐴 ≡𝑣

𝑣= −𝑔 (𝑟 ||𝑟 )

Increasing the gain of the basic cellThe gain is proportional to the resistance at the outputIt can be effectively increased by raising the output resistance of the gain cellAdding a current buffer: Passes the current but raises the resistance level The only candidate is CG or CB amplifier Placing CG (or CB) on top of the CS (or CE) amplifying transistor is called cascoding

Gain enhancement: It is not sufficient to raise the output resistance of the amplifying transistor only A current buffer is also needed to raise the output resistance of the current-source load

NTUEE Electronics – L.H. Lu 7-5

NTUEE Electronics – L.H. Lu 7-6

Current-source-load CE amplifier: Equivalent circuit

Intrinsic gain

Maximum gain obtainable in a CE amplifier (assuming an ideal dc current source)Technology-determined parameterIndependent of the transistor junction area and the bias current for a given fabrication processVA ranges from 5 to 35 V for modern IC fabrication processVA ranges from 100 to 130 V for high-voltage processIntrinsic gain ranges from 200 to 5,000 V/V

𝑅 = 𝑟

𝐴 = −𝑔 𝑟

𝑅 = 𝑟

𝐴 = 𝑔 𝑟 =𝐼

𝑉

𝑉

𝐼=

𝑉

𝑉

7.3 The Common-Gate and Common-Base Amplifiers

NTUEE Electronics – L.H. Lu 7-7

The common-gate amplifierCircuit topology: The signal source is connected to the source (input) The load is connected to the drain (output)

Input resistance: The resistance looking into the source terminal A load resistance RL is specified at the output The input resistance is given by

Input resistance reduces to 1/gm if ro is infinite Input resistance depends on RL if ro cannot be neglected The load resistance is transformed to the input by

dividing it by the intrinsic gain of the MOSFET Input resistance is typically low for CG amplifiers

due to the impedance transformation property The CG amplifier can be used as a current buffer

𝑅 =𝑟 + 𝑅

1 + 𝑔 𝑟≈

1

𝑔+

𝑅

𝑔 𝑟

𝑔 𝑣 𝑔 𝑣 − 𝑖

→ 𝑅 ≡𝑣

𝑖=

𝑟 + 𝑅

1 + 𝑔 𝑟≈

1

𝑔+

𝑅

𝑔 𝑟

𝑣 + 𝑔 𝑣 − 𝑖 𝑟 = 𝑖 𝑅

NTUEE Electronics – L.H. Lu 7-8

𝑅 = 𝑔 𝑟 𝑅 + 𝑟 + 𝑅 ≈ 𝑔 𝑟 𝑅

𝑔 𝑖 𝑅

𝑔 𝑖 𝑅 + 𝑖

Output resistance: The resistance looking into the drain terminal A source resistance Rs is specified at the input The output resistance is given by

Output resistance also depends on source resistance Rs

CG amplifier transforms the source resistance Rs to the output by multiplying it by the intrinsic gain A0

The output resistance can be very large is if Rs is large; this is also an important characteristic of a current buffer

Properties of CG amplifier: CG has a unity current gain; a low input resistance; a high output resistance It makes for an excellent current buffer Suitable for gain enhancement for the gain cell Impedance transformation properties can be used for

analysis of the cascode amplifier

→ 𝑅 ≡𝑣

𝑖=

𝑟 + 𝑅

1 + 𝑔 𝑟≈

1

𝑔+

𝑅

𝑔 𝑟

𝑣 = 𝑖 𝑅 + 𝑔 𝑖 𝑅 + 𝑖 𝑟

NTUEE Electronics – L.H. Lu 7-9

The common-base amplifierCircuit topology: The signal source is connected to the emitter (input) The load is connected to the collector (output)

Input resistance: The resistance looking into the emitter terminal A load resistance RL is specified at the output The input resistance is given by

Rin reduces to re if ro is infinite If ro cannot be neglectedRin = re for RL = 0Rin = re(+1) = r for RL = Rin re+RL/(gmro) for RL << (+1)ro

𝑅 ≈ 𝑟𝑟 + 𝑅

𝑟 + 𝑅 /(𝛽 + 1)

ix-vx/re

𝑔 𝑣

𝑣 /𝑟

𝑣 /𝑟

𝑖 − 𝑣 /𝑟 + 𝑔 𝑣

𝑖 − 𝑣 /𝑟

→ 𝑅 =𝑟 + 𝑅

1 +𝑟𝑟

+𝑅

(𝛽 + 1)𝑟

≈ 𝑟𝑟 + 𝑅

𝑟 +𝑅

𝛽 + 1

𝑖 −𝑣

𝑟+ 𝑔 𝑣 𝑅 + 𝑖 −

𝑣

𝑟𝑟 = 𝑣

NTUEE Electronics – L.H. Lu 7-10

Output resistance: The resistance looking into the collector terminal A source resistance Re is specified at the input The output resistance is given by

Similar to CG as r and Re are considered in parallel Output resistance also depends on source resistance Re

CB has an important impedance transformationproperty that raises the output resistance

Unlike CG, the output resistance of the CB circuithas an absolute maximum value as Re becomes infinite:

Properties of CB amplifier: CB has a low input resistance; a high output resistance It makes for an excellent current buffer Suitable for gain enhancement for the gain cell Impedance transformation properties can be used for

analysis of the cascode amplifier

𝑅 = 𝑔 𝑟 (𝑅 ||𝑟 ) + 𝑟 + 𝑅 ||𝑟 ≈ 𝑔 𝑟 (𝑅 | 𝑟 + 𝑟

𝑅 | = 𝑟 (𝛽 + 1)→ 𝑅 = 𝑔 𝑟 (𝑅 ||𝑟 ) + 𝑟 + 𝑅 ||𝑟

𝑣 = 𝑖 + 𝑣 /𝑟 𝑅 + (𝑖 − 𝑔 𝑣 )𝑟

𝑣 = − 𝑖 + 𝑣 /𝑟 𝑅

≈ 𝑔 𝑟 (𝑅 ||𝑟 ) + 𝑟

7.4 Cascode Amplifier

The MOS cascodeCircuit topology: Putting a CG (Q2: cascode transistor) on top of

CS (Q1: amplifying transistor) The cascode transistor passes the small-signal

current gm1vi to the output node while raising the resistance level by a factor of K

Small-signal analysis Transconductance: Gm gm1

NTUEE Electronics – L.H. Lu 7-11

𝑣

𝑔 𝑣

𝑔 𝑣

𝑣 /𝑟

𝑣 /𝑟

𝑣

𝑖

→ 𝐺 ≡𝑖

𝑣= 𝑔

𝑔 + 𝑟

𝑔 + 𝑟 + 𝑟≈ 𝑔

𝑔 𝑣 + 𝑣 /𝑟 + 𝑔 𝑣 + 𝑣 /𝑟 = 0

𝑖 + 𝑔 𝑣 + 𝑣 /𝑟 = 0

NTUEE Electronics – L.H. Lu 7-12

Output resistance: Ro gm2ro2ro1 = A02ro1

Voltage gain of the cascode amplifier With an ideal current source:Equivalent to infinite load resistanceAvo = –GmRo = –gm1ro1gm2ro2 = –A01A02

With a load resistance (RL << Ro):Av = –Gm(Ro||RL) –gm1RL

With a PMOS current source load:Av = –Gm(Ro||ro3) –gm1ro3

→ 𝑅 ≡𝑣

𝑖=

𝑔 𝑔 +1

𝑟+

1𝑟

𝑔 +1

𝑟+

1𝑟

1𝑟

− 𝑔 +1

𝑟1

𝑟

𝑔 𝑣 + 𝑣 /𝑟 = (𝑣 − 𝑣 )/𝑟

𝑖 + 𝑔 𝑣 = (𝑣 −𝑣 )/𝑟

≈ 𝑔 𝑟 𝑟 + 𝑟 + 𝑟

𝑔 𝑣

𝑣

𝑖

𝑖

(𝑣 − 𝑣 )/𝑟

The cascode amplifier with a cascode current-source load The DC voltage sources VDD, VG2, VG3, and VG4 are considered ground for ac analysis The cascode stage (Q1-Q2) is modeled by Gm and Ro

Gm = gm1 and Ro = Ron gm2ro2ro1

The output resistance of the cascode current-source load:RL = Rop = gm3ro3ro4+ro3+ro4 gm3ro3ro4

The voltage gain: Av = –Gm(Ro||RL) = –gm1(gm2ro2ro1||gm3ro3ro4) Assume gm1 = gm2 = gm3 = gm4 = gm and ro1 = ro2 = ro3 = ro4 = ro: Av = (gmro)2/2 = (Ao)2/2

NTUEE Electronics – L.H. Lu 7-13

Distribution of voltage gain in a cascode amplifierThe input resistance of the common-gate transistor:

The cascode amplifier gain can be characterized as Av = (vo1/vi)(vo/vo1) = Av1Av2 –gm1(gm2ro2ro1||RL) Av1 (voltage gain from vi to vo1) = vo1/vi = –gm1(ro1||Rin2) Av2 (voltage gain from vo1 to vo) = Av/Av1

NTUEE Electronics – L.H. Lu 7-14

Q2

𝑅 =𝑟 + 𝑅

1 + 𝑔 𝑟≈

1

𝑔+

𝑅

𝑔 𝑟

Summary table of gain distribution with small-signal parameters gm and ro

NTUEE Electronics – L.H. Lu 7-15

Double cascodingEven higher output resistance can be achieved in MOSFET circuits by double cascodingRequires higher supply voltage as one more CG transistor is stacked in the gain stageDouble cascoding is typically required for the current-source load to boost the voltage gainDouble cascode stage is modeled by Gm = gm1

Ro = gm3ro3gm2ro2ro1 (A0)2ro1

NTUEE Electronics – L.H. Lu 7-16

gm1 gm2ro2ro1

Gm = gm1Ro = gm3ro3(gm2ro2ro1)

Gm Ro

The folded cascodeFolded cascode utilizes a PMOS as the cascode transistorThe dc current of Q2 is I2 and the current of Q1 is (I1 I2)The voltage limitation due to stacking of NMOS transistors can be alleviatedSmall-signal operation is similar to the case of NMOS cascode

NTUEE Electronics – L.H. Lu 7-17

The BJT cascodeThe BJT cascode consists of CE and CB transistor in stack The BJT cascode modeled by Rin, Gm and Ro

Input resistance: Rin = r1

Transconductance: Gm gm1

NTUEE Electronics – L.H. Lu 7-18

v1/ro2

𝑣 /𝑟 𝑔 𝑣

𝑣 /𝑟

𝑣 /𝑟𝑔 𝑣

𝑖

𝑣𝑣

→ 𝐺 ≡𝑖

𝑣= 𝑔

𝑔 + 𝑟

𝑔 + 𝑟 + 𝑟 + 𝑟≈ 𝑔

𝑔 𝑣 + 𝑣 /𝑟 + 𝑣 /𝑟 + 𝑔 𝑣 + 𝑣 /𝑟 =0

𝑖 + 𝑔 𝑣 +𝑣 /𝑟 =0

Output resistance: Ro = ro2+(ro1||r2)+gm2ro2(ro1||r2) gm2r2ro2 = 2ro2

Double cascoding is not useful for BJT circuits (Ro won’t be further raised by double cascoding)

Open-circuit voltage gain: Avo = –GmRo –gm1(gm2ro2)(ro1||r2)For gm1 = gm2 = gm and ro1 = ro2 = ro: Avo = –GmRo = –gm(gmro)(ro||r) = – (gmro) = – Ao

NTUEE Electronics – L.H. Lu 7-19

Similar to MOS case with ro1||r2

𝑔 𝑣

𝑣

𝑣 /𝑟

𝑣 /𝑟

(𝑣 − 𝑣 )/𝑟

𝑣

𝑖

NTUEE Electronics – L.H. Lu 7-20

The BJT cascode amplifier with a cascode current-source load DC voltage sources VCC, VB2, VB3, and VB4 are considered

ground for ac analysis The cascode stage (Q1-Q2) is modeled by Gm and Ro

Gm = gm1 and Ro = Ron gm2r2ro2 = 2ro2

The output resistance of the cascode current-source load:RL = Rop gm3r3ro3 = 3ro3

The voltage gain: Av = –Gm(Ro||RL) = –gm1(2ro2|| 3ro3) Assume gm, and ro are identical, Av = – gmro/2 = – Ao/2

Distribution of voltage gain in a cascode amplifierThe input resistance of the common-gate transistor: Rin2 = re2(ro2+ RL)/[ro2+ RL/( +1)]

The cascode amplifier gain can be characterized as Av = (vo1/vi)(vo/vo1) = Av1Av2 –gm1(2ro2||RL) Av1 (voltage gain from vi to vo1) = vo1/vi = –gm1(ro1||Rin2) Av2 (voltage gain from vo1 to vo) = Av/Av1

Double cascodingNo significant increase in Ro by using double cascodeNot a useful technique to boost gain for BJT circuits

7.5 IC Biasing

Current source for IC biasingWidely used technique for ICs with good device matchingCan be implemented in MOS and BJT circuitsNonideal effect due to finite output resistance

Basic MOSFET current sourceMOSFET current mirror Widely used for ICs with good device matching Q1 and Q2 are identical and in saturation:

Current gain or current transfer ratio:

Effect of VO on IO

Current mismatch due to channel-length modulation

NTUEE Electronics – L.H. Lu 7-21

𝐼 = 𝐼 =1

2𝑘

𝑊

𝐿𝑉 − 𝑉 =

𝑉 − 𝑉

𝑅

𝐼 = 𝐼 = 𝐼 = 𝐼

𝐼

𝐼=

(𝑊/𝐿)

(𝑊/𝐿)

𝐼 =(𝑊/𝐿)

(𝑊/𝐿)𝐼 1 +

𝑉 − 𝑉

𝑉

MOS current-steering circuitsCurrent sink: pulls a dc current from a circuitCurrent source: pushes a dc current into a circuitAll transistors should be operated in saturationCurrent mismatch exists for a finite VA (channel-length modulation)

NTUEE Electronics – L.H. Lu 7-22

Basic BJT current mirrorThe case of infinite : Current is proportional to the area of EB junction

The case of finite : Q1 and Q2 identical:

Current transfer ratio m (with infinite output resistance):

Current transfer ration m (with finite output resistance):

NTUEE Electronics – L.H. Lu 7-23

𝐼

𝐼=

𝐼

𝐼=

𝐴

𝐴

𝐼

𝐼=

𝑚

1 +𝑚 + 1

𝛽

1 +𝑉 − 𝑉

𝑉

𝐼

𝐼=

𝑚

1 +𝑚 + 1

𝛽

𝐼

𝐼=

1

1 +2𝛽

BJT current steeringProvides current source and current sink by using BJT devices

NTUEE Electronics – L.H. Lu 7-24

𝐼 =𝑉 + 𝑉 − 𝑉 − 𝑉

𝑅

𝐼 =1

1 +4

𝛽

𝐼

𝐼 =1

1 +5

𝛽

𝐼

𝐼 =2

1 +4

𝛽

𝐼

𝐼 =3

1 +5

𝛽

𝐼

7.6 Current-Mirror Circuits with Improved Performance

The constant-current sourceUsed both in biasing and as active loadPerformance improvement of current mirrors The accuracy of the current transfer ratio of the current mirror (BJT) The output resistance of the current source (BJT and MOS)

Cascode MOS current mirrorsThe output resistance is raised by a factor of gm3ro3 (the intrinsic gain of the cascode transistor)The minimum voltage at the output of the current source is Vt+2VOV (VOV for basic current source)

NTUEE Electronics – L.H. Lu 7-25

A bipolar mirror with base-current compensationBase-current compensation by an additional transistor Q3

The current transfer ratio is much less dependent on

Current transfer ratio m:

Output resistance

The minimum voltage at the output:

Cascode BJT current mirrorThe current transfer ratio is not improved by cascoding

Output resistance is boosted by cascoding

The minimum voltage at the output:

NTUEE Electronics – L.H. Lu 7-26

𝐼

𝐼=

1

1 +2

𝛽(𝛽 + 1)

≈1

1 +2

𝛽

𝐼

𝐼=

𝑚

1 +𝑚 + 1

𝛽(𝛽 + 1)

≈𝑚

1 +𝑚 + 1

𝛽

𝑅 ≈ 𝑟

𝑉 ≥ 𝑉 ≈ 0.2V

𝐼 /𝐼 ≈ 1/(1 + 2/𝛽)

𝑅 ≈ 𝛽𝑟

𝑉 ≥ 𝑉 + 𝑉 ≈ 0.9V

𝐼

𝐼

𝛼

𝐼

𝛼 1 +

2

𝛽

𝐼

𝛼 1 +

2

𝛽+

𝐼

𝛽

NTUEE Electronics – L.H. Lu 7-27

The Wilson current mirrorImproving the current transfer ratio and output resistanceThe current transfer ratio:

Output resistance:

The minimum voltage at the output:

Comparison with cascode current mirror Reduced -dependence for the current transfer ratio Output resistance is approximately reduced by half Similar voltage headroom needed at output

𝐼

𝐼=

𝐼 1 +2𝛽

𝛽𝛽 + 1

𝐼 1 + 1 +2𝛽

𝛽𝛽 + 1

=1

1 +2

𝛽(𝛽 + 2)

≈1

1 +2

𝛽

𝑅 ≡𝑣

𝑖=

𝛽

2+ 1 𝑟 +

𝑟

2≈

1

2𝛽 𝑟

𝑉 ≥ 𝑉 + 𝑉 ≈ 0.9V

𝑖 /2

𝑖 /2 𝑖 /2

𝛽 /2 + 1 𝑖

𝛽 𝑖 /2

𝑟 𝑖 /2

𝑟

𝑣𝑅

𝑖

NTUEE Electronics – L.H. Lu 7-28

The Wilson MOS mirrorSimilar to the bipolar Wilson mirrorOutput resistance:

The minimum voltage at the output:

Significant difference in VDS leads to drain current mismatch between Q1 and Q2

Modified circuit by adding Q4 to avoid current error

𝑅 = 𝑔 𝑟 𝑟 + 𝑟 + 1/𝑔 ≈ 𝑔 𝑟 𝑟

𝑉 ≥ 𝑉 + 2𝑉

𝑖

𝑣

𝑅

𝑖 𝑖

𝑖

≈ 𝑖

𝑖 /𝑔

1/𝑔

𝑔 (𝑖 𝑟 ) + 𝑖

≈ 𝑔 (−𝑖 𝑟 )

−𝑖 𝑟

The Widlar current sourceAllows the generation of a small constant current using relatively small resistorsAdvantageous in considerable savings in chip area for integrated circuitsCircuit performance Output current:

Output resistance:

NTUEE Electronics – L.H. Lu 7-29

𝑉 = 𝑉 𝑙𝑛𝐼

𝐼

𝑉 = 𝑉 𝑙𝑛𝐼

𝐼

𝑉 − 𝑉 = 𝑉 𝑙𝑛 = 𝐼 𝑅

→ 𝑅 =𝑉

𝐼𝑙𝑛

𝐼

𝐼

→ 𝐼 =𝑉

𝑅𝑙𝑛

𝐼

𝐼

𝑅 ≈ 1 + 𝑔 (𝑅 | 𝑟 𝑟