50 Part I Semiconductor Devices and Basic Applications

Power transformer

- f- ­,- ­

Diode rectifier

Filter

~

LOAD

c---"

+

AC voltage source

Voltage regulator

- f- ­~

Figure 2.1 Block diagram of an electronic power supply

power source. We will use the piecewise linear approach to analyze this circuit, assuming that the diode forward resistance rf = 0 when the diode is "on."

Figure 2.2(b) shows the voltage transfer characteristics, Vo versus v I, for the circuit. For VI < 0, the diode is reverse biased, which means that the current is zero and the output voltage is zero. As long as VI < Vy , the diode will be nonconducting, so the output voltage will remain zero. When VI > Vr the diode becomes forward biased and a current is induced in the circuit. In this case, we can write

. tv =

VI -R

Vy (2.1(a) )

and

Vo = ivR = VI - Vy (2.1(b»

For VI > V the slope of the transfer curve is 1.y ,

1'0

+ "v -

+

R

(a) (b)

Figure 2.2 Diode in series with ac power source: (a) circuit and (b) voltage transfer characteristics

If VI is a sinusoidal signal, as shown in Figure 2.3(a), the output voltage can be found using the voltage transfer curve in Figure 2.2(b). For VI :::; V. the output voltage is zero; for VI > Vy , the output is given by Equation (2.1(b)), or

Vo = VI - Vy

and is shown in Figure 2.3(b). We can see that while the input signal ('I

alternates polarity and has a time-average value of zero, the output voltage Vo is unidirectional and has an average value that is not zero. The input signal is therefore rectified. Also, since the output voltage appears only during the positive cycle of the input signal, the circuit is called a half-wave rectifier.

55 Chapter 2 Diode Circuits

N I :Nz 3 5

• + + •

vI Vs 2 Ivsl

0 +4

(a) (b)

v

2T t

(c)

Figure 2.7 A full-wave bridge rectifier (a) circuit showing the current direction for a positive inputcycle, (b) current direction for a negative input cycle, and (c) input and output voltage waveforms

\'0 is as shown in Figure 2.7(a). During the negative half-cycle of the input voltage. Vs is negative, and D 3 and D 4 are forward biased. The direction of the current, shown in Figure 2.7(b), produces the same output voltage polarity as before.

Figure 2.7(c) shows the sinusoidal voltage Vs and the rectified output voltage \'0' Because two diodes are in series in the conduction path, the magnitude of Vo is two diode drops less than the magnitude of vs.

Example 2.2 Objective: Compare voltages and the transformer turns ratio in two full-wave rectifier circuits.

Consider the rectifier circuits shown in Figures 2.6(a) and 2.7(a). Assume the input voltage is from a 120 V (rms), 60 Hz ac source. The desired peak output voltage II) is 9 V. and the diode cut-in voltage is assumed to be V, = 0.7 V.

Solution: For the center-tapped transformer circuit shown in Figure 2.6(a), a peak voltage of I'ot max) = 9 V means that the peak value of vs is

Is(max) = va(max) + V, = 9 + 0.7 = 9.7 V

For a sinusoidal signal, this produces a rms value of

9.7 I'S.frm = ----;= = 6,86 V

\/2

The: turn, ratio of the primary to each secondary winding must then be

\ 1"')():"""':'=---=17') .\"~ 6,86 ..

For the bridge circuit shown in Figure 2.7(a), a peak voltage of va (max) = 9 V means that the peak value of vs is

vs(max) = va(max) + 2V, = 9 + 2(0.7) = 10.4 V

Chapter 2 Diode Circu its 55

N] N2 3

• + + •

v/ Vs 2 IVsI

0 + 4

(a) (b)

2T I

(c)

Figure 2.7 A full-wave bridge rectifier (a) circuit showing the current direction for a positive input cycle , (b) current direction for a negative input cycle, and (c) input and outp ut voltag e waveforms

\' 0 is as shown in Figure 2.7(a) . During th e negative half-cycle of the input volt age. Vs is negative, and D 3 and D 4 a re forward biased. The direction of the current, shown in Figure 2.7(b) , produces the same output volt age polarity as before .

Figure 2.7(c) shows the sinusoida l voltage Vs and the rect ified output vol tage \ ' 0' Because two diodes ar e in se ries in th e conduction path . th e magnitude of Vo is two diod e drops less than the ma gnitude of vs.

Example 2.2 Objective: Co m pare vo ltages and th e tran sformer turn s ratio in two full-wave recti fier c ircuits.

Consider th e rectifier circ uits shown in Figures 2.6(a) and 2.7(a ). Assume th e input voltage is fro m a 120 V (rms), 60 Hz ac so u rce . T he desired peak ou tput vo ltage I ' f) is 9 V. an d the di od e cut -in vo ltage is ass umed to be V, = 0.7 V.

Solution: For th e ce n te r-tappe d transformer circuit sho wn in Figure 2.6(a ) , a peak voltage of ,'o ( max) = 9 V me an s that the peak value o f vs is

I's( max) = vo( max) + V, = 9 + 0 .7 = 9.7 V

For a sinuso ida l sig na l. this pr oduces a rm s value of

I Sf ", ' = = 6.86 V 9;\' 2

T he tu rn s ra t io o f th e primary to each seco nda ry windin g mu st th en be

\ 1::'0<== 6.86 = 17.5

For th e bridge circuit sho w n in Figure 2 .7( a) , a pe ak vo ltage of vo( max) = 9 V mean s that th e pe ak value of vs is

vs(max) = vo( max) + 2V, = 9 + 2(0.7) = lOA V

57 Chapter 2 Diode Circuits

v, Vo

-, -, \ I \ I \

\ I \ I \ \ I \ I \

T'

Figure 2.9 Output voltage of a full-wave rectifier with an RC filter

Th e smallest output voltage is

V = VM e-TIRC (2.3)L

where T' is the discharge time, as indicated in the figure . Th e ripple voltage V, is defined as the difference between V~l and V L .

and is determined by

Vr = VM - VL = V <\.f(J - e- T ' IRC) (2.4)

Normally, we will want the di scharge time T' to be sm all compared to the time constant , or T' ~ RC. Expanding the exponential in a se ries and keeping only the linear terms of th at expansion, we hav e th e approximation

T' e- r 'IRC == 1 - ­ (2.5)

RC

Th e ripple voltage can now be written as

V-V (T) (2.6)r = ,l/ RC

Since the discharge time T' depends on the RC time constant, Equat ion (2,6) is difficult to solve . However , if the ripple e ffect is sm all. then as an approximation. we can let T' = T", so that

v == (2.7),\1II. (!'L)RC

where T; is the tim e between peak values of the o u tput voltage . For a full­wave rectifier, T; is one-half the signal period . Therefore. we can relate T to the signal frequency, "

1 f =2 T

p

The ripple voltage is then

V =~ (2.8) r 2f Re

For a half-wave rectifier, the time Tp corresponds to a full period (not a half period) of the signa l, so the factor 2 does not appear in Equ ation (2.8).

Equation (2.8) can be used to determine the ca pacito r value required for a particular ripple voltage .

69 Chapter 2 Diode Circuits

D2.7 Design a parallel-b ased clipper that will yield the volt age transfer fun ct ion shown in Figure 2.25 . Assume diode cut-in voltages o f V = 0.7 V. (A ns. Using Figurer 2.20(a) , V2 = 4.3 V, VI = 1.8 V, and R1 = 2 R2 )

2.8 Repeat Example 2.6 if the dir ection of the diode is reversed . (Ans. Output is a square wave between - 2 V and +6 V)

2.9 Determine the ste ady-sta te output volt age Vo for the circu it shown in Figure 2.26(a ), if the input is as sho wn in Figure 2.26(b). Assum e the diod e cut- in voltage is Vy = O. (A ns. Output is a squa re wave between + 5 V and +35 V )

+ 10 T= I ms-j

Of--+--+----i­- -+----+-­ -+­- - -­

+

C= I/lF

+-----1[--;----------0

+ VB =5 v czz:

- 20

(a) (b)

Figure 2.26 Figure for Exercise 2.9

2.3 ZENER DIODE CIRCUITS

In Ch apter 1, we saw that the br eakdown volt age of a Zene r diode was nearl y consta nt over a wide ran ge of reverse-bias currents . T his mak es th e Zen er diod e useful in a voltage regulator, or a constant-voltage reference circuit. In this chapter, we will look a t an ideal voltage reference circui t, and the e ffects of including a non ideal Zener resistance.

2.3.1 Ideal Voltage Reference Circuit

Figure 2.27 sho ws a Zener vo ltag e regulat or circuit. For thi s circ uit , the o utp ut voltage should remain constant, eve n when th e output load resistance varies ove r a fairl y wide ran ge , and when the input vo ltage va ries over a specific range .

R,

+

Figure 2.27 A Zener diode voltage regulator circuit

We determine , initially, the proper input resistance Ri . T he resistance R, limit s the current through the Zene r d iode and drops the "excess" voltage

71 Chapter 2 Diode Circuits

Design Example 2.7 Objective: D esign a volt age reg ula tor, usin g th e ci rcuit show n in Figure 2.27 .

Ass ume th at th e Zen e r diode has a break down vo ltage of Vz = 10 Y, th e pow er supply is in th e range 20 :S V ps :S 24 Y, and the load res istance va ries fro m 100 to 500 n. D ete rm ine R, a nd the re qu ire d pow e r ra ting of the Zen e r diode .

Solution : T he maximum a nd m inimum lo ad cur ren ts are

Vz 10 Idmax ) = R d mi n) = Q.1 = 100 rnA

and

. V z 10 Idm tn ) = = -=20mA

R d m ax ) 0.5

Using E qu at ion (2 .27) , th e ma ximum Zene r diode curre nt is

1_( .) = (100) ' [24 - 10] - (20)' [20 -10] = 140 A z ma x 20 _ 0.9(10) _ 0. 1(24) m

T he maximum pow er dissipa tio n in the Z en er diode is

P z (m ax) = Iz (m ax ) V z = (0.14)(10) = 1.4 W

Fro m E q ua tion (2 25(b)), the va lue o f th e inp ut re sist ance R, is

R, = Vps( m ax) - V z = 24 - 10 =) 87 .5 n Iz (m ax ) + Id mtn ) 140 + 20

Comment: By co nsideri ng various co mbina tio ns of V ps and R L , we ca n determine that the diode cu rre nt rem a ins wi thin the ran ge of 14 :S l z :S 140 m A , o r O.lIz (max) :S

Iz :S Iz (m ax ). as th e des ign specified .

2.3.2 Zener Resistance and Percent Regulation

In the ideal Ze ne r diode, the Z ener resist ance is zero. In actu al Zener diodes, however. this is not the case. The result is that the o utp ut voltage is a func tion of the Zen er d iod e cu rre nt or the load curre nt.

Figure 2.28 sh ows the equ ivalent circui t of the vol tage regulator in Figur e 2.27. Becau se of the Zene r res istance, th e output voltage will not remain consta nt. We ca n de termine the minimum a nd maximum values of o utput voltage . A figure of me rit fo r a vol tage reg ula to r is called the percent regula-

R,

+ I ,

+

t Id \ PS -=- Vz vLI z ~ RLrz

~

Figure 2.28 A Zene r diode voltage regulator circuit with a nonzero Zener resistance

84 Part I Semiconductor Devices and Basic Appl ications

2.2 For th e circu it shown in Figure P2.2, show that for 1', :2: O. th e output vo ltage + D +

is a pproxi ma te ly give n by R Vo

Va = v i : VTln (~~ ) 2.3 Assume th e input to the circuit shown in Figure P2.2 is a triangular wave of

Figure P2.2 20 V peak-t o-p eak amplitude with a zer o tim e-aver age valu e. Le t R = 1 kfl and ass ume piecew ise linear diode param et ers of Vy = 0.6 V and r f = 20 fl . Sketch th e output voltage versus tim e ove r on e cycle and label all appropr iate voltages.

02.4 Th e input signa l voltage to th e full-wave rectifier circ uit show n in Figure 2.7(a) in th e tex t is 1', = 160 sin[2rr(60)1] V. Assume Vy = 0.7 V for each d iod e. Det ermine the required turns ratio of the transformer to produce a peak output volt age of (a) 25 V. and (b) 100 v. 02.5 T he o utput res ista nce of the full-wave rec t ifier shown in Figure 2.7(a) in the text is R = 150 fl. A filter ca pacitor is connected in par allel with R. As sume Vy = 0.7 V. Th e peak out put volt age is to be 24 V and the rip ple volt age is to be no mor e than 0.5 V. T he input frequ en cy is 60 Hz. (a) Det ermine the required rms va lue of I's . (b) De termine the require d filte r capacitance value . (c) Determine the peak current th rough each diode.

02.6 Rep eat Problem 2.5 fo r a half- wave rectifi er ; th at is D3 and D4 a re e limina ted from th e circuit show n in Figure 2.7(a)

2.7 Th e circuit shown in Fig ure P2.7 is a co mpleme nta ry output recti fie r. If I' s =

26 sin[2rr(60)1] V, ske tch the outp ut waveforms v; a nd v; vers us time , ass uming Vy = 0.6 V for each diod e .

Figure P2.7

02.8 Assume that eq ua l filter ca pac ito rs are co nnec ted in para lle l with each load resis to r R in the circuit described in Problem 2.7. If R = 100 fl and the ripp le vo ltage is to be no more th an V, = ] V, determine th e value of C required.

*02.9 A full-wave rectifie r and an input volt age are shown in F igure P2.9. T he cut­in voltage of ea ch d iode is Vy = 0.6 V. (a) Sketch the output volt age vers us time. (b) T he ave rage pow er d issipa te d in RL is to be PL = ]0 0 rnW. Det ermine the correct valu e of R L .

+;~h +

I »--~- " o:rv r.

.. I/o

J• + ,. R s

~ • +

I' R,

,.­0

Figure P2 .9

85 Chapter 2 Diode Circuits

*2.10 Sket ch Va ve rs us time fo r th e ci rcui t give n In Fig ure n. lO wit h the inp ut show n. A ssume V y = O.

+'

+40

~ Vi

-40

Figure P2 .10

*2.11 (a) Ske tch Va ve rsus time fo r th e circui t show n in Figu re P2.l l. The input is a sine wave give n by Vi = 10 sinwt V. Assume V y = O. (b) Det e rm ine th e rms val ue of th e o utp ut vo ltage.

Section 2.2 Clipper and Clam per Circuits

2.12 (a) Co nsider th e circui t s hown in Figu re P2.12 a nd ass ume Vy = O. Ske tch the ou tput vo ltage ve rsus tim e if th e inp ut is a sine wave wi th a pea k valu e of 10 V. (b) Re peat part (a) if Vy = 0.7 V.

I H2

R = I kO

2knI kO ,.-'l/v'Vlr--4--'WV\r-- + 15 V

+SV

Figure P2 .12 Figure P2 .13

2.13 Fo r th e ci rcui t shown in Figure P2 .13, p lo t V a ve rsus VI for 0 s VI S IS V. Ass ume V, = 0.7 V. Ind icat e a ll b rea kpoints .

2.14 A ssume Vy = 0.6 V for the diode in th e circuit give n in Fig ur e P2.l 4. Ske tch V o a nd i o versu s t ime if VI = 5 s i n w l V.

*2.15 The d iode s hown in the circ uit o f Figure P2 .15( a) has piecewise line ar pa rame ­ters v, = 0.7 V a nd Tf = 10 D. (a) Plo t Va versus VI for -30 .s VI S 30 V. (b) If th e trian gul a r wave . show n in Figu re P2. 15( b) , is applied, plot th e o ut put vers us t ime .

R = 100n 30 V

"~" \ I

\-=- 10 V

I ­(a)

Figure P2.15

+

Figure P2.11

(b)

+ I 'U - R = 2.2 U2

"/~

;: ---l + 1 0 -==-- :2 V

I Figure P2.14