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Elements for Mass Acceptance
Innovatng! Together.Bob Ledzius April 5, 2018
SIMPLE
ACCESSIBLE
SCALABLE
More Complex Than Ever!
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500 000 000
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3 500 000 000
Transistor Count (for largest MPUs & GPUs)
Productvity Gap Afects all designs!
Design Productvity IP reuse required!
System Design Automaton
Innovatng! Together.Bob Ledzius April 5, 2018
Contnued Complexity
New IPRequests
Non-Critcal Path IP Development
IP ImportsC / C++ / RTLVerifcatio
SoC DesignIntegraton
ParameterizedIP Desigo
PritectedFuoctioalIP Shariog
Ultra-HighIP Reuse
CustimizedParameters
non-critcal path
No-Touch!Integraton
Ready
Innovatng! Together.Bob Ledzius April 5, 2018
New IPRequests
IP ImportsC / C++ / RTLVerifcatio
SoC DesignIntegraton
ParameterizedIP Desigo
PritectedFuoctioalIP Shariog
Ultra-HighIP Reuse
CustimizedParameters
non-critcal path
ZERO EFFORTAutomaton
On-Demand!
Design&
Test BenchGeneraton
Automated Critcal Path Design
• Methids if Operatio• Architecture Tipiligy• Tiils
REQUIRES:
Innovatng! Together.Bob Ledzius April 5, 2018
New IPRequests
Integrated Simulaton Environment
IP ImportsC / C++ / RTLVerifcatio
SoC DesignIntegraton
Inherited IP andSoC DesignVerifcaton
ParameterOptmizaton
ParameterizedIP Desigo
PritectedFuoctioalIP Shariog
SyothesizableFull-Chip RTL
Expirt
Ultra-HighIP Reuse
CustimizedParameters
non-critcal path
automatedcritcal path
Innovatng! Together.Bob Ledzius April 5, 2018
How Simple?
• Orchestrate designs by just adding IP and auto building simulaton ready RTL design with test bench.
• Not simply IP sttching. Designs built upon a highly flexible and configurable method o operaton and efcient architecture.
• Designs may be simply tuned by defining configuraton setngs and limitng flexibility as desired.
• IP wrappers translate IP to SDA method o operaton.
• Integrated compiled simulaton engine allows or inherited IP scripts or veri ying IP in it’s integrated orm.
• Automatc user guide documentaton.
Innovatng! Together.Bob Ledzius April 5, 2018
How Simple?
• Integrated compiled simulaton engine allows or inherited IP scripts or veri ying IP in it’s integrated orm.
• Inherited oundaton and IP specific tasks or aiding system simulaton and UVM build environments
• Interactve TCL based scriptng environment.
• C/C++ model capable
Innovatng! Together.Bob Ledzius April 5, 2018
How Accessible?
• Web secure accessible – no sofware installs!
• ORCHESTRATE SoC Developer – ull hands-of SoC/FPGA design rom PLAYERS IP library elements.
• AUDITION IP Developer – IP specificaton and import o IP and IP test benches.
• REHEARSE Simulaton – interactve and TCL script based simulaton environment
• All SDA accomplished server side
• IP source code protected untl export.
• Controlled IP and SoC design sharing.
• SDA ecosystem available to all project stakeholders.Concertal Site Servers
IP CM Repositories
Concertal Players, Auditon, Orchestrate,
and Rehearse
Innovatng! Together.Bob Ledzius April 5, 2018
SDA Value Propositon
• SIMPLIFY AND ACCELERATE• UNIQUELY COMPLIMENTARY• STRONGER TOGETHER• CONSISTENT QUALITY• EXPERIENCED EXPERTS
Innovatng! Together.Bob Ledzius April 5, 2018
IP Reuse for the Masses!
Automated ront-endSoC/FPGA designthrough IP reuse
Secure web-basedaccessibility or IP providersand SoC/FPGA developers
Scalable in rastructureand community
Innovatng! Together.Bob Ledzius April 5, 2018
THANK YOU!Q & A
Innovatng! Together.
