1

Beam Secondary Shower Acquisition System: ICECAL Board design, Preliminary Pictures

Student MeetingJose Luis Sirvent

PhD. Student07/07/2014

1.Board ConceptFront-end Acquisiton Board for Secondaries (FABS)

2

POW

ER S

TAG

E

VTRX

IGLO

O2

Dev

.Kit

GPI

O H

eade

r

Power Connector

ADCADS5272

SMA

TX_P

SMA

TX_N

SMA

RX_P

SMA

RX_N

ICECALCH_1

ICEC

ALCH

_2P

ICEC

ALCH

_2N

Gen

era

IN_1

Gen

era

IN2

Single to

Differential

Single to

Differential

ICECALCH_2

Clock Conditioning

ICEC

ALCH

_1P

ICEC

ALCH

_1N

ICEC

AL I_

Bias

Circ

uits

3

LHC_PIPELHC_PIPE BWS

pCVD

SCIN

TILL

ATO

RPM

T

Splitt

er

Power Adapters

2.Why we do this?Development of first prototype for proof-of-concept evaluation

3. Our Resources for this board:Original ICECAL_V2 Test-Board schematics • I’ve been in contact with ICECAL’s main designers: Eduardo Picatoste & David Gascón• ICECAL is a serious candidate to our system since is the natural evolution of the Readout ASIC we´re using now in the surface.• The designers kindly provided 2 x ICECAL_V2 samples, schematics of their test board and many useful advices. (Thanks guys!)• Version 2 1 Channel, no multiplexer, no I_Bias Cirquits, no ADC Driver, no Delay line, but useful for our prototype.• Version 3 4 Channels with everything included (Smaller test board needed). Soon under evaluation.

• The task I’m carrying out: I’ll modify their test board to our needs.

• Lars also provided the schematics of his VTRX adapter module (Custom SFP-HSMC Adapter Board) https://indico.cern.ch/event/284352/

5

4. A quick look at some modifications

6

4. A quick look at some modifications

7

4. A quick look at some modifications

8

4. A quick look at some modifications

9

ICECAL_CH2

ADC

2X Single to DifferentialI_Bi

as C

ircui

t

5. Routing Status so far:(A general overview)

Linear Regulators Bank

10

5. Routing Status so far:(Linear regulators bank)

11

5. Routing Status so far:(3d View)

12

Voltage Regulators: TL1963-KTT Qualified up to 1KGy by PSI for MOPOS [1,3]Analogue to Digital Converter : ADS5272 Total TID 88KGy for ATLAS, teted at IUCF / LANSCE WNR [2]Differential operationals (Gen. Inputs): THS4521 Qualified up to 1KGy by PSI for MOPOS [1,3]Readout ASIC: ICECAL_V2 RadHard developmentProgrammable Delay Lines: 3D3418 Total TID 5Krad [4]Rail-to-Rail Comparators LT1711 Not Qualified

(ICECAL Clock conditioning)

LVDS _CMOS Receiver DS90LV048A Tested with 60MeV p beam up. Qualified up to TID = 0.7KGy [6](ADC Clock Conditioning)

Bias Operationals (I_BIAS Circuit) OPA602 Tested up to 2.7KGy (Neutrons), but not qualified [5]Dual Current Source / Current Sink REF200 Not Qualified

There are some additional components to add to this list

[1] C. Deplano , J. Albertone, T. Bogey, J. L. Gonzalez, J. J. Savioz ∗ RADIATION RESISTANCE TESTING OF COMMERCIAL COMPONENTS FOR THE NEW SPS BEAM POSITION MEASUREMENT SYSTEM. CERN, Geneva, Switzerland[2] Helio TAKAI. Characterization of COTS ADC radiation properties for ATLAS LAr calorimeter readout upgrade. TWEPP13, 23-27 September 2013 [3] J.Albertone, T.Bogey, C.Delplano, J.L. Gonzalez. Logarithmic Amplifiers, ADC Drivers and Voltage Regulators: Radiation Test Report at PSI-PIF. 2013[4] J. Gu. EMU DAQ MotherBoard. ERS, CERN Nov. 2013.[5] F. J. Franco, Y. Zong, Juan Casas-Cubillos, M. A. Rodríguez-Ruiz, and J. A. Agapito. Neutron Effects on Short Circuit Currents of Op Amps and Consequences. IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 52, NO. 5, OCTOBER 2005[6] G. Di Mattia Thesis. Test del funzionamento e della resistenza alle radiazioni dell’elettronica per il trigger di primo livello dell’esperimento ATLAS. Università degli Studi di Roma “La Sapienza”

6. Considering radiation: Components and Qualifications