Basics of Electronics Engineering Lab (ECP-1101

Basics of Electronics Engineering Lab (ECP-1101)

School of Electronics and Electrical Engineering

CHITKARA UNIVERSITY Chandigarh-Patiala National Highway, Tehsil Rajpura, Distt. Patiala – 140401.

Web Site. www.chitkara.edu.in

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EXPERIMENT NO. 1(A)

AIM- Introduction to various electronic components and use of multimeter.

APPARATUS: Analog & digital multimeter, resistors, capacitors, diodes, transistor,

fuse, dc battery.

THEORY: 1. Multimeter: It is one of the most versatile general-purpose instruments

capable of measuring dc and ac voltages as well as currents and resistances. The

multimeter (or VOM) generally consists of the following elements:

A balanced bridge dc amplifier and a PMMC meter.

An attenuator in input stage to select the proper voltage range.

A rectifier for converting an ac input voltage to proportionate dc value

An internal battery and additional circuitry for providing the capability of resistance

measurement.

A function switch for selecting various measurement functions of the meter such as

voltage.

In addition, the instrument is usually provided with a built in power supply for operation

on ac mains and, in most cases, one or more batteries are provided for operation as a

portable test instrument.

Digital multimeter (DMM) is basically a digital voltmeter and may be used for the

measurement of voltage, current (dc or ac) and resistance. All quantities other than dc

voltage are first converted into an equivalent dc voltage by some device.

For measurement of resistance, a constant current, depending on the range, supplied

from battery or a constant current source is passed through the resistance under

measurement and voltage developed across it is measured. The resistance value is

displayed in ohms.

For measurement of current, the unknown current is passed through a precision

resistor in many commercial digital multimeters and the voltage developed across the

precision resistor is measured. The

Current value is displayed in mA.

2. Resistor: A resistor is a passive two-terminal electrical component that implements

electrical resistance as a circuit element. Resistors act to reduce current flow, and, at the

same time, act to lower voltage levels within circuits.





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Figure 1.Resistor color codes

3.Capacitor: A capacitor is a passive two-terminal electrical component that

stores electric energy in an electric field.

The most common kinds of capacitors are:

Ceramic capacitors have a ceramic dielectric.

Film capacitors or plastic film capacitors are non-polarized capacitors with an

insulating plastic film as the dielectric. The plastic films used as the dielectric for

film capacitors are Polypropylene (PP), Polyester (PET), Polyphenylene

sulfide (PPS), Polyethylene naphthalate (PEN), and

Polytetrafluoroethylene or Teflon (PTFE).

Electrolytic capacitors (e-caps) are polarized capacitors whose anode electrode (+)

are made of a special metal on which an insulating oxide layer originates by

anodization (forming), which acts as the dielectric of the electrolytic capacitor.

Fig 2.Ceramic capacitor

https://en.wikipedia.org/wiki/Passivity_(engineering)

https://en.wikipedia.org/wiki/Terminal_(electronics)

https://en.wikipedia.org/wiki/Electronic_component

https://en.wikipedia.org/wiki/Electric_energy

https://en.wikipedia.org/wiki/Electric_field

https://en.wikipedia.org/wiki/Ceramic

https://en.wikipedia.org/wiki/Film_capacitor

https://en.wikipedia.org/wiki/Polypropylene

https://en.wikipedia.org/wiki/Polyester

https://en.wikipedia.org/wiki/Polyphenylene_sulfide

https://en.wikipedia.org/wiki/Polyphenylene_sulfide

https://en.wikipedia.org/wiki/Polyethylene_naphthalate

https://en.wikipedia.org/wiki/Polytetrafluoroethylene

https://en.wikipedia.org/wiki/Teflon





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Fig 3.Polyester capacitor

Fig 4 Electrolyte capacitor

4.P-N Junction diode: a diode is a two-terminal electronic component that conducts

primarily in one direction ; it has low (ideally zero) resistance to the flow of current in

one direction, and high (ideally infinite) resistance in the other.

Fig 5.diode

5. A transistor is a semiconductor device used to amplify or switch electronic signals

and electrical power.

https://en.wikipedia.org/wiki/Terminal_(electronics)

https://en.wikipedia.org/wiki/Electronic_component

https://en.wikipedia.org/wiki/Electrical_resistance_and_conductance

https://en.wikipedia.org/wiki/Electric_current

https://en.wikipedia.org/wiki/Infinity





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Fig 6 transistor

1) PROCEDURE: 1. Measuring AC/DC voltage: The range selector switch should be in voltage position.

Place the leads of the multimeter across the terminal of the unknown voltage. Note

down the reading.

2. Measuring Resistance: Select the range of resistance and after the selections place

the leads of the multimeter across the terminal of the unknown resistance. Note down

the values.

3. Checking the continuity of wire: Connect the wire across the terminals of

multimeter. If reading comes to zero, wire is continuous.

4. Measuring capacitance: Select the range of capacitance and after the selections

place the leads of the multimeter across the terminal of the unknown capacitance.

Note down the values.

5. Checking Diode: Turn the dial (rotary switch) to Diode Test mode ( ). It may

share a space on the dial with another function. Connect the test leads to the diode.

Record the measurement displayed. Reverse the test leads. Record the measurement

displayed. A good forward-based diode displays a voltage drop ranging from 0.5 to

0.8 volts for the most commonly used silicon diodes. Some germanium diodes have a

voltage drop ranging from 0.2 to 0.3 V.

6. Checking transistor: Hook the positive lead from the multimeter to the BASE (B) of

the transistor. Hook the negative meter lead to the EMITTER (E) of the transistor. For

a good NPN transistor, the meter should show a voltage drop between 0.45V and

0.9V.

7. Typical Specifications of Digital Multimeter:

Ranges : DC voltage upto 1,000 V in 5 ranges

AC voltages upto 750 V in 5 ranges

DC current upto 10 A in 5 ranges

AC current upto 10 A in ranges

Resistance upto 200 M in seven ranges

Basic Accuracy : 0.5% for dc voltages

1% for ac voltages

1% for dc current





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1.2% for ac current

0.8 % for resistance

Display : 3.5 digits, LCD

Power Source : 9 V batteries.

OBSERVATION TABLE :

S.NO ELEMENT ACTUAL

READING

MEASURED

READING WITH

MULTIMETER

RESULT :the basic electronic components have been studied and values of resistance

and capacitances have been measured.





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EXPERIMENT NO. 1(B)

AIM: Verification of Kirchhoff’s current law in D.C circuits on kits.

APPARATUS:

a) Resistors (10Ω, 20Ω, 22Ω, 180Ω, 470Ω, 10Ω, 220Ω)

b) Multimeter

c) Regulated Power supply

d) Connecting leads

e) KCL kits

THEORY:

Kirchhoff’s current law:

It states that algebraic sum of the currents entering any point is equal to the sum of the

currents leaving that point. The point may be the interconnection of one or more

branches. This law is nothing more than a restatement of Principles of conservation of

charge.

i.e.

1

0k

jj

I

CIRCUIT DIAGRAM

Figure 1. (A).1: Circuit diagram for KCL





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PROCEDURE:

Kirchhoff’s current law: 1. Make the connections as shown in the circuit diagram 1.2

2. Switch on the D.C. supply and set it at 5V.

3. Note down the current readings from the ammeter (A1, A2 and A3)

4. Repeat step 3 for the applied voltage V= 10V, 12V and note down the readings.

5. Switch off the D.C. supply

6. Verify the result with analytical calculations

KCL TRAINER BOARD:





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OBSERVATION TABLE:

KCL: Table for kit

S.No. Input

Supply

Theoretical value(A)

Practical value(A)

I1 I2 I3 Total Current

I= I1+I2+I3

I1 I2 I3 Total Current

I= I1+I2+I3

PRECAUTIONS: 1. Connections should be right and tight.

2. Before connecting the instruments, check the error in instrument.

3. The direction of current and voltage should be identified correctly

4. Multimeter should be in Ammeter mode while measuring current.

CONCLUSION:

Kirchhoff’s current law is verified.

Viva voce Question

1. A branch in a network is said to be active when it contains

A. Resistor

B. Inductor

C. Capacitor

D. source

2. A node in a network is defined as

A. Closed path

B. Junction point of two or more branch

C. group of interconnected networks

D. all of above

3. When resistances are connected in series , then voltage across all the resistances is

A. Equal

B. Unequal

C. Proportional to the square of the current

E. None

4. In the nodal voltage method of analysis , the independent variable is the

A. Branch current

B. Node voltage





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C. Branch voltage

D. Mesh current

5. In the networks having N nodes ,the number of independent equations is

A. 2N

B. 2N-1

C. N

D. N-2

6. Nodal voltage method analysis is applicable to the network containing

A. Only current sources

B. only voltage sources

C. Current and voltage sources

D. none

7. When the resistances are in parallel , the voltage across the resistor is

A. Equal

B. Unequal

C. Proportional to square of current

D. none

8. Any closed path formed by the branch in a network is called

A. Loop

B. Mesh

C. Node

D. none

9. Which of the following is not the unit of conductance

A. Mho

B. Siemens

C. Volt/ampere

D. ampere/volt

10. Which of these element in the following is not bilateral

A. Resistor

B. Inductor

C. Capacitor

D. transistor





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EXPERIMENT NO. 1(C)

AIM: Verification of Kirchhoff’s voltage law in D.C circuits on kit.

APPARATUS:

a) Resistors (10Ω, 20Ω, 22Ω, 180Ω, 470Ω, 10Ω, 220Ω)

b) Multimeter

c) Regulated Power supply

d) Connecting leads

e) KVL kit

THEORY:

Kirchhoff’s voltage law: It states that at any time instant the algebraic sum of voltages around a closed circuit or a loop is

zero. That is, for a closed circuit having k elements,

1

0k

jj

V

Where Vj represents the voltage drops of the jth element.

1 2 3......... 0

kv v v v

this statement simply tells us that if we start from a particular junction and go around a closed

circuit so as to come back to the same junction, the net potential drop (or potential rise) is zero,

because we have come back to the point at the same potential.

Figure.1 (B).1: Circuit diagram for KVL

Procedure:

Kirchhoff’s voltage law: 1. Make the connections as shown in the circuit diagram 1.1.

2. Switch ON the D.C. supply and set it at 5V

3. Note down the voltage readings from the voltmeter (V1, V2, and V3).





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4. Repeat the step 3 for applied voltage V= 10V, 12V, and note down the readings.

5. Switch off the D.C. supply

6. Verify the result with analytical calculations.

KVL PANEL:-

OBSERVATION TABLE:-

KVL: Table for kits

S.No. Input

Supply

Theoretical value(A)

Practical value(A)

V1 V2 V3 Total Voltage

V=V1+V2+V3

V1 V2 V3 Total Voltage

V=V1+V2+V3





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PRECAUTIONS: 1. Connections should be right and tight.

2. Before connecting the instruments, check the error in instrument.

3. The direction of current and voltage should be identified correctly

4. Multimeter should be in Ammeter mode while measuring current.

CONCLUSION:

KVL is verified.

Viva voce Question:

1. In the mesh current method of analysis , the independent variable is

A. Node current

B. mesh current

C. node voltage

D. none

2. In a network of the number of nodes is N and the number of branches is B , the

number of independent mesh equations are

A. B-n+1

B. b+n+1

C. B+n+1

D. B-N-1

3. Nodal and mesh methods of network can be applied to

A. Independent current sources

B. independent voltages sources

C. dependent current sources

D. none

4. When the circuit is suddenly switched on , transients will occur if it contains elements

which are

A. Resistive and inductive

B. resistive and capacitive

C. Resistive, inductive, capacitive

D. none

5. Equations obtained by applying Kirchhoff’s law to a circuit to study its transient

behavior are

A. Linear algebraic

B. non linear algebraic

C. Differential

D. none

6. Any closed path formed by the branch in a network is called





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A. Loop

B. mesh

C. node

D. none

7. Which of the following is not the unit of conductance

A. Mho

B. Siemens

C. Volt/ampere

D. ampere/volt

8. Which of these element in the following is not bilateral

A. Resistor

B. inductor

C. capacitor

D. transistor

9. Which of the following correctly simulates the response of reactive circuit?

A. homogeneous

B. Integro-differential

C. linear

D. All of these

10. A node in a network is defined as

A. Closed path

B. junction point of two or more branch

C. Group of interconnected networks

D. all of above





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EXPERIMENT NO. 2

AIM :- Plot and analyze the forward and reverse characteristics of PN junction Si and Ge diodes and determine their knee and breakdown voltages.

APPARATUS:

a) PN Junction diode,

b) Power supply (0 – 90V)

c) Voltmeters (0 – 3V, 0 – 90 V)

d) Ammeter (0 -15 mA)

e) Ammeter (0 – 1.5 A)

THEORY:

A P-N junction, is formed when p-type semiconductor is suitably joined to n-

type semiconductor. The contact surface so formed is known as PN junction. This diode

has two terminals called anode and cathode.

A curve plotted between voltage across the diode (V) and the current flowing through it

(I) is called VI characteristics of a diode. This is known as response of a P-N junction.

FORWARD BIASING: When positive terminal of battery is connected to p-type semiconductor & negative

terminal of battery is connected to n-type semiconductor of P-N junction, the junction is

said to be forward biased.

REVERSE BIASING: When positive terminal of battery is connected to n-type semiconductor & negative

terminal of battery is connected to p-type semiconductor of P-N junction, the junction is

said to be reverse biased.

CIRCUIT DIAGRAM:

Figure 2.1: Biasing of PN junction diode





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PROCEDURE:

(A) FORWARD BIASING

1. Make the connections as shown in Figure 3.1(a)

2. Connect positive terminal of battery to p-type semiconductor & negative terminal to

n-type semiconductor of a P-N junction.

3. Keep the DPDT switches towards 3 V and 15 mA position.

4. Keep the variable contact of the power supply towards minimum position i.e.

anticlockwise.

5. put the ON/OFF switch to ‘ON’ position. Jewel light will indicate the power supply is

ON.

6. Now with the help of the variable contact of the power supply, starting from zero,

increases DC voltage applied across the diode in small steps of about 0.1V. Note the

voltmeter reading and corresponding reading of current in milliammeter.

7. Plot V – I characteristics taking V on x-axis and I on y-axis.

(B) REVERSE BIASING:

1.Make the connections as shown in the Figure 3.1(b).

2.Keep the DPDT switches towards 90 V & 1.5A position.

3.Keep the variable contact of the power supply towards minimum position i.e.

Anticlockwise.

4.Put the ON/OFF switch to ‘ON’ position. Jewel light will indicate the power supply is

ON.

5.Now with the help of the variable contact of the power supply starting from zero

increase DC voltage in small steps of about 0-2V. Note the voltmeter reading and

corresponding reading of micrometer.

OBSERVATION TABLE:





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PRECAUTIONS:

1. To avoid over heating of diode, current should not be passed for long durations.

2. Voltage applied should be well below the safety limit of the transistor.

3. Connection should be made carefully and must be tight.

GRAPH:

Plot a graph between voltage and current applied across the PN – Junction diode, taking

values of voltage along x-axis & the corresponding value of current along y-axis. Take

the forward voltage VF and forward current IF along positive x-axis and y-axis

respectively. Similarly plot the reverse voltage VR and reverse current IR along negative

x-axis and y-axis respectively.





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Figure: 2.2: Characteristics of PN junction diode

CONCLUSION:

1. The Curve shows that only a very small current flow through the diode during the

initial stage still the potential barrier is wiped-off. Once the potential barrier wiped-

off, current rises quickly

2. The knee voltage of germanium diode is quite lower than the silicon diode. This is

the major

difference between the two types of diodes.

3. Knee Voltage of a diode is……….

4. Breakdown voltage of a diode is………

Viva-Voce Questions

Ques.1. Which of the following is present in the valence band

A. Free electrons





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B. Electrons attached to atoms

C. Holes

D. All of these

Ques.2. Which of the following materials show s the presence of free electrons

A. Conductors

B. Semiconductors

C. Insulators

D. All of these

Ques3. Which of the following applies to P-N junction diode

A. Majority carriers are holes

B. Minority carriers are electrons

C. Penta and trivalent impurities are present

D. All of above

Ques.4. The vicinity of P-N junction is

A. Positively charged

B. Negatively charged

C. Charge free

D. None of these

Ques.5.Which of the following dos not describe the region in the N- type of a P-N junction

diode

A. It has a depletion of electrons

B. It is a positively charged

C. It is a negatively charged

D. All of these

Ques.6.Which of the following represents the Zener effect in P-N junction diode

A. Creation of a high electric field

B. Tearing of the electrons

C. Collision of accelerated electrons with holes

D. All of these

Ques.7. P-N junction diode is used as a voltage regulator in a circuit. To which of the

following category the diode belong to

A. Small signal diode

B. Protection diode

C. Zener diode

D. LED

Ques8. How does the diode current change when the temperature of the intrinsic

semiconductor is increased A. No change

B. Decrease





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C. Increase

D. becomes zero

Ques.9. Which of the following do not require dc power

A. laptop

B. mobile phones

C. extra high voltage power transmission

D. none

Ques.10. Resistivity of a semiconductor

A. Increases linearly

B. Decreases linearly

C. Increases exponentially

D. Decreases exponentially





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EXPERIMENT NO. 3

AIM :- Analyze Zener diode as voltage regulator and observe the output voltage with variable input voltage and fixed load resistance for zener diodes with breakdown voltages of 6 V,8V and 12 V.

APPARATUS:

a) Zener diode kit

b) Power supply

c) Multi meter

d) Connecting leads

THEORY:

A Zener Diode is a special kind of diode which permits current to flow in the forward

direction as normal diode, but will also allow it to flow in the reverse direction when the

voltage is above a certain value - the breakdown voltage known as the Zener voltage.

A zener diode exhibits almost the same properties, except the device is specially

designed so as to have a greatly reduced breakdown voltage, the so-called zener voltage.

By contrast with the conventional device, a reverse-biased zener diode will exhibit a

controlled breakdown and allow the current to keep the voltage across the zener diode

close to the zener breakdown voltage. For example, a diode with a zener breakdown

voltage of 3.2 V will exhibit a voltage drop of very nearly 3.2 V across a wide range of

reverse currents. The zener diode is therefore ideal for applications such as the

generation of a reference voltage (e.g. for an amplifier stage), or as a voltage stabilizer

for low-current applications.

CIRCUIT DIAGRAM:-

Fig 3.1

http://en.wikipedia.org/wiki/Amplifier





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PROCEDURE:-

1. Make the connection as shown in diagram.

2. The regulated power supply voltage is increased in steps.

3. The input voltage (Vin) and output voltage (Vout) are observed and then noted in

tabular form.

4. A graph is plotted between input voltage (Vin) and output voltage (Vout).

OBSERVATION TABLE:-

S No.

Zener Diode- V Zener Diode- V

Vin

(V)

Vout

(V)

Vin

(V)

Vout

(V)

PRECAUTION:-

1. The terminal of the zener diode should be properly identified.

2. Should be ensured that the applied voltage do not exceed the ratings of the diode.

3. The connection should be neat and tight.

CONCLUSION:-

Hence the zener diode is used as a voltage regulator.

Viva Voce Questions

Ques.1:- Breakdown region of zener diode is named as ______________.

Ques.2:- Depletion layer of zener diode is _______(thin /thick).

Ques.3:- For voltage regulation zener diode is used in ______ (reverse/forward/no

biasing).

Ques.4:-Can zener be used in forward vias. (True/False)

Ques.5:- Doping material used to manufacture zener diode is_______.





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EXPERIMENT NO. 4

AIM: Study and observe the output waveform of half-wave and full wave rectifiers on CRO and calculate the average and rms values of output voltage and current.

APPARATUS:

a) Half wave and full wave rectifier kit

b) Digital Multimeter

c) Connecting wires

d) CRO

e) CRO probes

THEORY:

Half Wave Rectifier

In Half Wave Rectification, When AC supply is applied at the input, only Positive Half

Cycle appears across the load whereas, the negative Half Cycle is suppressed. How this

can be explained as follows:

During positive half-cycle of the input voltage, the diode D1 is in forward bias

and conducts through the load resistor RL. Hence the current produces an output voltage

across the load resistor RL, which has the same shape as the +ve half cycle of the input

voltage.

During the negative half-cycle of the input voltage, the diode is reverse biased

and there is no current through the circuit. i.e., the voltage across RL is zero. The net

result is that only the +ve half cycle of the input voltage appears across the load. The

average value of the half wave rectified o/p voltage is the value measured on dc

voltmeter.

For practical circuits, transformer coupling is usually provided for two reasons.

1. The voltage can be stepped-up or stepped-down, as needed.

2. The ac source is electrically isolated from the rectifier. Thus preventing

shock hazards in the secondary circuit.

The efficiency of the Half Wave Rectifier is 40.6%





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Full Wave Rectifier

The circuit of a center-tapped full wave rectifier uses two diodes D1&D2.

During positive half cycle of secondary voltage (input voltage), the diode D1 is

forward biased and D2is reverse biased. So the diode D1 conducts and current flows

through load resistor RL.During negative half cycle, diode D2 becomes forward biased

and D1 reverse biased. Now, D2 conducts and current flows through the load resistor

RL in the same direction. There is a continuous current flow through the load resistor

RL, during both the half cycles and will get unidirectional current as show in the model

graph. The difference between full wave and half wave rectification is that a full wave

rectifier allows unidirectional (one way) current to the load during the entire 360

degrees of the input signal and half-wave rectifier allows this only during one half

cycle (180 degree).

CIRCUIT DIAGRAM:

A) Half Wave Rectifier:

Fig 4.1

Waveforms:

Rectifier Output Waveform





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B) Full Wave Rectifier

Fig 4.2

Waveforms:

PROCEDURE:

1. Make the connection as shown in diagram.

2. Now connect the CRO before diode to see the input waveform.

3. Now connect the CRO after diode to see the output waveform (output of the

rectifier).

4. Measure the Vin(rms) and Vout(rms)

5. Now connect the filter circuit with rectifier and connect CRO after it to get

output waveform.

6. Follow the same steps for performing full wave rectifier.





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CALCULATION

Half Wave Full Wave

Waveshape

Vin(rms)

Vout(rms)

PRECAUTIONS:

1. The primary and secondary side of the transformer should be carefully identified.

2. The polarities of all the diodes should be carefully identified.

3. Connection should be neat and tight.

CONCLUSION:-

Hence the wave shapes has been verified along with Vrms.

Viva Voce Questions:-

Ques.1- Which is more efficient half wave and full wave rectifier?

Ques.2- Peak inverse voltage of half wave ________.

Ques.3- Peak inverse voltage of full wave rectifier ______.

Ques.4- Average and RMS value of half wave rectifier is ______.

Ques.5- Average and RMS value of full wave rectifier is ______.





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EXPERIMENT NO. 6

AIM: Analyze the npn and pnp transistors in common emitter configuration and plot their input and output characteristics.

APPARATUS:

a) Regulated DC power supplies

b) Voltmeter (0 – 10 V)

c) Ammeter (0 – 50 mA)

d) Ammeter (0-1mA)

e) Transistor (NPN Type)

f) Connecting leads

THEORY:

A junction transistor is simply a sandwich of one type of semiconductor material

between two layers of the other type. Accordingly, there are two types of transistors (1)

N-P-N transistor and (2) P-N-P transistor. When a layer of P type material is sandwich

between two layers of N type material, the transistor is known as N-P-N transistor.

Similarly, when a layer of N type material is sandwich between two P type materials, the

transistor is known as P-N-P transistor. This is shown in figure 5.1.





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Figure 5.1: Transistor symbols

A transistor (N-P-N or P-N-P) has the following sections:

(I) Emitter: the main function of this region is to supply majority charge carriers to

the base and it is more heavily doped in comparison to other two regions.

(II) Base: this region is very lightly doped so that it may pass most of the injected

charge carriers to collector.

(III) Collector: the main function of the collector is to collect majority charge carriers

through the base thus moderately doped it is.

CIRCUIT DIAGRAM:





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Figure 5.2: Circuit showing n-p-n transistor CE configuration

CHARACTERSTICS OF CE CIRCUIT:

Figure 5.2 shows the circuit arrangement for plotting the static characteristics of N-P-N

transistor in common emitter configuration. In this circuit battery VBB provides the

forward bias to emitter-base junction and the voltmeter V1 is used to measure voltage

VBE. The micro-ammeter measure the base current IB. a battery VCC is connected

between collector and emitter. The collector emitter junction is reversed biased and

voltmeter V2 measures the voltage VCE and the milli-ammeter measures the collector

current.

Input Characteristics: In CE configuration the curve plotted between base current IB

and base emitter voltage VBE at constant collector emitter voltage is called input

characteristics. Input characteristics are shown in figure 5.3. The following points are

noted from the characteristics:

1. The characteristic resembles that of forward biased diode curve. This is expected

because the emitter base section of transistor is a diode and it is forward biased.

2. The curve shows that input resistance of the common emitter circuit is higher

than that of common base circuit.





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Figure 5.3: Input characteristics

Output Characteristics: In CE configuration, curve plotted between collector current,

IC and collector emitter voltage, VCE at constant base current IB is called Output

Characteristics. Output characteristics are shown in figure 5.4. The following

conclusions are drawn:

1. In the active region for small values of base current, the effect of collector

voltage over collector current is small while for large base current values this

effect increases. Thus the current gain of this configuration is greater than unity.

The operation of the transistor, when used as an amplifying device, must be

restricted in the active region only, if much distortion is to be avoided.

2. When VCE has very low value, the transistor is said to be saturated and it operates

in the saturation region. In this region change in base current does not produce a

corresponding change in collector current.

3. When VCE is allowed to increase too far, collector base junction completely

break down and due to this avalanche breakdown, collector current increase

rapidly. In this case transistor is damaged.

4. In the cut off region a small amount of collector current flows even the base

current is zero. This is called ICEO. Since main collector current is zero the

transistor is said to be cut off.





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Figure 5.4: Output characteristics

PROCEDURE:

1. Make the connection as shown in Figure 5.2.

2. Get the connections checked from the teacher in charge.

3. Set both the power supplies at zero. Switch on the a.c. input of the power supplies.

4. For the input characteristics, fix the voltage VCE=1V.Now increase the Voltage, VBE

in steps of 0.05 V and note down the corresponding value of base current, IB and

record them in observation table.

5. Draw the input characteristics taking VBE on x-axis and IB on y-axis.

6. Repeat steps 4 and 5 for VCE =5V and the VCE =10V.

7. For output characteristics, fix IB=0 i.e. keep the input circuit open. Change the

collector-emitter voltage in steps and note down the corresponding values of IC.

Record these readings in observation table.

8. Repeat step 7 for IB = 50 and 100μA.

9. Draw the output characteristics taking VCE on x-axis and IC on y-axis.

PRECUATIONS:

1. The input supply to the training board should be of the correct polarity and voltage

level.

2. Ensure the connections are right and tight.

3. Note down the zero error of the instruments.





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OBSERVATION TABLE:

Input Characteristics:

S. No

VCE = 1V

VCE = 5V

VCE = 10V

IB VBE

IB VBE

IB VBE

Output characteristics:

S. No

IB = 0 μA IB = 50 μA IB = 100 μA

Ic VCE

Ic VCE

Ic VCE

CONCLUSION: Input and output characteristics of CE configuration plotted.

Viva Voce Questions

1. Which of the following is not the representative of a transistor

A. It is a semiconductor device

B. It is a non linear

C. It amplifies the signal

D. None

2. In the BJT current flow occurs due to which of the following reasons

A. Electrons only

B. Holes only

C. Both

D. None

3. Which of the following is true for operation of a PNP transistor





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A. Holes are majority carrier

B. The base is at lower voltage than emitter

C. Base voltage controls the flow of current from emitter to collector

D. All of these

4. Which of the following is the most used transistor

A. CB

B. CC

C. CE

D. All of these

5. The avalanche effect takes place in which of the following reasons of operations of a

transistor

A. Saturation

B. Cut-off

C. Breakdown

D. Active

6. When the BJT function as an amplifier which of the following is controlled

A. Collector current

B. Emitter current

C. Base current

D. All of these

7. Which of the following is not the correct simulation of the collector current when the

BJT amplifier is operating in the active device

A. VCCS

B. CCVS

C. CCCS

D. None

8. Which of the following change is likely to occur in the Q- point when the collector

current increases

A. No change

B. Shifts to saturation region

C. Shift to cut-off region

D. Oscillates in the active region

9. Which of the following is obtained when the DC load line intersect the output

characteristics

A. Ib

B. Ic

C. Vce

D. All of these

10. In the common emitter NPN circuit , which of the following represents the phase

relation between the input and output signal

A. 0

B. 90

C. 180

D. None of these





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EXPERIMENT NO. 7

AIM:- Study the operation of npn and pnp transistors as a switch and an amplifier.

APPARATUS REQUIRED:

a) Transistor (NPN)

b) Resistor (330Ω and 1kΩ)

c) Switch

d) LED

e) Connecting wires

f) 9V battery

g) Battery connecting clips

h) Breadboard

THEORY:-

One of the most common uses for transistors in an electronics circuit is as simple

switches. In short, a transistor conducts current across the collector-emitter path only

when a voltage is applied to the base. When no base voltage is present, the switch is off.

When base voltage is present, the switch is on.

In an ideal switch, the transistor should be in only one of two states: off or on. The

transistor is off when there’s no bias voltage or when the bias voltage is less than 0.7V.

The switch is on when the base is saturated so that collector current can flow without

restriction.

Schematic diagram for a circuit that uses an NPN transistor as a switch that turns an

LED on or off.





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LED:- This is standard 5mm red LED. This type of LED has a voltage drop of 1.8 V and

is related at a maximum current of 20 mA.

R1:- This is 330 Ω resistor limits the current through the LED to prevent the LED from

burning out.

LED: This is a standard 5 mm red LED. This type of LED has a voltage drop of 1.8 V

and is rated at a maximum current of 20 mA.

R1: This 330 Ω resistor limits the current through the LED to prevent the LED from

burning out. You can use Ω's law to calculate the amount of current that the resistor will

allow to flow. Because the supply voltage is +6 V, and the LED drops 1.8 V, the voltage

across R1 will be 4.2 V (6 – 1.8). Dividing the voltage by the resistance gives you the

current in amperes, approximately 0.0127 A. Multiply by 1,000 to get the current in mA:

12.7 mA, well below the 20 mA limit.

Q1: This is a common NPN transistor. A 2N2222A transistor was used here, but just

about any NPN transistor will work. R1 and the LED are connected to the collector, and

the emitter is connected to ground. When the transistor is turned on, current flows

through the collector and emitter, thus lighting the LED. When the transistor is turned

off, the transistor acts as an insulator, and the LED doesn't light.

R2: This 1 KΩ resistor limits the current flowing into the base of the transistor. You can

use Ω's law to calculate the current at the base. Because the base-emitter junction drops

about 0.7 V (the same as a diode), the voltage across R2 is 5.3 V. Dividing 5.3 by 1,000

gives the current at 0.0053 A, or 5.3 mA. Thus, the 12.7 mA collector current (ICE) is

controlled by a 5.3 mA base current (IBE).

SW1: This switch controls whether current is allowed to flow to the base. Closing this

switch turns on the transistor, which causes current to flow through the LED. Thus,

closing this switch turns on the LED even though the switch isn't placed directly within

the LED circuit.

PROCEDURE:- 1. Take breadboard and the required components.

2. Connect as shown in circuit diagram.

3. Apply the voltage source to the circuit diagram.

4. Make the switch ON and see whether LED glow or not?

CONCLUSION:-

Thus, when the transistor is ON the LED glows.





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EXPERIMENT NO. 8

AIM: Analyze the truth tables of various basic digital gates and implement XOR

and XNOR gate using basic gates.

APPARATUS:

a) Trainer board having IC’s 7400, 7402, 7404, 7408, 7432, 7486

b) Connecting wires.

THEORY:

Circuits which are used to process digital signals are called logic gates. Gate is a digital

circuit with one or more input voltages but only one output voltage. The most basic

gates are called the AND gate, OR gate and NOT gate. Universal gates are NAND gate

and NOR gate.

AND gate: The AND gate is a circuit which provides an output high when all the inputs

are simultaneously high. The symbolic representation of a two input AND gate is shown

in Fig 7.1. Mathematically, we can write

Y = A * B

Figure 7.1 And gate

OR gate: An OR gate has two or more input signals but only one output signal. It is

called an OR gate because the output is high if any or all of the inputs are high. The





Page | 36

symbolic representation of a two input OR gate is shown in Fig 7.2. Mathematically, we

can write

Y = A + B

Figure 7.2 OR gate

NOT gate: The NOT gate is a gate which has only one input and one output. It is called

so because the output state is always opposite to that of input state i.e. if input is 0, then

output is 1 and vice versa. The NOT gate is called an inverter. The symbolic

representation of NOT gate is shown in figure 7.3. Boolean equation is

Figure 7.3 NOT gate

NAND gate: It is combination of NOT gate followed by an AND gate. The output is

low when both of the inputs are high else it will give high output. The symbol for

NAND gate is shown in figure 7.4. Mathematically, we can write





Page | 37

IC 7400

Figure 7.4: NAND gate

NOR gate: It is combination of NOT gate followed by an OR gate. The output is high

when both of the inputs are low else it will give low output. The symbol for NAND gate

is shown in figure 7.5. Mathematically, we can write

IC 7402

Figure 7.5: NOR gate





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EX-OR gate: The symbol for XOR gate is shown in figure 7.6. There are two or more

inputs and one output. The exclusive –OR operation is denoted by . The output is 1

only when the inputs are different. XOR operation is also called mod-2 addition.

Boolean equation is given as

Figure 7.6: EX-OR gate

EX-NOR gate: The symbol for XNOR gate is shown in figure 7.7. There are two or

more inputs and one output. The output is high if and only if it’s both inputs are same.

On the other hand, the output is low if both inputs are different. Boolean expression is

given as





Page | 39

Figure 7.7: EX-NOR gate

Figure 7.8 X-OR gate using basic gates

Figure 7.9 X-NOR gate using basic gates

PROCEDURE:

1. Connect the input terminals of the gate from trainer board input section.

2. Connect the output terminal of gate to output section of trainer board.

3. Switch on the power supply.

4. Vary the inputs of gate i.e. high or low and note down the output.

5. Draw the table and verify it from truth table of the gate





Page | 40

CONCLUSION:

Truth table of various logic gates verified.

Viva Voce Questions

1. Which of the following is not a basic gate

A. AND

B. NOT

C. NAND

D. NOR

2. Which of the following is not applicable to a logic gate

A. It is an electronic device

B. It converts binary input to binary output

C. It converts binary input to analog output

D. All of these

3. Which of the following operations yields and output which is opposite to that of input

A. NOT

B. AND

C. OR





Page | 41

D. None

4. Which of the following bits represents the word

A. 8

B. 16

C. 32

D. 64

5. Which of the following is not a symbol of hexadecimal number system

A. G

B. A

C. F

D. E

6. Which of the following operations follow the compliment law

A. NOT

B. OR

C. AND

D. NAND

7. Which of the following is a basis of application in digital electronics

A. Combinational logic

B. Sequential logic

C. Both

D. None

8. In the combinational logic circuit , which of the following is not correct

A. Input is a Boolean function

B. The output is fixed for given input

C. Output ids dependent on input and previous output

D. All of these

9. The clock signal in the sequential logic circuit

A. Oscillator

B. Amplifier

C. Attenuator

D. None

10. Which of the following is not a category of flip flop

A. D

B. E

C. T

D. K





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EXPERIMENT NO. 8

AIM: Analyze S-R and D flip-flops using NAND/NOR gates.

APPARATUS:

a) Flip Flop trainer kit and

b) Patch cords

THEORY:

SR flip flop:-

It is set or reset flip flop, the memory cell is synchronism with a train of pulses known as

clock. Such a circuit is shown in fig 8.1. and is referred to as a clocked set-reset(S-R)

flip flop.

Case 1, when clock pulse = 0(low)

Case 2, when clock pulse = 1(high)

G3 and G1 will be enabled and circuit will work as normal flip flop G1 and G2 will enable

and output will response according to truth table given in fig. When the clock pulse is

not present (clock=0), the gates G3 and G4 are inhibited that is there outputs are 1

irrespective of the values of SR. In other words, the circuit responds to input S and R

only when the clock is present. Here Sn and Rn denotes the input and Qn the output after

the pulse passes that is in the bit time n+1. If Sn=Rn=0 and the clock pulse is applied, the

output at the end of the clock pulse is the same as the output before clock pulse that is

Qn+1=Qn. This indicated in the first row of the truth table. If Sn=1 and Rn=0, the output at

the end of clock pulse will 1, whereas Sn=0 and Rn=1, then Qn+1=0. These are indicated

in the 2nd and 3rd rows of the truth table respectively. When Sn = Rn=1, the clock is

present, the output of the gate G2 and G4 are both zero making one of the input’s of G1

and G2 Nand gate 0. The condition Sn = Rn=1 is forbidden and must not be allowed to

occur. When the power is switched ON, the state of the circuit is uncertain. It may come

to set r reset state. It is generally desired to initially set or reset the flip flop. This

accomplished by adding direct or synchronous inputs referred to as present (Pr) or clear

(clr) inputs.

Fig 8.1





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D Flip Flop:-

The D stands for delay. The data present at the input just before the clock input inhibits a

change so desired logic level is transfused to the output after change. The kit has been

designed D flip flop using IC7474. IC is used as duel D the edge triggered flip flop

having present and clear pin. When we use no. of flip flops or we require to preset a flip

flop. Both these functions can be included in the flip flop. The OR gate have input of

high preset or high clear whenever required. Preset and clear are known asynchronous

input as they work independent of clock.

Fig 8.2

Truth Table

INPUT OUTPUT

D Qn+1

0 Qn

1 Qn

PROCEDURE:

RS flip flop

1. Connect the connections as shown in figures.

2. Connect Q and Q to output.

3. Verify the truth table at output section by changing of position of switches and

pulses of input section.

D flip flop

1. Connect S1 of input section to CLR, S2 to D1, S3 to PR1 of IC7474 also connect

Clock to Clk.

2. Connect Q to output.





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3. Verify the truth table at output section by changing of position of switches and

pulses of input section.

PRECAUTIONS:

1. Connection should be neat, clear and tight.

2. Do not exceed the power supply.

CONCLUSION:

The truth tables of RS and D flip flop are verified.





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EXPERIMENT NO. 9

AIM: - Study the operation of Inverting and non-Inverting amplifier using Op-amp IC 741 in closed-loop configuration.

APPARATUS REQUIRED:-

a) Op-Amp kit,

b) Function Generator

c) CRO

d) Connecting wires

e) Probes

THEORY: -

An op-Amp can be used for number of application like Amplifier, Adder and

Substractor, Multivibrators, integrator and differentiator etc. Operational amplifiers can

be used in two basic configurations to create amplifier circuits. One is the inverting

amplifier where the output is the inverse or 180 degrees out of phase with the input, and

the other is the non-inverting amplifier where the output is in the same sense or in phase

with the input.

Inverting mode:-

Here we are using 741 as a inverting amplifier. In inverted configurations only one input

is applied and that is to the inverting input terminal. The non inverting input is grounded.

The output is given by Vo = -(X)(Vin). The minus sign here shows that output voltage is

out of phase with the input by 180 degree.

CIRCUIT DIAGRAM:-

Fig 9.1 Opamp as Inverting Amplifier





Page | 46

OBSERVATION TABLE:-

S. no. Vin Vout X A in decibal

20 log10 X

Non-Inverting mode:- The basic non-inverting operational amplifier circuit is shown in the figure. In the below

circuit the signal is applied to the non-inverting input of the op-amp. However the

feedback is taken from the output of the op-amp via a resistor to the inverting input of

the operational amplifier where another resistor is taken to ground. It is the value of

these two resistors that govern the gain of the operational amplifier circuit.

CIRCUIT DIAGRAM:-

Fig 9.2 Opamp as non inverting amplifier

OBSERVATION TABLE:-

S.No Vin Vout A A in db





Page | 47

PROCEDURE:--

INVERTING AMPLIFIER/ NON-INVERTING AMPLIFIER

1) Make the operational amp trainer board connections as per the diagram with the

help of patch cords.

2) Apply 1 volts dc.

3) Note that the output is out of phase w.r.t input in inverting and in phase in case of

non-inverting configuration and its Avo times the input in both cases.

4) Now change the value of Rf and check for the stability of gain with Rf.

OBSERVATIONS:-

In inverting mode amplifier input signal is amplified by gain A and the output is

180 degree out of phase with the input. In non inverting mode amplifier input signal is

amplified by gain A and the output is in phase with the input.

PRECAUTIONS:-

1. All the connections should be neat and tight.

2. Oscilloscope should be set properly to see resulting wave form.

3. Power should be set on only after making all connections.

4. Equipment kit must be turned off when removing or replacing the connecting

leads.

CONCLUSION:

The design and testing of the inverting and non inverting amplifier is done and the input

and output waveforms were drawn.





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EXPERIMENT NO. 10

AIM: To study the 555 timer as astable, monostable and bistable multivibrator.

Apparatus: 555 timer kit.

Theory: The 555 IC is a popular chip for acting as multivibrators.

1. The comparators: A comparator circuit is an op-amp circuit that is designed to

compare an input with a fixed threshold voltage. The output will be high if the input

voltage is higher, or lower depending on the comparator’s design, than the threshold

voltage. In the 555 IC, if the threshold pin input (pin 6) is higher than 2/3Vcc, the output

of CP1 (upper comparator) goes high. When the trigger pin in put is lower than 1/3Vcc,

then the output of CP2 (lower comparator) is high.

2. The RS Flip-Flop (Control F/F): The second segment of the 555 IC to analyze is the

RS flip-flop. When the output of CP2 is high, and thus the output of CP1 is low, then the

flip-flop has inputs, R=0 and S=1. This causes the output of the RS flip-flop to be high,

or logic 1. Thus, the inverted output of the flip-flop will be logic 0, or low. When the

output of CP1 is high, and thus the output of CP2 is low, then the flip- flop has the

inputs, R=1 and S=0. This causes the output of the RS flip-flop to be logic 0 and the

inverted output of the flip-flop to be logic 1.

3. The last input pin is pin 4, reset. The reset feature of the RS flip-flop is active low.

Thus, when the input to the reset pin is low, the flipflop’s output will be logic 0 and the

inverted output will be logic 1. To disable the reset feature, the reset input of the flip-

flop, and thus the reset pin of the 555 IC, should be tied high.

4. The Discharge Transistor (T1): The last aspect of the 555 IC to be analyzed is the

discharge transistor. When the output of the flip-flop is high, and thus the inverted

output is low, the transistor is off. Since, the transistor is connected to the inverted

output of the flip-flop, when the inverted output is low the transistor is off because there

is no current flowing in to the base of the transistor. When the output of the flip flop is

low, and thus the inverted output of the flip-flop is high, the discharge transistor turns on

and thus current flows in through the discharge pin (pin 7) and to ground through the

discharge transistor.





Page | 49

1. 555 Timer as astable multivibrator: By adding two timing resistors RA, RB and

a capacitor to the 555 IC forms an astable multivibrator. An astable multivibrator

is an oscillator that generates a square wave output.

555 timer as monostable multivibrator: Monostable 555 timer multivibrator circuit (one

shot monostable multivibrator) is a retriggerable mono shot pulse generator. The name

‘Mono stable’ indicates that it has only one stable state. The unstable state is called

‘Quasi stable state’.

555 timer as bistable multivibrator:A Bistable multivibrator is a type of circuit which has

two stable states (high and low). It stays in the same state until and unless an external

trigger input is applied.

Documents

Basics of Electronics Engineering Lab (ECP-1101