Autonomous Memory - About Radiant Technologies, Inc

Autonomous MemoryAN AUTONOMOUS
NON-VOLATILE MEMORY
Summary
• Can a circuit be built that utilizes that memory without
need of external controls?
An Always “On” Memory • PZT capacitors are exceedingly
simple to fabricate.
drops below the Curie
Temperature. It has memory
until it falls apart.
rearranging existing states, not creating new ones.
The capacitor always “knows” what state it is in. The goal
is to build a circuit around the capacitor that is coupled to
.
A Truly Autonomous Bit
returns to the same state it had
before power down.
state as long as power is applied
unless it forced to change.
• To change the Output, drag it to
the opposite state.
An Autonomous Relay
• The relay will always retain its last state through power
interruptions.
Input
Output
Write
Autonomous Latch
The memory diagramed above will act autonomously. It can
be in any technology. It can be current or voltage controlled.
It can amplify. The only rule is that the Feedback Switch
must remain OFF until CF starts to switch.
Output
Switch
Conductive
Load
Feedback
Switch
Power
Autonomous Latch Operation
charge.
Autonomous Latch UP
voltage drop across the
Conductive Load remains too
to close.
Conductive Load.
Output
Switch
Feedback
Switch
Power
Autonomous Latch DOWN
voltage drop across the
Conductive Load causes the
Feedback Switch to close
Output Switch and latches
applied.
Power
Feedback
Switch
Output
Switch
The circuit operates as desired. It reads the state of the
ferroelectric capacitor during power up, outputs the value of
that state, and restores the FeCap to the original state.
Radi ant Technologies, Inc. Autonomous Memory
Autonomous Memory
Vout
The memory part of the circuit does not include the Feedback
Switch.
Autonomous Memory Power
VOutput = Vpwr t – (1 + )IFE Rsense
VOutput = Vt – IFE where = (1 + )Rsense
Ferroelectric Current
- 1 0
1 0
2 0
3 0
4 0
5 0
6 0
7 0
8 0
9 0
0 . 0 0 . 5 1 . 0 1 . 5 2 . 0 2 . 5 3 . 0 3 . 5 4 . 0 4 . 5 5 . 0
m A
T i m e ( m s )
H a l f L o o p U P : P o l a r i z a t i o n ( µ C / c m 2 ) H a l f L o o p D O W N : P o l a r i z a t i o n ( µ C / c m 2 )
0
10
20
30
40
50
60
70
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
nC
Half Loop DOW N: Po larizat ion (µC/cm2)
VOutput = Vt – IFE
Output Voltage
- 1 0
1 0
2 0
3 0
4 0
5 0
6 0
7 0
8 0
9 0
0 . 0 0 . 5 1 . 0 1 . 5 2 . 0 2 . 5 3 . 0 3 . 5 4 . 0 4 . 5 5 . 0
m A
T i m e ( m s )
H a l f L o o p U P : P o l a r i z a t i o n ( µ C / c m 2 ) H a l f L o o p D O W N : P o l a r i z a t i o n ( µ C / c m 2 )
VOutput = Vt – IFE
• Rsense = 10k
• Rbase = 1k
Opposing Read Values
Vout
-1
0
1
2
3
4
5
6
0 1 2 3 4 5 6 7 8 9 10
V o
lt s
UP
DOWN
Current Limiter
0
5000
10000
0.0
2.5
5.0
0.0
2.5
5.0
0 1 2 3 4 5 6 7 8 9 10
T o
ta l
C h
a r
g e
D r
iv e
V o
lt s
Time (ms)
Vout
Create an Autonomous Latch
Autonomous Latch
across Rsense.
• T2 remains OFF.
• T1 remains OFF.
Power
CF
T1
Input
Rsense
Rbase
Autonomous Latch
across Rsense.
DOWN state.
Power
CF
T1
Input
Rsense
Rbase
CMOS Version
bipolar circuit.
CMOS Version
bipolar circuit.
the value of CF to act as the
sense capacitor for CF.
CMOS Version
of T1 is too small.
• A ferroelectric capacitor
sense capacitance is then
areas.
Power
CF
T1
Input
Rsense
pMEMs Version
film capacitors on etched
latch circuit.
Supply Voltage • The autonomous latch is not
limited to computer-grade
for which the circuit
bulk ceramic PZT capacitor is
used as CF.
• This property allows the autonomous memory to operate
from the same voltage as the system or circuit it controls.
Reduced System Cost
system costs.
requires a complete microprocessor system with boot code
and regulated 5V or 3.3V power.
• Autonomous memory requires no microcontroller, no booting
sequences, and no external power conditioning other than that
supplied to the component to which it is connected.
• An example follows.
NV Solid State Switch
controlling two complementary 200mA solid state
switches.
• The thin PZT film capacitor is in the TO-18 package.
High Current Solid
Power Buffering
Input Power
Power Buffering
Input Power
the system power and the
autonomous bit to protect against
power glitches and noise
power is properly applied to the
autonomous memory circuit on
on power down.
nvSSS Power
• The voltage regulation on the nvSSS allows the circuit to
operate over a range of supply voltages: ±15V.
• The solid state switches are rated for ±36V but the off-the-
shelf voltage regulators are limited to ±15V.
• This is a significant amount of circuitry to allow one tiny
PZT capacitor to give memory to 200 milliamps.
• The extra components makes this circuit extremely
reliable in noisy or disruptive conditions.
Scaling Factors
memory fabricated with ferroelectric capacitors is that,
like silicon semiconductors before it, the technology may
be implemented at any size scale.
• Circuits may be built completely from discrete
components.
• The same circuit may be integrated onto a die the size of a
pin head.
Alternate Packaging
• All of the discrete components of the nvSSS besides the
ferroelectric capacitor are available in the solid state
circuit process of the voltage regulator.
• The circuit board may be reduced to a single SOIC plus
the discrete capacitor in the TO-18 package.
Two
package
solution
Flip Chip
• The non-volatile solid state switch may be reduced to a
single package by flip bonding the ferroelectric capacitor
die to the analog circuitry die.
• This allows the two processes to be optimized
independently without cross-interference.
Integration
capacitor directly on the die with the analog circuitry in
the same manner as FRAM.
• The primary limitation is the effect of the ferroelectric
sintering temperature on the silicon devices.
• Integration is suitable for high volume production where
the development cost of integrating the processes can be
spread across a large number of units.
Event Detection
Event Detection
• Leave the
Event Detection
• Leave the
Event Detection
possible with existing electronic components.
• Any source of energy may be used as a sensor for an event.
Water wheel
Piezoelectric strap
Static discharge
increase the scope of applications for event detection and
recording.
Energy Requirements
required to saturate it in one direction.
• The geometry of the ferroelectric capacitor is the factor in
determining the amplitude of that energy quantum.
• The geometry of ferroelectric capacitor of the autonomous
memory is adjustable to provide the memory with both
sensitivity and protection.
Energy Requirements
• The nvSSS has an fixed internal operating voltage of 4.2V.
• High quality discrete thin PZT film capacitors require
approximately 70C/cm2 of polarization to switch from one
state to the other.
0.7pC = 70C/cm2 x 1m2
Energy = Charge x Voltage
3pJ = 0.7pC x 4.2V
• Rule of thumb: 0.7pC and 3pJ per square micron capacitor
area.
Power Requirements
• Ferroelectric capacitors are fully static meaning that the
hysteresis loop may run very fast or very slow with the same
result.
event detection is a function of the switching time.
Power = Energy / time
3nW = 0.7pC / 1ms
Protection from Disturbances
• Many events in nature and factories apply fast, high voltage
spikes across electronic circuitry.
• The ferroelectric capacitor of an autonomous memory must
be sized large enough that the energy of the largest possible
disturbance is only a faction of the energy stored in the
capacitors memory state.
Applications
What can I do with a single bit?
We are so used to high density memory that the concept of a
single bit being useful is at first hard to comprehend.
Local memory imparts local intelligence!
Event Recorders – Failure Analysis
• The use of event detectors for classic security applications is
obvious.
• Autonomous memory bits spread throughout a system can be
written by detectors in less than one hundred nanoseconds.
On re-start the set bits may explain why the failure
occurred.
monitor, cooling system, and electromechanical driver
circuits all recording unplanned events – a rudimentary
nervous system.
Autonomous ADC
resistor network to produce a passive autonomous ADC.
Input
Write
Programmable EMS
Programmable EMS
Inexpensive Ferroelectric Memory
• Autonomous memory may provide a method for adding a few
inexpensive bits of non-volatile memory to IC products
without full FRAM integration.
• The memory bits will need no overhead in the form of control
and addressing circuitry. The “Read Enable” line from the
master circuit becomes the power line to the autonomous
memory latches which in turn output their stored data after
receiving the “power”.
• The ferroelectric capacitors may be fabricated separately and
flip bonded to the die carrying the silicon IC circuits to
achieve high reliability for non-volatility at low cost.
Inexpensive Ferroelectric Memory
• NV status registers.
• Small on-board microprocessor NV storage.
• On-board external event recorders.
Radiation Hard Memory
transistors.
• Autonomous memory circuits flip bonded to a bipolar carrier
may provide a path for space qualified non-volatile memory
capable of “operate-through” during high dose rate events.
• Autonomous memory operation has been demonstrated with
bipolar and thin-ferroelectric-film-gate transistors.
ferroelectric relays, IC CMOS, or IC bipolar.
• It requires no clocks or control lines to perform its function
but only needs protection from voltage spikes on its power.
• The technology does not compete with FRAM but instead
provides opportunities for completely original product
definitions.
Conclusion
Ferroelectric memory may soon be found in
unexpected places.

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Autonomous Memory - About Radiant Technologies, Inc