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22000099 Tutorial 1
BiTS Workshop 2009 Archive
ARCHIVE 2009
SOCKETS 101: A BROAD AND DEEP SURVEY OF TEST INTERCONNECT SOLUTIONS by
Jon Diller Director of International Sales & Marketing
Interconnect Devices, Inc.
ABSTRACT
his tutorial offers a comprehensive study of test sockets. With an emphasis on socket technology, the role of the socket in the test interface will be defined from electrical and mechanical perspectives. Plus,
commercial aspects, some history and a future roadmap will be discussed. T The many options for electrical contacts, which are perhaps the most critical factor in the success of a socket as a transparent interconnect, will be described and compared in detail. Their anatomies, advantages, and vulnerabilities will be made plain to attendees regardless of their background and experience.
Likewise, various socket materials and their limitations will be reviewed. The features which integrate the test socket with its compression mechanism (be it manual lid or robotic test handler) will be covered to provide an understanding of how they shape the socket platform.
This leads naturally into how devices can be aligned within sockets, which in turn will carry the discussion into a comparison of various techniques for alignment such as floating nests and strip test.
High-frequency behavior will be touched upon briefly, to the extent necessary for typical engineers to select contacts and specify socket constructions.
Finally, maintenance and life-tracking will be reviewed with an eye toward better and more economical test strategies. Engineers who attend this session, regardless of their experience with test sockets, should leave with a fundamental and comprehensive understanding of test sockets in terms of application, specification, and selection.
COPYRIGHT NOTICE The papers in this publication comprise the proceedings of the 2007 BiTS Workshop. They reflect the authors’ opinions and are reproduced as presented , without change. Their inclusion in this publication does not constitute an endorsement by the BiTS Workshop, the sponsors, BiTS Workshop LLC, or the
authors.
There is NO copyright protection claimed by this publication or the authors. However, each presentation is the work of the authors and their respective companies: as such, it is strongly suggested that any use
reflect proper acknowledgement to the appropriate source. Any questions regarding the use of any materials presented should be directed to the author/s or their companies.
All photographs in this archive are copyrighted by BiTS Workshop LLC. The BiTS logo and ‘Burn-in &
Test Socket Workshop’ are trademarks of BiTS Workshop LLC.
22000099 Tutorial 1
BiTS Workshop 2009 Archive
Who should have attended this tutorial?
Test engineers who are relatively new to the socket ‘world’ will accelerate their knowledge of sockets, while veteran engineers will gain new insights by having the opportunity to think outside of the boundaries of their direct experience. Others, such as executives, journalists, and academics, whose work takes them close to the socket industry and are seeking a deeper understanding of the socketing field and all its vagaries, will find this tutorial just what they need.
COPYRIGHT NOTICE The papers in this publication comprise the proceedings of the 2007 BiTS Workshop. They reflect the authors’ opinions and are reproduced as presented , without change. Their inclusion in this publication does not constitute an endorsement by the BiTS Workshop, the sponsors, BiTS Workshop LLC, or the
authors.
There is NO copyright protection claimed by this publication or the authors. However, each presentation is the work of the authors and their respective companies: as such, it is strongly suggested that any use
reflect proper acknowledgement to the appropriate source. Any questions regarding the use of any materials presented should be directed to the author/s or their companies.
All photographs in this archive are copyrighted by BiTS Workshop LLC. The BiTS logo and ‘Burn-in &
Test Socket Workshop’ are trademarks of BiTS Workshop LLC.
20092009 Tutorial 1
March 8 - 11, 2009 1
Sockets 101
2009 Burn-in and Test Socket Workshop TutorialMarch 8, 2009
Jon DillerInterconnect Devices, Inc.
A Broad and Deep Survey of Semiconductor Test Interconnect Solutions
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 2
Tutorial Summary
• Introduction• Definitions• Applications• Challenges
20092009 Tutorial 1
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 3
Why: Tutorial Goals
• What can I tell you?• What do you want to know?• Why are sockets important to
you and your company?
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 4
Definitions• A socket is a device which permits
temporary connection to a semiconductor
• A socket is usually part of a system• The best sockets are transparent• The socket must solve positional
uncertainty
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 5
Positional Uncertainty
• Z-axis: compliance• X and Y axes:
alignment
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 6
Four Elements
• Interposer: contact mechanisms• Pocket: alignment mechanisms• Lids: compression mechanisms• Tester side: interface mechanisms
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 7
The Interposer
• An array of compliant interconnects• Axes:
– Contact life– DC behavior– AC behavior– Compliance– Cost
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 8
Interposer Constraints
• Axes:– Pitch– Contact life– DC behavior– AC behavior– Compliance– Cost
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 9
Alignment Mechanisms
• X- and y- axis boundaries • Fiducial elements for vision systems
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 10
Compression Mechanisms
• ‘Lids’ – hinged, open-top, compression plates
• Can add thermal functions
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 11
Interface to Tester
• PCB – Solder– Compression– Receptacle
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 12
Types of Test, Types of Sockets
• Characterization: – Singular– SI demanding– Self-contained– Low throughput
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 13
Characterization Sockets
• High performance interconnects• Varying mounting methods• Self-contained compression (sometimes
thermal) • Often custom
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 14
Types of Test, Types of Sockets
• Burn-in– Massively parallel– Thermal and current
demands– DC only– Low throughput
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 15
Burn-in Sockets
• Hard mounted• Lidded (open or hinged)• Standardized or tooled• Iteratively inexpensive• Less durable
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 16
Types of Test, Types of Sockets
• Functional Test– AKA ‘Sort’ or ‘Final’
or ‘Production’ test– Automated – high
throughput– Moderately to
significantly parallel– ‘At speed’ –
interconnect must be solder-like Photo courtesy of
Advantest GmbH
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 17
Functional Test Sockets
• Durable• Made to suit equipment, device –
customized• Cost of use
significant• Often share
roles
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 18
Detail: Alignment Techniques
• Edge alignment (fixed feature)• Edge alignment (replaceable, compliant
features)• Lead alignment • Handler alignment• Vision
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 19
Alignment Considerations
• Wear• Sticking• Tolerance stacks• Hygroscopic growth• Contact patch
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 20
Detail: Compression Techniques
• Compression plate• Hinged lid
(compliant plunger)• Open-top lid• Test handler
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 21
Compression Considerations• Hard stop• Contact damage
– Force– Energy
• Contact compliance• Required contact
force• Thermal
requirements
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 22
Concept: Hysteresis
0.0
10.0
20.0
30.0
40.0
50.0
60.0
70.0
80.0
0.000 0.050 0.100 0.150 0.200 0.250
Stroke (mm)
Forc
e (g
)
JTI Compression Force JTI Extension ForceDyno Compression Dyno Extension
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 23
Detail: Interconnect Types
• Cantilever contact• Spring contact probe• Conductive elastomer• Rocking contact• Microcompliant interconnect
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 24
Concept: Microcontact
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 25
Cantilever Contacts
• Compliance by bending• Metal fatigue• Force curve• Contact wear• Contact length
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 26
Spring Contact Probes
• Direct geometry translation
• Durable• Pitch limited• High SI• Maintainable• No wipe
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 27
Elastomer
• Very high SI• No wipe• Low CTL• Environmental limitations
BallWire™ photos courtesy of Dr. Weiss at Paricon
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 28
Rocking Contact
• Good wipe• Elastomer
fatigue• Short, high SI• Maintainable
Illustration courtesy Johnstech International Corporation
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 29
Microcompliance
• Best SI• Rapid
contamination• No maintainability
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 30
Challenges: Plastic
• Hygroscopic growth
• Pocket wear and detritus
• Stiffness• Precision• ESD
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 31
Challenges: Pitch
• Contact barriers– Cross-section– Aspect ratio– Compliance
• Alignment• Geometry
transformation
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 32
Challenges: SI
• The high cost of CTL• Differential issues• Power considerations• Defining
requirements2 4 6 8 10 12 14 16 180 20
-0.8
-0.6
-0.4
-0.2
-1.0
0.0
freq, GHz
SDD
21, d
B
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 33
Challenges: Durability
• R1 versus R2• Contamination
– Organic– Inorganic– Adhesion
• Failure to penetrate
• Wiping alternatives
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 34
Challenges: Compliance• Limitations on
contact design– Aspect ratios– Lateral
displacement• SI sometimes wins
the battle• Production
disconnect• Parallelism
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3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 35
Challenges: Maintenance
• Off-line versus in-line
• Platingintegrity
• Solvents• Immersion
3/2009 BiTS 2009 Tutorial: Sockets 101 - A Broad and Deep Survey of Semiconductor Test Interconnect Solutions 36
Challenges: Cost
• Economies of scale• Cost of uniqueness• Hidden costs • Cost of ownership calculations