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N66 MLB - PVT
BOM 639-01065 (SUPREME, B30)
BOM 639-01063 (BETTER, B30)BOM 639-00302 (SUPREME, DB30)
BOM 639-01064 (ULTRA, B30)
BOM 639-00299 (BETTER, DB30)BOM 639-00301 (ULTRA, DB30)
MCO 056-00472BRD 820-00040SCH 051-00094
1 OF 60
29
30
20
33
CAMERA: SPHERE DRIVER
CAMERA:STROBE DRIVER
CAMERA:REAR CAMERA B2B
SYSTEM POWER:BATTERY CONN
SYSTEM POWER:PMU (3/3)
SYSTEM POWER:PMU (1/3)
7
LAST_MODIFICATION=Thu Jul 30 15:54:57 2015
SYSTEM POWER:PMU (2/3)
11
13
15
39
WLAN LAT 2.4GHZ BAW BPF
CELLULAR FRONT END: ANTENNA CONNECTORS AND FEEDS
TABLE OF CONTENTS
5
3
4
2 SYSTEM:BOM TABLES
SYSTEM: MECHANICAL COMPONENTS
WIFI/BT: WIFI/BT MODULE
CELLULAR FRONT END: LB PAD
CELLULAR BASEBAND: CONTROL AND INTERFACES
AUDIO:CALTRA CODEC (2/2)
SENSORS:MOTION SENSORS
AUDIO:CALTRA CODEC (1/2)
CELLULAR BASEBAND: POWER2
CAMERA:FRONT CAMERA B2B
SOC:POWER (1/3)
SOC:JTAG,USB,XTAL
SOC:SERIAL & GPIO
56
58
60
9
CELLULAR FRONT END: LB ASM
CELLULAR FRONT END: MB-HB ASM
CELLULAR FRONT END: DIVERSITY
SIM
AUDIO:ARC DRIVER
AUDIO:SPEAKER DRIVER
SOC:POWER (3/3)
21
27
DISPLAY:POWER
TOUCH:ORB & MESA B2B
51
18
22
24
SOC:PCIE
I/O:TRISTAR 2
I/O:DOCK FLEX B2B
I/O:BUTTON FLEX B2B
BASEBAND:RADIO SYMBOL
CELLULAR TRANSCEIVER: DRX/GPS PORTS
CELLULAR TRANSCEIVER: PRX PORTS
CELLULAR TRANSCEIVER: POWER
44
13 15
SYSTEM POWER:CHARGER
49
CELLULAR FRONT END: MB PAD
CELLULAR FRONT END: HB PAD
37
45
47
49
ELNA & UAT ANT FEED
53
CELLULAR BASEBAND: GPIOS
52
11
41
40
23
22
SYSTEM:N66 SPECIFIC
50
59
54
47
48
43
45
34
NAND
1
4
5
6
8
9
10
12
14
17
19
24
25
26
SOC:POWER (2/3)
SOC:CAMERA & DISPLAY
42
38
37
36
35
32
30
31
6
7
8
20
21
10
12
1
DISPLAY:LCM B2B
23
28
3
55
16
STOCKHOLM
57
34
32
46
31
38
40
41
42
36
35
33
CELLULAR TRANSCEIVER: TX PORTS
46 CELLULAR PMU: ET MODULATOR
TABLE OF CONTENTS
DEBUG CONN & TEST POINTS
CELLULAR BASEBAND: POWER1
CELLULAR FRONT END: 2G PA
CELLULAR PMU: CONTROL AND CLOCKS
CELLULAR PMU: SWITCHERS AND LDOS
SOC:OWL
SCHEM,MLB,N66051-00094
2015-07-300004600844A PRODUCTION RELEASED
1 OF 49
A.0.0
TABLE OF CONTENTS
CONTENTS SYNCSYNCPAGE DATE PAGE DATECONTENTS
PROPRIETARY PROPERTY OF APPLE INC.
REVISION
ECNREV DESCRIPTION OF REVISION
DRAWING TITLE
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
CKAPPD
2 1
1245678
B
D
6 5 4 3
C
A
PAGE
C
A
D
DATE
R
SHEET
DSIZEDRAWING NUMBER
BRANCH
7
B
3
II NOT TO REPRODUCE OR COPY IT
IV ALL RIGHTS RESERVED
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
8
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
NOTICE OF PROPRIETARY PROPERTY:
Apple Inc.
Administrator打字机文本
NAND BOM OptionsActive Diode Alternate Schematic & PCB Callouts
AP Alternates
SOC/PMU SUB BOMS
SEP EEPROM Alternate
DDR PLL Alternate
Power Inductor Alternates
Low Noise Caps
Global Capacitor Alternates
Global Varistor Alternates
Inductor Sub BOMs
Global Ferrite Alternates
Shield Callouts
SIM Callouts
Carbon BOM Options
2 OF 60
3 OF 49
A.0.0
051-00094
NAND_64G
CRITICAL
512S00013
806-04265
1 SIM, Integrated Eject, N66
LOWER FRONT SHIELD1
J3001_RF COMMONCRITICAL
COMMONCRITICALSH0501
FLTR, 65 OHMS, 0605
ALTERNATE
ALTERNATE
138S0702
685-00082 685-00083
IND,PWR,SHLD,0.47UH,3.8A,0.048 OHM,2012152S00121 6
IND,PWR,SHLD,1.0UH,3.6A,0.060O HM,201612152S00117
12152S00074 IND,PWR,SHLD,1.0UH,3.6A,0.060O HM,2016
IND,PWR,SHLD,0.47UH,3.8A,0.048 OHM,20126152S00081
1685-00083 SUBBOM,SINGLE,BRD,CYNTEC,N66
377S0168 377S0140
155S0660 155S0513
155S0941155S0960
155S00009155S00012
155S00067 155S0581
155S0511155S0653
155S0773 155S0453
152S2052 152S1929
138S0945 138S0739
138S00024 138S0986
138S0706 138S0739
138S0831138S00049
138S00032 138S0831
132S0436132S0400
138S0652138S0648
138S00048 138S00003
138S00005 138S00003
118S0717118S0764
138S0657
138S00006 138S0835
ALTERNATE SUBBOM_IND SUBBOM,SINGLE,BRD,TAIYO,N66
TAIYOL2001,L2003,L2011,L2013,L2021,L2041
TAIYOL2000,L2002,L2010,L2012,L2020,L2030,L2040,L2050,L2300,L3300,L4021,L4051
L2000,L2002,L2010,L2012,L2020,L2030,L2040,L2050,L2300,L3300,L4021,L4051 CYNTEC
CYNTECL2001,L2003,L2011,L2013,L2021,L2041
SUBBOM_IND COMMON
ALTERNATE VARISTOR, 6.8V, 100PF, 01005?
FERR, 22 OHMS, 0201?ALTERNATE
? FERR, 70 OHMS, 01005ALTERNATE
ALTERNATE ?
? FERR, 240OHM, 0.38OHM DCR, 0201ALTERNATE
FERR, 33OHM, 0.09OHM DCR, 0201?ALTERNATE
ALTERNATE FERR, 120OHM, 0.8OHM DCR, 01005?
?ALTERNATE IND, 1UH, 1.2A, 0603
ALTERNATE CAP,CER,1UF,20%,10V,X5R,0201,KYOCERA?
CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK?
? CAP,CER,1UF,20%,10V,X5R,0201,MURATA
CAP,X5R,2.2UF,6.3V,0201,KYOCERAALTERNATE ?
ALTERNATE CAP,X5R,2.2UF,6.3V,0201,TAIYO?
ALTERNATE ? CAP,X5R,0.22UF,6.3V,01005,TDK
? CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYOALTERNATE
ALTERNATE ? CAP,X5R,15UF,6.3V,0.65MM,0402,KYOCERA
?ALTERNATE CAP,X5R,15UF,6.3V,0.65MM,0402,TAIYO
ALTERNATE ? RES, 3.92K, 0.1%, 0201
?ALTERNATE CAP, X5R, 4.3UF, 4V, 0610
? CAP, 3-TERM, 4.3UF, 4V, 0402ALTERNATE
152S1929
3 CAPS_LOW_NOISECAP,X5R,10UF,20%,6.3V,0.65MM,0402,INTPOSER C2085, C2086, C2087998-01223
CAP,X5R,10UF,20%,6.3V,0.65MM,HRZTL,0402 CAPS_NORMAL3 C2085, C2086, C2087138S0867
ALTERNATE IC,EEPROM,16KX8,1.8V,I2C,WLCSP4,ONSEMIU0900335S0946335S00066
ALTERNATE155S00068155S00095 FL1280 FERR BD,100OHM,25%,100MA,2OHM,01005
$? IND,MULT,1UH,1.2A,0.320 OHM,0603ALTERNATE152S2052
152S00120 152S00077 IND,PWR,SHLD,1.0 UH,2.25A,0.150 OHM,2016$?ALTERNATE
152S00118 152S00075 $?ALTERNATE IND,PWR,SHLD,1.2 UH,3.0A,0.080 OHM,2016
U3010338S00087 1 CARBON, INVENSENSE MPU-6800
338S00017 1 CARBON, INVENSENSE U3010 CRITICAL
DISCRETE ACCEL, BOSCH338S1163 U30301 CRITICAL
U3030338S1163 1 DISCRETE ACCEL, BOSCH CRITICAL
CARBON_INVENSENSE_6800
CARBON_INVENSENSE
CARBON_INVENSENSE
NOSTUFF
CRITICAL
CRITICAL
CRITICAL
EEEE_SUPREME_B30
685-00071 COMMON1 SUBBOM_SOCSUBBOM,MLB,MAUI,N66
MAUI338S00120 U20001 IC,PMU,ANTIGUA,A1,AL,WLCSP380
RES,MF,100 OHM,1%,1/32W,01005 MAUI118S0631 1 R0730
CAP,CER,NP0/C0G,100PF,5%,16V,01005 MAUI1131S0307 C0730
PROD FUSED, H DRAM339S00112 MAUI1 U0600
RES, MF, 0 OHM, 01005 R0651117S0161 MAUI1
RES,MF,3.01KOHM,1%,1/32W,010051118S00009 MALTAR0730
IC,PMU,ANTIGUA,A1,ZL,WLCSP380338S00122 MALTA1 U2000
CAP,CER,NP0/C0G,100PF,5%,16V,01005 NOSTUFF131S0307 1 C0730
118S00025 1 RES, MF, 330 OHM, 1%, 1/32W, 01005 MALTAR0651
M PROD FUSED, M DRAM339S00124 MALTA1 U0600
685-00072 ALTERNATE685-00071 SUBBOM,MLB,MALTA,N66SUBBOM_SOC
339S00112339S00113 PROD FUSED, M DRAMU0600MAUI
339S00112339S00114 PROD FUSED, S DRAMU0600MAUI
339S00124339S00125 M PROD FUSED, H DRAM, ATKU0600MALTA
339S00124339S00126 MALTA U0600 M PROD FUSED, S DRAM, ATK
MALTA339S00124 M PROD FUSED, H DRAM, SCKU0600339S00128
339S00124 M PROD FUSED, M DRAM, SCKU0600MALTA339S00127
339S00124 M PROD FUSED, S DRAM, SCKU0600MALTA339S00129
EEEE_BETTER_DB30
EEEE_SUPREME_DB30
CRITICALEEEE_G3601 EEEE CODE FOR 639-00299825-6838
051-00094 1 ?SCHSCH,SINGLE_BRD,N66
PCBF,SINGLE_BRD,N66 ?CRITICALPCB820-00040 1
1825-6838 EEEE_G35W EEEE_ULTRA_DB30EEEE CODE FOR 639-00301
EEEE CODE FOR 639-00302825-6838 1 CRITICALEEEE_G35V
EEEE_GKKY CRITICAL1825-6838 EEEE_BETTER_B30EEEE CODE FOR 639-01063
EEEE_ULTRA_B30CRITICAL1 EEEE_GKL0825-6838 EEEE CODE FOR 639-01064
EEEE CODE FOR 939-01539 CRITICAL EEEE_BETTER_DARWINEEEE_GPMW1825-6838
1825-6838 EEEE CODE FOR 639-01065 EEEE_GKL1
376S00106 DIODES INC. ACT DIODEQ2300ALTERNATE376S00047
U1500 CRITICAL NAND_16G1335S00039 NAND,1YNM,16GX8,S3E,64G,T,SLGA70
1 U1500 CRITICAL NAND_64G335S00075 NAND,1YNM,64GX8,S3E,MLB,64G,H,SLGA70
NAND_128GU15001 CRITICAL335S00079 NAND,1YNM,64GX8,S3E,128G,H,SLGA70
335S00075 U1500 HYNIX 64G SLGA70NAND_64G335S00078
HYNIX 16G SLGA70 C DIEU1500NAND_16G335S00074 335S00039
U1500 SANDISK 64G SLGA70 1Z335S00075335S00064
U1500NAND_128G SANDISK 128G SLGA70335S00079335S00065
SYSTEM:BOM TABLES
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICALTABLE_5_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
PART# DESCRIPTIONQTYTABLE_5_HEAD
BOM OPTIONREFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
PART# DESCRIPTIONQTYTABLE_5_HEAD
BOM OPTIONREFERENCE DESIGNATOR(S)
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICAL
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
PART# DESCRIPTIONQTYTABLE_5_HEAD
BOM OPTIONREFERENCE DESIGNATOR(S)
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
PART# DESCRIPTIONQTYTABLE_5_HEAD
BOM OPTIONREFERENCE DESIGNATOR(S)TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
PART# DESCRIPTIONQTYTABLE_5_HEAD
BOM OPTIONREFERENCE DESIGNATOR(S)TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICALTABLE_5_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD
BOM OPTIONCRITICALTABLE_5_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER
TABLE_5_ITEM
Administrator打字机文本http://www.mfcbox.com
1001 PVT SELECTED -->1010 DVT
BOOTSTRAPPING:BOARD REVBOARD ID
FORCE DFU
1011 CARRIER
BOARD_ID[4:0]
POWER
POWER GROUND
POWER GROUND
VBUS
VBATT
MOJAVE
ANALOG MUX B OUTPUT
LCM BACKLIGHT SINK1
LCM BACKLIGHT SOURCE
LCM BACKLIGHT SINK2
AMUX
LCM BACKLIGHT SOURCE (3/4)
SOC & BB RESET
0X34
I2C2
I2C BUS
I2C0
IN THE FACTORY FIXTURE.
ACCESSORY ID AND POWER
ANALOG MUX A OUTPUT
ARC DRIVER
LCM BACKLIGHT SINK4
LCM BACKLIGHT SINK3
LCMBACKLIGHT 2
0101001X
0XE8
0xA2
0xB0
TBD
N/A
0x80
0X20
0XC6
0X4E
0XA2
0XEA
0X82
0X80
0X52
1100011X
1100011X
MESON
UNUSED
MAMBA
DOPPLER
REAR CAM
FRONT CAM
LED DRIVER
SEP EEPROM
TRISTAR
TIGRIS
DISP EEPROM
0X1A
0X41
0100111X
ISP I2C0
OWL
8-BIT HEX
1110101X
0X74
7-BIT HEX
0X75
0X29
0X51
0x40
0X10
TBD
0x58
0x60
0x51
N/A
0X63
0X27
BINARY
N/A
TBD
0010000X
1010001X
1100000X
1011000X
1110100X
ALS
TOUCH I2C
SEP I2C
ISP I2C1
DEVICE
TP IS TO HELP WITH USB SI
FOR DIAGS
E75
TESTPOINTS
DFU
RESET
BOOT CONFIG
1100 EVT-MD 1101 EVT 1110 PROTO2 1111 PROTO1
FLOAT=LOW, PULLUP=HIGHBOARD_REV[3:0]
1010001X
0xC0
1000001X
N66 I2C DEVICE MAP
0X40
0011010X
1000000XSPEAKER AMP
I2C1
ANTIGUA PMU
CHESTNUT
BACKLIGHT 1 1100011X 0XC4
0X62 0XC4
0X62
1000000X
UAT GND Ring Opening
00100 N71 MLB
FLOAT=LOW, PULLUP=HIGH
00101 N71 DEV
BOOT_CONFIG[2:0]
000 SPI0
FLOAT=LOW, PULLUP=HIGH
001 SPI0 TEST MODE010 NVME0_X2
100 NVME0 X1101 NVME0 X1 TEST111 FAST SPI0
011 NVME0 X2 TESTSELECTED -->
00110 N66 MLB00111 N66 DEV
SELECTED -->
3 OF 60
VOLTAGE=0V
4 OF 49
A.0.0
051-00094
5%
ROOM=SOC
5%
NOSTUFF21R0402
01005 MF 1/32W1.00KROOM=SOC
R040301005
1 21/32W
01005
R040101005
PMU_AMUX_AY
PP_LCM_BL_CAT1_CONN
PP1V8
PP_LCM_BL_ANODE_CONN
PP_LCM_BL34_ANODE_CONN
BOOT_CONFIG1
DFU_STATUS
TRISTAR_DP2_CONN_N
PP_TRISTAR_ACC1
BOOT_CONFIG2
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_REV3
BOOT_CONFIG0
PP_LCM_BL_CAT4_CONN
FORCE_DFU
TRISTAR_CON_DETECT_L
PP_TRISTAR_ACC2
TRISTAR_DP2_CONN_P
TRISTAR_DP1_CONN_N
TRISTAR_DP1_CONN_P
MESA_TO_BOOST_EN
PMU_TO_SYSTEM_COLD_RESET_L
PP_LCM_BL_CAT2_CONN
PP_LCM_BL_CAT3_CONN
PP16V5_MESA
GND
PMU_AMUX_BY
PP5V0_USB
PP_BATT_VCC
BOARD_REV1
BOARD_REV0
BOARD_REV2
PP1V8
SYSTEM:N66 SPECIFIC
TP-P55ROOM=TEST
TP231
ROOM=TEST
SMP4MM-NSMPP061
P4MM-NSMSM
ROOM=TEST
PP081
P4MM-NSMSM
ROOM=TEST
PP071
1/32W
NOSTUFF
5%010051.00K
MF
ROOM=SOCR0411 1 2
1.00K01005
ROOM=SOC
MF 1/32W5%
R0410 1 2
NOSTUFFR0409 ROOM=SOC
1/32W1.00K2
5%MF010051
ROOM=TESTTP-P55
TP141
ROOM=TESTTP-P5
TP021
ROOM=SOC
5%MF 1/32W1.00KR0400 1 2
NOSTUFFROOM=SOC
5% 1/32WMF1.00K1 2
NOSTUFFROOM=SOC 1.00K
01005 MF 1/32W5%
R0404 1 2
1.00KMF
5%010051.00K
MF 1/32W
ROOM=SOCR0406 1 2
NOSTUFF
010051.00K
5%MF 1/32W
ROOM=SOCR0405 1 2
R0407 ROOM=SOC 1.00K01005 5% 1/32WMF
1 2
1.00KNOSTUFF
01005 1/32W
ROOM=SOC
5%MFR0408 1 2
ROOM=TESTTP-P55
TP071
ROOM=TESTTP-P55
TP161
ROOM=TESTTP-P55
TP171
ROOM=TESTTP-P55
TP221
ROOM=TESTTP-P55
TP211ROOM=TESTTP-P55
TP201
ROOM=TESTTP-P55
TP151
ROOM=TESTTP-P5
TP131
TP-P5ROOM=TEST
TP121
TP-P5ROOM=TEST
TP111ROOM=TEST
TP-P5
TP101
TP-P5ROOM=TEST
TP091
TP-P5ROOM=TEST
TP081
ROOM=TESTTP-P55
TP191ROOM=TESTTP-P55
TP181
TP-P5ROOM=TEST
TP041
ROOM=TEST
0.50MMSM
PP091
ROOM=TESTTP-P5
TP031
TP-P55ROOM=TEST
TP011
ROOM=TESTTP-P5
TP001
ROOM=TESTTP-P55
TP241
ROOM=TESTTP-P55
TP251
16
30
34 30 21 20 17 14 13 12 9 8 7 6 5 3
30
30
8
34 8
32 31
32 31
8
8
8
8
8
8
8
8
30
34 8
32 31
32 31
32 31
32 31
32 31
29 28
34 16 9 5
30
30
29 28
16
32 31 17
18 17
8
8
8
34 30 21 20 17 14 13 12 9 8 7 6 5 3
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
A
PP
PP
PP
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
PP
A
A
A
A
A
Administrator打字机文本http://www.mfcbox.com
TOP SIDE
806-02349
860-00175
998-00099
THREADED STANDOFF
DOUBLE COAX CLIP
806-04265
TIGRIS/SPKR INDUCTOR SHIELD806-04068
860-00176SOUTH TUBE STANDOFF
806-01802
PLATED SLOTTED THRU-HOLE
THREADED STANDOFF
(BLOCKS DC CURRENT THROUGH COMPASS REGION)MLB NORTH PENINSULA AC CHASSIS SHORT
TODO: TUNE AC CAPS FOR ANTENNA RF GND
BOTTOM SIDE
TUBE STANDOFF: STOCKHOLM FEED
TUBE STANDOFF
806-02354
860-00176
860-00175
FIDUCIALS860-5189
COAX CLIP BRACE
806-02353
806-02352
860-00177TUBE STANDOFF
860-00175THREADED STANDOFF
4 OF 60
5 OF 49
A.0.0
051-00094
OMIT_TABLE
SH0500SM
SHLD-EMI-UPPER-FRONT-N66
STDOFF-2.9OD0.888H-SM
ROOM=ASSEMBLY
ROOM=ASSEMBLY
BS0511
SHLD-EMI-LOWER-FRONT-CLOSE-N66
SHLD-EMI-SA-OPEN-N66
SH0502
AP_TO_STOCKHOLM_ANT
NORTH_AC_GND_SCREW
PP_VCC_MAIN
NORTH_AC_GND_SCREW
SYSTEM: MECHANICAL COMPONENTS
SHLD-EMI-LOWER-BACK-N66
ROOM=ASSEMBLY
SMSH0504
1
ROOM=ASSEMBLY
SHLD-EMI-UPPER-BACK-N66
SMSH0503
1
1SH0501
SM
ROOM=ASSEMBLY
1
ROOM=ASSEMBLY
SM
1
CLIP-BRACE-COAX-N66
SMCL0501
12345
220PF
ROOM=ASSEMBLY
X7R-CERM01005
10%10V
C05501
2 NP0-C0G01005
ROOM=ASSEMBLY
100PF16V5%
C05511
2
ROOM=ASSEMBLY
01005NP0-C0G
100PF16V5%
C05521
2 NP0-C0G
4.7PF+/-0.1PF
ROOM=ASSEMBLY
16V
01005
C05531
2
ROOM=ASSEMBLY
STDOFF-2.6OD0.648H-THBS0530
1
ROOM=ASSEMBLY
STDOFF-2.6OD0.648H-THBS0531
1
ROOM=ASSEMBLYSTDOFF-2.6OD0.808HBS05131
ROOM=ASSEMBLYSTDOFF-2.49OD1.4ID-1.25H-SM
BS05201
ROOM=ASSEMBLY
1
BS0512STDOFF-2.9OD0.888H-SM
1
ROOM=ASSEMBLY
STDOFF-2.9OD0.888H-SMBS05101
ROOM=ASSEMBLY
1
BS0500STDOFF-2.6OD0.808H
FID0P5SM1P0SQ-NSP
ROOM=ASSEMBLY
FD05011
0P5SM1P0SQ-NSPFID
ROOM=ASSEMBLY
FD05021
FID
ROOM=ASSEMBLY
0P5SM1P0SQ-NSP
FD05041
FID0P5SM1P0SQ-NSP
ROOM=ASSEMBLY
FD05031
ROOM=ASSEMBLY
FID0P5SQ-SMP3SQ-NSP
FD0510
1
FID0P5SM1P0SQ-NSP
ROOM=ASSEMBLY
FD05051
FID0P5SQ-SMP3SQ-NSP
ROOM=ASSEMBLY
FD0511
1
FID0P5SQ-SMP3SQ-NSP
ROOM=ASSEMBLY
FD0512
1
FID0P5SQ-SMP3SQ-NSP
ROOM=ASSEMBLY
FD0513
1
0P5SQ-SMP3SQ-NSPFID
ROOM=ASSEMBLY
FD0514
1
ROOM=ASSEMBLY
FID0P5SQ-SMP3SQ-NSP
FD0515
1
TH-NSP1
CL0502
SL-1.20X0.40-1.50X0.70-NSP
SM
CLIP-RETENTION-COAX-DOUBLE
CL05001
34
33 4
34 29 28 27 26 25 23 22 21 17 15 14
33 4
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
Administrator打字机文本http://www.mfcbox.com
Administrator打字机文本
VDD12_PLL_LPDP:1.14-1.26V @2mA MAX
PROBE POINTS
VDD18_USB: 1.71-1.89V @20mA MAXVDD18_XTAL:1.62-1.98V @2mA MAX
PCB: PLACE THIS XW
VDD12_PLL_CPU: 1.14-1.26V @2mA MAXVDD12_PLL_SOC: 1.14-1.26V @12mA MAX
3.14-3.46V @5mA MAX
AT U1, NEAR XI/XO
MAUI - USB, JTAG, XTAL
5 OF 60
051-00094
6 OF 49
A.0.0
VOLTAGE=1.8V
VOLTAGE=1.2V
VOLTAGE=0V
2
1 C06006.3VX5R-CERM
ROOM=SOC01005
0.1UF20%
2
1 C06026.3V
ROOM=SOC
10%0.01UF
X5R01005
21R0600
01005ROOM=SOC
MF
0%
0.00
1/32W
2
1 C06036.3V
01005
0.01UF
ROOM=SOC
10%
X5R2
1 C06126.3V
ROOM=SOC01005
0.1UF20%
X5R-CERM
21XW0650
SHORT-10L-0.1MM-SM
ROOM=SOC
2
1 C06206.3V
0.1UF
ROOM=SOC01005
20%
X5R-CERM
2
1 C06016.3V
ROOM=SOC
X5R-CERM01005
20%0.1UF
2
1 C065016V5%12PF
CERM
ROOM=SOC01005
31
42
Y06001.60X1.20MM-SM
24.000MHZ-30PPM-9.5PF-60OHM
CRITICALROOM=SOC
2
1 C0651
ROOM=SOC
16V
12PF
CERM5%
01005
21
FL0610
ROOM=SOC
1KOHM-25%-0.2A
0201
2
1 C06116.3V
ROOM=SOC
X5R-CERM01005
0.1UF20%
2
1 C06106.3V
ROOM=SOC
X5R-CERM0201
2.2UF20%
2
1
MF
1%1/32W
AL35AK35
Y33
AN20
AL34
AL21
C15
AP21
W19
T19
U20
F22
AF13
AP19
AP18
AR19
AT20AT19
D15C16
AN21AN22
AR23
AF6
AN23
AC32
AB32
AB31AA32
AA31
Y32
H32
AG25AL22
AC31
H33
AP24
U0600
ROOM=SOC
CRITICAL
MAUI-2GB-25NM-DDR-HFCMSP
SC58980B0B-A040
OMIT_TABLE
1 PP0600SMP3MM-NSMROOM=SOC
1 PP0601SMP3MM-NSMROOM=SOC
1 PP0610SMP3MM-NSMROOM=SOC
SOC:JTAG,USB,XTALSYNC_MASTER=N71_SINGLE_BRD SYNC_DATE=05/29/2014
AP_XTAL_GND
USB_AP_DATA_P
AP_TO_PMU_AMUX_OUT
PP3V3_USB
PP1V2_PLLPP1V2
USB_AP_DATA_N
AP_TO_NAND_RESET_L
AP_TO_PMU_WDOG_RESET
SWD_DOCK_TO_AP_SWCLK
PMU_TO_OWL_ACTIVE_READY
PP1V8_XTAL
PP1V8
USB_AP_DATA_P
AP_TO_PMU_TEST_CLKOUT
SOC_24M_O
USB_AP_DATA_N
2
1
01005
200
ROOM=SOC
MF
1%1/32W
R0640
R0650
01005
AP_TO_PMU_TEST_CLKOUT
PMU_TO_SYSTEM_COLD_RESET_L
SWD_DOCK_BI_AP_SWDIOUSB_VBUS_DETECT
USB_REXT
511K
XTAL_AP_24M_INXTAL_AP_24M_OUT
ROOM=SOC
01005MF
0.00
0%1/32W
ROOM=SOC
R06511 2
OMIT_TABLE
5 31
16
15
6 7 15
5 31
13
5 16
3 9 16 34
31
31
9 16 28 31
17
3 6 7 8 9 12 13 14 17 20 21 30 34
5 31
5 16
5 31
16
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PP
PP
PP
SYM 1 OF 14
USB_D_NUSB_D_P
S3E_RESET*
TST_CLKOUT
HOLD_RESET
TESTMODE
WDOG
XO0XI0
USB_REXT
FUSE1_FSRCFUSE2_FSRC
COLD_RESET*
JTAG_TCKJTAG_TMSJTAG_TDI
CFSB
JTAG_TRST*JTAG_TDO
UH2_HSIC1_DATA
UH1_HSIC0_DATAUH1_HSIC0_STB
JTAG_SEL
UH2_HSIC1_STB
USB_ID
VDD1
2_UH
1_HS
IC0
VDD1
2_UH
2_HS
IC1
VDD1
8_XT
AL
VDD3
3_US
B
VDD1
2_PL
L_LP
DP
ANALOGMUX_OUT
USB_VBUS
VDD1
8_US
B
VDD1
2_PL
L_CP
U
VDD1
2_PL
L_SO
C
NCNC
NC
NCNCNC
NCNC
Administrator打字机文本http://www.mfcbox.com
PC
IE L
INK
0
PROBE POINTS
VDD12_PCIE_REFBUF:1.08-1.26V @50mA MAXVDD12_PCIE_TXPLL: 1.08-1.32V @10mA MAXVDD12_PCIE: 1.14-1.26V @115mA MAX
PCIE RX CAPS ARE PLACED CLOSER TO TX DRIVERSPROBE POINTS ADDED FOR MEASUREMENTS AT RX DRIVER
PCIE
LIN
K 2
PCIE
LIN
K 1
VDD085_PCIE:0.802-TBDV @TBDmA MAX
MAUI - PCIE INTERFACES
6 OF 60
7 OF 49
A.0.0
051-00094
PCIE_AP_TO_WLAN_TXD_C_P
PCIE_AP_TO_WLAN_RESET_L
PCIE_BB_TO_AP_RXD_C_P
PCIE_AP_TO_NAND_TXD1_C_N
PCIE_RCAL_P
PP_FIXED
PCIE_AP_TO_BB_REFCLK_P
PCIE_BB_BI_AP_CLKREQ_L
PCIE_BB_TO_AP_RXD_NPCIE_BB_TO_AP_RXD_P
PCIE_WLAN_TO_AP_RXD_P
PCIE_AP_TO_WLAN_TXD_N
PCIE_WLAN_TO_AP_RXD_N
PCIE_AP_TO_WLAN_TXD_P
PP1V8
PCIE_NAND_TO_AP_RXD0_P
PCIE_AP_TO_WLAN_REFCLK_N
PCIE_AP_TO_NAND_RESET_L
PCIE_AP_TO_BB_TXD_C_N
PCIE_AP_TO_NAND_TXD0_C_P
PCIE_AP_TO_WLAN_REFCLK_P
PCIE_AP_TO_NAND_REFCLK_NPCIE_AP_TO_NAND_REFCLK_P
PCIE_AP_TO_BB_REFCLK_N
PCIE_WLAN_TO_AP_RXD_C_P
PCIE_AP_TO_BB_TXD_NPCIE_AP_TO_BB_TXD_P
PCIE_NAND_TO_AP_CLKREQ_LPCIE_WLAN_TO_AP_CLKREQ_L
PCIE_BB_TO_AP_RXD_C_P
PCIE_BB_TO_AP_RXD_C_N
PCIE_BB_TO_AP_RXD_C_N
PCIE_AP_TO_WLAN_TXD_C_N
PCIE_AP_TO_NAND_TXD1_C_P
PCIE_NAND_TO_AP_RXD0_N
PP1V2
PCIE_EXT_C
PCIE_AP_TO_NAND_TXD0_C_N
PCIE_WLAN_TO_AP_RXD_C_N
PCIE_NAND_TO_AP_RXD1_C_NPCIE_NAND_TO_AP_RXD1_C_P
PCIE_NAND_TO_AP_RXD0_C_PPCIE_NAND_TO_AP_RXD0_C_N
PCIE_AP_TO_NAND_TXD1_NPCIE_AP_TO_NAND_TXD1_P
PCIE_NAND_TO_AP_RXD1_NPCIE_NAND_TO_AP_RXD1_P
PCIE_AP_TO_NAND_TXD0_PPCIE_AP_TO_NAND_TXD0_N
PCIE_RCAL_N
PCIE_AP_TO_BB_RESET_L
PCIE_AP_TO_BB_TXD_C_P
SOC:PCIESYNC_MASTER=N71_SINGLE_BRD SYNC_DATE=05/29/2014
SM
ROOM=SOCP3MM-NSM
PP07061
ROOM=SOC
SM
P3MM-NSMPP07071
OMIT_TABLE
FCMSP
SC58980B0B-A040
MAUI-2GB-25NM-DDR-H
CRITICAL
ROOM=SOC
U0600
AT11AP12AR12AT12
AP29
AT33AR33
AR10AT10AP11AR11
AR30AT30
AP35AN35
AP34AN34
AN32AM32
AN31AM31
AN30AM30
AN28AM28
AN27AM27
AN26AM26
AN25AM25
AR29AT29
AR32AT32
AR31AT31
AR28AT28
AR26AT26
AT24AR24
AK28
AK25
AL24
AL27
AJ26
AL26
AH28
AJ25
AL23
AJ29
AL29
AJ24
AK27
AJ27
ROOM=SOC01005
100K
NOSTUFF
MF1/32W5%
R07221
2
100K1/32WMF01005
ROOM=SOC
5%
R07211
201005ROOM=SOC
5%
MF1/32W
100KR07201
2
01005
100K1/32WMF
5%
ROOM=SOC
R07001
2
100K1/32W5%
01005MF
ROOM=SOC
R07011
2
100K1/32W
01005
5%
MF
ROOM=SOC
R07021
2
OMIT_TABLE
100
01005ROOM=SOC
1%1/32WMF
R07301
2
OMIT_TABLE
NP0-C0G16V
100PF5%
01005ROOM=SOC
C07301
2
010056.3V20%
0.1UFROOM=SOC
X5R-CERM
C0718 1 2
01005
0.1UF20%ROOM=SOC 6.3V
X5R-CERM
C0716 1 2
0.1UF01005X5R-CERM
20%ROOM=SOC 6.3VC0715 1 2
20%0.1UF
ROOM=SOC 6.3V01005X5R-CERM
C0717 1 2
0.1UF
01005X5R-CERM
ROOM=SOC
6.3V20%
C07311
2
20%ROOM=SOC0.1UF
6.3V01005X5R-CERM
C0712 1 220%ROOM=SOC
0.1UF6.3V01005X5R-CERM
C0711 1 2
20%ROOM=SOC0.1UF
6.3V01005X5R-CERM
C0710 1 2
0.1UFROOM=SOC 6.3V
0100520%
X5R-CERM
C0709 1 2
ROOM=SOC 6.3V01005
0.1UF20%
X5R-CERM
C0707 1 2
0.1UFROOM=SOC 6.3V
0100520%
X5R-CERM
C0708 1 2
ROOM=SOC0.1UF
6.3V01005
20%X5R-CERM
C0706 1 2X5R-CERM
ROOM=SOC0.1UF
6.3V01005
20%C0705 1 2
6.3V01005
0.1UF20%ROOM=SOC
X5R-CERM
C0704 1 220%
01005
0.1UF6.3VROOM=SOC
X5R-CERM
C0703 1 2
20%0.1UF
6.3V01005
ROOM=SOCX5R-CERM
C0702 1 26.3V01005
20%0.1UF
ROOM=SOCX5R-CERM
C0701 1 2
ROOM=SOC
6.3VX5R-CERM0201
2.2UF20%
C07501
2
ROOM=SOC
6.3VX5R-CERM0201
2.2UF20%
C07401
2
ROOM=SOC
1.0UF6.3VX5R0201-1
20%
C07411
2
ROOM=SOC
0.1UF
X5R-CERM01005
6.3V20%
C07521
2
ROOM=SOC
X5R-CERM
0.1UF
01005
6.3V20%
C07431
220%6.3V
01005
0.1UF
X5R-CERM
ROOM=SOC
C07421
2
1.0UF
ROOM=SOC
6.3VX5R0201-1
20%
C07511
2
34
6
14 11 7
34
34
34
34
34
34
34
34
34 30 21 20 17 14 13 12 9 8 7 5 3
13
34
13
34
13
13
34
34
34
13
34
6
6
6
13
15 7 5
13
13
13
13
13
13
34
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PP
PP
SYM 2 OF 14
PCIE_RX4_P
VDD1
2_PC
IE
PCIE_REF_CLK2_P
PCIE_REF_CLK1_N
PCIE_REF_CLK0_P
PCIE_PERST3*
PCIE_PERST0*
PCIE_PERST2*PCIE_PERST1*
PCIE_CLKREQ3*
PCIE_CLKREQ1*PCIE_CLKREQ0*
PCIE_CLKREQ2*
PCIE_RX_TX_BYPASS_CLK_PPCIE_RX_TX_BYPASS_CLK_N
PCIE_EXT_REF_CLK_NPCIE_EXT_REF_CLK_P
PCIE_REF_CLK3_NPCIE_REF_CLK3_P
PCIE_REF_CLK2_N
PCIE_RCAL_NPCIE_RCAL_P
PCIE_TX4_NPCIE_TX4_P
PCIE_RX4_N
PCIE_TX3_NPCIE_TX3_P
PCIE_RX3_NPCIE_RX3_P
PCIE_TX2_NPCIE_TX2_P
PCIE_RX2_NPCIE_RX2_P
PCIE_TX1_NPCIE_TX1_P
PCIE_RX1_PPCIE_RX1_N
PCIE_TX0_PPCIE_TX0_N
PCIE_EXT_C
PCIE_RX0_N
PCIE_REF_CLK1_P
PCIE_REF_CLK0_NPCIE_RX0_P
VDD1
2_PC
IE_T
XPLL
VDD1
2_PC
IE_R
EFBU
F
VDD0
85_P
CIE
NC
NCNC
NC
NCNC
NCNC
Administrator打字机文本http://www.mfcbox.com
MAUI - CAMERA & DISPLAY INTERFACES
1.62-1.98V @23mA MAX
EVEN WHEN LPDP IS NOT USED
NOTE:VDD12_LPDP SHOULD BE POWERED
0.756-0.893V @11mA MAX
7 OF 60
8 OF 49
A.0.0
051-00094
AP_TO_FCAM_CLKMIPI_RCAM_TO_AP_CLK_CONN_P
MIPI_FCAM_TO_AP_DATA1_PMIPI_FCAM_TO_AP_DATA1_N
PP1V2
PP1V8
LCM_REXT
AP_TO_FCAM_CLK_R
I2C_ISP_BI_FCAM_SDAI2C_ISP_TO_FCAM_SCL
AP_TO_RCAM_CLK_R
I2C_ISP_TO_RCAM_SCLI2C_ISP_BI_RCAM_SDA
MIPI_RCAM_TO_AP_CLK_CONN_N
MIPI_RCAM_TO_AP_DATA0_CONN_N
MIPI_RCAM_TO_AP_DATA1_CONN_N
MIPI_RCAM_TO_AP_DATA2_CONN_N
MIPI_RCAM_TO_AP_DATA3_CONN_N
MIPI_RCAM_TO_AP_DATA0_CONN_P
MIPI_RCAM_TO_AP_DATA1_CONN_P
MIPI_RCAM_TO_AP_DATA2_CONN_P
MIPI_RCAM_TO_AP_DATA3_CONN_P
MIPI_FCAM_TO_AP_CLK_NMIPI_FCAM_TO_AP_CLK_PMIPI_AP_TO_LCM_CLK_N
MIPI_AP_TO_LCM_DATA0_N
MIPI_AP_TO_LCM_DATA1_N
MIPI_AP_TO_LCM_DATA2_N
MIPI_AP_TO_LCM_DATA3_N
MIPI_AP_TO_LCM_CLK_P
MIPI_AP_TO_LCM_DATA0_P
MIPI_AP_TO_LCM_DATA1_P
MIPI_AP_TO_LCM_DATA2_P
MIPI_AP_TO_LCM_DATA3_P
PP1V8
AP_TO_RCAM_CLK
AP_TO_FCAM_SHUTDOWN_L
MIPI_FCAM_TO_AP_DATA0_P
AP_TO_MUON_BL_STROBE_EN
AP_TO_RCAM_SHUTDOWN_L
MIPI_FCAM_TO_AP_DATA0_N
FCAM_REXT
AP_TO_SPHERE_BUCK_ENAP_TO_STOCKHOLM_DWLD_REQUEST
PP_FIXED
RCAM_REXT
SYNC_MASTER=N71_SINGLE_BRD SYNC_DATE=05/29/2014
SOC:CAMERA & DISPLAY
OMIT_TABLEROOM=SOC
FCMSP
SC58980B0B-A040
MAUI-2GB-25NM-DDR-H
CRITICAL
U0600
H35
AL4
B29A29
D24
D25
B33A33
B32A32
B31A31
B30A30
E23
E25
E27
F24
OMIT_TABLE
FCMSP
ROOM=SOC
CRITICAL
MAUI-2GB-25NM-DDR-H
SC58980B0B-A040
U0600
G31G32
F35G34
B12A12
A8B8
B9A9
B13A13
A14B14
D12
B18A18
A17B17
A19B19
D14
G35
B5A5
B3A3
A4B4
A6B6
B7A7
D9
D33
D34
D32
F32
F33
C35
E34
C34
D10
E7 D8 E11 E1
4
E10
E13
E8 D13
ROOM=SOC
MF1%33.2
1/32W01005
R08091 2
5%
ROOM=SOC
1.00K
MF1/32W
01005
R08071
2
1.00K1/32W
ROOM=SOC
MF
5%
01005
R08061
2MF
ROOM=SOC
1/32W
1.00K5%
01005
R08051
2
1.00K5%
MF
ROOM=SOC
1/32W
01005
R08041
2
ROOM=SOC
6.3VX5R-CERM01005
0.1UF20%
C08151
201005ROOM=SOC
6.3VX5R-CERM
0.1UF20%
C08141
220%
ROOM=SOC
6.3VX5R-CERM01005
0.1UFC08021
2
4.02K1/32W
1%
MF
ROOM=SOC01005
R08021
2
1/32W1%4.02K
ROOM=SOC
MF01005
R08031
2
4.02K1%
1/32W
ROOM=SOC
MF01005
R08011
2
MF33.2
ROOM=SOC
1% 1/32W01005
R08081 2
ROOM=SOC
6.3VX5R-CERM01005
0.1UF20%
C08011
2
20
21
20
20
15 6 5
34 30 21 20 17 14 13 12 9 8 7 6 5 3
20
20
22 21
22 21
21
21
21
21
21
21
21
21
21
20
20 30
30
30
30
30
30
30
30
30
30
34 30 21 20 17 14 13 12 9 8 7 6 5 3
21
20
20
28
21
20
23
34
14 11 6
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM 4 OF 14
LPDP_TX3_PLPDP_TX3_N
LPDP_TX2_PLPDP_TX2_N
LPDP_TX1_PLPDP_TX1_N
LPDP_TX0_PLPDP_TX0_N
VDD1
2_LP
DP
LPDP_AUX_PLPDP_AUX_N
EDP_HPD
DP_WAKEUP
LPDP_CAL_DRV_OUT
LPDP_CAL_VSS_EXT
SYM 3 OF 14
MIPID_DATA3_P
MIPID_DATA2_P
MIPID_DATA1_P
MIPID_DATA0_P
MIPID_CLK_P
MIPID_DATA3_N
MIPID_DATA2_N
MIPID_DATA1_N
MIPID_DATA0_N
MIPID_CLK_N
MIPI1C_DATA1_P
MIPI1C_DATA0_P
MIPI1C_CLK_P
MIPI1C_DATA1_N
MIPI1C_DATA0_N
MIPI1C_CLK_N
MIPI0C_DATA3_P
MIPI0C_DATA2_P
MIPI0C_DATA1_P
MIPI0C_DATA0_P
MIPI0C_CLK_P
MIPI0C_DATA3_N
MIPI0C_DATA2_N
MIPI0C_DATA1_N
MIPI0C_DATA0_N
MIPI0C_CLK_N
ISP_I2C0_SDAISP_I2C0_SCL
SENSOR0_RSTSENSOR0_CLK
ISP_I2C1_SCLISP_I2C1_SDA
SENSOR1_XSHUTDOWN
SENSOR0_XSHUTDOWNSENSOR0_ISTRB
SENSOR1_RST
SENSOR1_ISTRB
SENSOR1_CLK
MIPICSI_MUXSEL
MIPI1C_REXT
MIPI0C_REXT
MIPID_REXT
VDD1
8_M
IPI
VDD0
85_M
IPI
NC
NC
NC
NC
NC
NCNC
NCNC
NCNC
NCNC
NCNC
NC
Administrator打字机文本http://www.mfcbox.com
ANTI-ROLLBACK EEPROM
APN:335S0946
BUTTON PULL-UP RESISTORS
I2C PROBE POINTSSPI PROBE POINTS
SET TO INTERNAL PULL-DOWN.
MAUI - GPIO & SERIAL INTERFACES
GRP1
.
GRP1
GRP1
GRP1
GRP2
GRP1
GRP3
GRP1
GRP1
GRP3
PIN J31 (UART7_RXD) SHOULD BE
NOSTUFF R0911 FOR DOPPLER PROX.
STUFF R0911 FOR ANALOG PROX.
GRP3
128kbit
GRP3
8 OF 60
NO_TEST=1
9 OF 49
A.0.0
051-00094
CAM_EXT_LDO_EN
AP_TO_HP_HS3_CTRL
BUTTON_VOL_UP_LBUTTON_VOL_DOWN_LSPEAKERAMP_TO_AP_INT_LAP_TO_SPEAKERAMP_STAYIN_ALIVEAP_TO_SPEAKERAMP_RESET_L
UART_AP_DEBUG_TXD
UART_BT_TO_AP_RXDUART_AP_TO_BT_TXD
MAMBA_EXT_LDO_ENAP_TO_BB_MESA_ON_LBUTTON_RINGER_ABB_IPC_GPIOAP_TO_BB_COREDUMPBOARD_REV0BOARD_REV1BOARD_REV2BOARD_REV3TOUCH_TO_AP_INT_LAP_TO_NAND_FW_STRAPAP_TO_BB_RADIO_UP_LCODEC_TO_AP_PMU_INT_LBOARD_ID4BOOT_CONFIG2DFU_STATUS
BOOT_CONFIG1BB_TO_AP_RESET_DETECT_LAP_TO_ARC_STAYIN_ALIVE
ARC_TO_AP_INT_LLCM_TO_OWL_BSYNC
AP_TO_STOCKHOLM_DEV_WAKEBOARD_ID3NC_AP_TO_STOCKHOLM_SIM_SEL
AP_TO_ARC_RESET_LBOOT_CONFIG0
AP_TO_BB_PCIE_DEV_WAKE
AP_TO_LCM_RESET_L
AP_TO_LED_DRIVER_ENAP_TO_TOUCH_RESET_L
AP_TO_BT_WAKEAP_TO_BB_RESET_LPCIE_AP_TO_WLAN_DEV_WAKE
PROX_SELECT
UART_STOCKHOLM_TO_AP_RXD
SWI_AP_BI_TIGRIS
UART_AP_TO_WLAN_TXDUART_WLAN_TO_AP_RXD
UART_AP_TO_STOCKHOLM_TXD
UART_ACCESSORY_TO_AP_RXDUART_AP_TO_ACCESSORY_TXD
UART_BT_TO_AP_CTS_LUART_AP_TO_BT_RTS_L
UART_STOCKHOLM_TO_AP_CTS_LUART_AP_TO_STOCKHOLM_RTS_L
UART_WLAN_TO_AP_CTS_LUART_AP_TO_WLAN_RTS_L
UART_AP_DEBUG_RXD
FORCE_DFU
AP_TO_HP_HS4_CTRL
AP_TO_SPHERE_BUCK_MODE
BB_TO_AP_GPS_TIME_MARK
PMU_TO_AP_IRQ_L
SPI_AP_TO_TOUCH_SCLK
PP1V8
I2S_AP_TO_CODEC_ASP_LRCLK
I2S_AP_TO_CODEC_ASP_DOUT
I2S_CODEC_TO_AP_OWL_XSP_DIN
SPI_AP_TO_MESA_SCLK_RSPI_AP_TO_MESA_MOSISPI_MESA_TO_AP_MISO
SPI_AP_TO_TOUCH_MOSI
SPI_AP_TO_TOUCH_CS_L
I2S_AP_TO_ARC_MCLK_RI2S_AP_TO_BT_BCLK
I2S_AP_TO_CODEC_XSP_DOUT
I2S_BT_TO_AP_DINI2S_AP_TO_BT_LRCLK
I2S_AP_TO_BB_BCLK
I2S_CODEC_TO_AP_ASP_DIN
I2S_AP_TO_CODEC_ASP_BCLK
ALS_TO_AP_INT_L
I2S_BB_TO_AP_DIN
BOARD_ID1BOARD_ID0
I2S_AP_TO_BT_DOUT
I2S_AP_TO_SPEAKERAMP_MCLK_R
I2S_AP_OWL_TO_CODEC_XSP_LRCLKI2S_AP_OWL_TO_CODEC_XSP_BCLKI2S_AP_TO_CODEC_MCLK_R
SPI_AP_TO_TOUCH_SCLK_R
I2C_SEP_BI_EEPROM_SDAI2C_SEP_TO_EEPROM_SCL
AP_TO_NAND_SYS_CLK_R
AP_TO_TOUCH_CLK32K_RESET_L
SPI_TOUCH_TO_AP_MISO I2C0_AP_SCL
I2C1_AP_SDA
I2S_AP_TO_ARC_MCLK
I2C1_AP_SCL
I2S_AP_TO_SPEAKERAMP_MCLK
I2S_AP_TO_CODEC_MCLK
PP1V8
AP_TO_NAND_SYS_CLK
I2C_SEP_BI_EEPROM_SDA
I2C0_AP_SDA
BUTTON_HOLD_KEY_L
PP1V8_ALWAYS
BUTTON_MENU_KEY_LBUTTON_RINGER_A
PP1V8_SDRAM
SPI_TOUCH_TO_AP_MISO
PP1V8
I2C_SEP_TO_EEPROM_SCL
I2S_AP_TO_BB_LRCLK
I2S_AP_TO_BB_DOUT
PMU_TO_AP_SOCHOT0_L
SPI_AP_TO_CODEC_CS_LSPI_AP_TO_CODEC_SCLKSPI_AP_TO_CODEC_MOSISPI_CODEC_TO_AP_MISO
I2S_AP_TO_CODEC_MSP_LRCLKI2S_AP_TO_CODEC_MSP_BCLKTRISTAR_TO_AP_INT
SPI_AP_TO_MESA_SCLKMESA_TO_AP_INT
BOARD_ID2
I2S_CODEC_TO_AP_MSP_DINI2S_AP_TO_CODEC_MSP_DOUT
PP1V8
PMU_TO_AP_SOCHOT0_R_L
AP_TO_PMU_SOCHOT1_L
PP1V8_ALWAYS
I2C0_AP_SDA
I2C2_AP_SDA
I2C1_AP_SDA
PP1V8
I2C1_AP_SCL
I2C2_AP_SCL
I2C0_AP_SCL
SOC:SERIAL & GPIOSYNC_DATE=05/29/2014SYNC_MASTER=N71_SINGLE_BRD
10K1/32W5%
MF
ROOM=SOC01005
R09411
2
MAUI-2GB-25NM-DDR-H
OMIT_TABLE
ROOM=SOCCRITICAL
SC58980B0B-A040FCMSP
U0600
H34
H31
E31D35
AH1AG4
L31M32
R34
N35M33
N34
P34
M3
N3L4
P1
M4
V33
T33V34
U33
U32
AM4
AP1AN1
AN2
AM3
R31
P31P32
V32
R32
AM24
Y3AB4
V3Y4
AA4U2
W3
AM1
AM2
AD4AC3AB2AD3
P33V35N32M31
E33E35F34F31
AA2Y2
AA3AC4
OMIT_TABLE
ROOM=SOC
MAUI-2GB-25NM-DDR-H
SC58980B0B-A040FCMSP
CRITICAL
U0600C1D2D1F1E2F3F2H3G3J1H4K1J3K2J4L2K3L3N1
AH2AH3AH4AJ1AJ2AJ3AJ4AK1AP3AN4AP4AP5AR2AR3AR4AP6AT3AT4AR6AP7AT5AP8AP9
AP10
AE1AF2AF3
AE3AE4
K31K32L33L32
AT23AR20AP23AP22
N4P3R3R2
J33J34J35K33
T32
AF1AE2
J31J32
SM
ROOM=SOCP3MM-NSM
PLACE_SIDE=TOP
PP09061
ANALOG_PROX
1/32W5%
01005ROOM=SOC
MF
1.00KR09111
2
ROOM=SOC
MF
0%
0.00
01005
1/32W
R09601 2
PLACE_SIDE=TOPROOM=SOC
SM
P3MM-NSMPP09031
SM
P3MM-NSMROOM=SOC PLACE_SIDE=TOP
PP09021ROOM=SOCP3MM-NSM
SM PP09011ROOM=SOCP3MM-NSM
SM PP09001
ROOM=SOC
191K1%
MF01005
1/32W
R09501
2
0%
MF1/32W
0.00
ROOM=SOC01005
R09451 2
33.2
1%1/32WMF
01005ROOM=SOC
R09211 2
MF01005
1/32W5%
ROOM=SOC
220KR09521
2
01005
100K
ROOM=SOC
5%1/32WMF
R09511
2
MF01005
1/32W
ROOM=SOC
0%
0.00R0930
1 2
ROOM=SOC
MF01005
1/32W0.00
0%
R09401 2
MF1/32W
01005ROOM=SOC
10K5%
NOSTUFF
R09101
2
2.2K5%
ROOM=SOC
MF01005
1/32W
R09071
2
2.2K
MF01005
5%1/32W
ROOM=SOC
R09061
2
WLCSP
ROOM=SOC
M34128-FCS6_P/T
CRITICAL
U0900B1 A2
A1B2
5%1.00K
ROOM=SOC
1/32W
01005MF
R09041
2 01005MF
1/32W
ROOM=SOC
1.33K1%
R09051
201005ROOM=SOC
1/32W5%
2.2K
MF
R09021
2 01005ROOM=SOC
1/32W5%
2.2K
MF
R09031
2
1.0UF
X5R20%6.3V
ROOM=SOC0201-1
C09001
2
33.2
1/32WMF
01005
1%
ROOM=SOC
R09221 2
MF1/32W
01005
10K5%
ROOM=SOC
R09091
2
01005
1/32W
ROOM=SOC
5%
MF
2.2KR09011
2
1.00K
01005
5%1/32W
MF
ROOM=SOC
R09001
2
1/32W1%
MF
33.2
01005ROOM=SOC
R09201 2
21
32
34 33 16
34 33 16
26
26
26
34 31
34
34
29
34
34 33 16 8
34
34
3
3
3
3
30
13
34
25 16
3
3
34 3
3
34
27
27
34 30 9
34
3
27
3
34
30
22
29
34
34
34
34
17 9
34
34
34
31
31
34
34
34
34
34
34
34 31
34 3
32
23
34
16
30
34 30 21 20 17 14 13 12 9 8 7 6 5 3
27 26 25
27 26 25
25 9
29
29
30
30
34
25
34
34
34
27 26 25
27 26 25
20
34
3
3
34
25 9
25 9
8
8
30
30 8 34 28 16 8
34 31 27 26 17 8
27
34 31 27 26 17 8
26
25
34 30 21 20 17 14 13 12 9 8 7 6 5 3
13
8
34 28 16 8
34 33 16 9
17 15 12 8
34 29 16 9
34 33 16 8
34 32 31 28 25 16 15 14 12
30 8
34 30 21 20 17 14 13 12 9 8 7 6 5 3
8
34
34
16
25
25
25
25
25
25
31 16
29
29
3
25
25
34 30 21 20 17 14 13 12 9 8 7 6 5 3
16
17 15 12 8
34 28 16 8
30 28 20
34 31 27 26 17 8
34 30 21 20 17 14 13 12 9 8 7 6 5 3
34 31 27 26 17 8
30 28 20
34 28 16 8
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM 6 OF 14
CPU_ACTIVE_STATUS
CLK32K_OUT
NAND_SYS_CLK
SOCHOT0
SOCHOT1
SEP_SPI0_SCLKSEP_SPI0_MISOSEP_SPI0_MOSI
SEP_I2C_SCLSEP_I2C_SDA
SEP_GPIO0SEP_GPIO1
SPI2_SCLK
I2S0_MCKI2S0_BCLKI2S0_LRCK
I2S2_MCK
I2S1_DOUT
SPI1_SSINSPI1_SCLKSPI1_MOSISPI1_MISO
SPI0_SSINSPI0_SCLKSPI0_MOSISPI0_MISO
I2S4_LRCK
I2S4_DOUTI2S4_DIN
I2S4_BCLK
I2S3_DINI2S3_DOUT
I2S3_MCK
I2S2_BCLK
I2S2_DIN
I2S3_BCLK
I2S1_LRCKI2S1_DIN
I2S0_DOUT
I2S1_BCLKI2S1_MCK
I2C0_SCL
I2C1_SCL
I2C2_SCL
I2C0_SDA
SPI2_SSIN
SPI2_MOSISPI2_MISO
SPI3_MISOSPI3_MOSISPI3_SCLKSPI3_SSIN
I2C1_SDAI2S0_DIN
I2S2_DOUT
I2C2_SDA
I2S4_MCK
I2S3_LRCK
I2S2_LRCK
SYM 5 OF 14
GPIO_13
GPIO_22
TMR32_PWM0
GPIO_1
GPIO_26
UART0_RXD
UART4_RTS*UART4_CTS*
UART3_RTS*UART3_CTS*
UART2_RTS*UART2_CTS*
UART1_RTS*UART1_CTS*
UART6_TXDUART6_RXD
TMR32_PWM2TMR32_PWM1
UART3_TXD
UART4_RXDUART4_TXD
UART5_RTXD
UART3_RXD
UART7_RXDUART7_TXD
GPIO_9GPIO_8GPIO_7
GPIO_11GPIO_10
GPIO_12
GPIO_14
GPIO_18GPIO_19
GPIO_17GPIO_16GPIO_15
GPIO_20GPIO_21
GPIO_23GPIO_24GPIO_25
GPIO_27GPIO_28GPIO_29GPIO_30GPIO_31GPIO_32GPIO_33GPIO_34GPIO_35GPIO_36GPIO_37GPIO_38GPIO_39GPIO_40GPIO_41GPIO_42
UART2_RXDUART2_TXD
UART1_TXDUART1_RXD
UART0_TXD
GPIO_6GPIO_5GPIO_4GPIO_3GPIO_2
GPIO_0
PP
PP
PP
PP
PP
NC
NCNC
NC
NC
NCNC
NC
NCNCNC
SDASCL
VCC
VSS
NC
NC
Administrator打字机文本http://www.mfcbox.com
OWL SYSTEM SHUTDOWN OPTION
POWER STATE CONTROL PROBE POINTS
VDD_SOC
GPO
MAUI - OWL
GPO
GPO
EXT OSC IN
9 OF 60
10 OF 49
A.0.0
051-00094
BUTTON_MENU_KEY_L
I2S_AP_OWL_TO_CODEC_XSP_LRCLK
I2S_AP_OWL_TO_CODEC_XSP_BCLK
TOUCH_TO_OWL_ACCEL_DATA_REQUEST
PMU_TO_OWL_SLEEP1_READY
SWD_AP_BI_NAND_SWDIO
SWD_AP_PERIPHERAL_SWCLKLCM_TO_OWL_BSYNCSPI_OWL_TO_PHOSPHOROUS_CS_LACCEL_GYRO_TO_OWL_INT2SPI_OWL_TO_ACCEL_GYRO_CS_L
DWI_PMGR_TO_PMU_BACKLIGHT_MOSIDWI_PMU_TO_PMGR_MISO
OWL_TO_PMU_ACTIVE_REQUEST
BUTTON_HOLD_KEY_L
PMU_TO_OWL_CLK32K
DWI_PMGR_TO_BACKLIGHT_SCLKDWI_PMGR_TO_PMU_SCLK
PMU_TO_OWL_ACTIVE_READY
PMU_TO_SYSTEM_COLD_RESET_L
DISCRETE_ACCEL_TO_OWL_INT2
OWL_TO_PMU_SHDN_BI_TIGRIS_SWIPHOSPHORUS_TO_OWL_IRQ
DISCRETE_ACCEL_TO_OWL_INT1
I2S_CODEC_TO_AP_OWL_XSP_DIN
SPI_IMU_TO_OWL_MISOSPI_OWL_TO_IMU_MOSISPI_OWL_TO_IMU_SCLK
SWD_AP_BI_BB_SWDIO
UART_BB_TO_OWL_RXDUART_OWL_TO_BB_TXD
OWL_TO_WLAN_CONTEXT_BOWL_TO_WLAN_CONTEXT_A
UART_OWL_TO_TOUCH_TXD
COMPASS_TO_OWL_INT
SPI_OWL_TO_DISCRETE_ACCEL_CS_L
PP1V8
OWL_TO_PMU_SHDN
SWI_AP_BI_TIGRIS
OWL_TO_PMU_SHDN_BI_TIGRIS_SWI
OWL_TO_PMU_SLEEP1_REQUEST
PMU_TO_OWL_ACTIVE_READY
OWL_TO_PMU_ACTIVE_REQUEST
PMU_TO_OWL_SLEEP1_READY
OWL_TO_PMU_SLEEP1_REQUEST
SPI_OWL_TO_COMPASS_CS_L
ACCEL_GYRO_TO_OWL_INT1
SOC:OWLSYNC_DATE=05/29/2014SYNC_MASTER=N71_SINGLE_BRD
01005
NOSTUFF
1/32W5%MF
10
ROOM=SOC
R10211 2
101/32W
5% 01005MFROOM=SOC
NOSTUFFR1020
1 2
OMIT_TABLE
FCMSP
ROOM=SOCCRITICAL
MAUI-2GB-25NM-DDR-H
SC58980B0B-A040
U0600
AA33AD32
W33
U3
V4
AD30AB33
AF35AH32AG32AG31AG30AF33AE34AF34AF31AF32
AH31AH33
AD34AA34
AE31AE32
AK31AK32AL33
AE33AD35AC33
AJ32AK33
AH30AJ31
AJ34AJ33
AL2AL1AK4AL3
AD31
W4
U31T31
MF
5%1/32W
1.00K
01005
NOSTUFFR10021
2
P3MM-NSMSM
ROOM=SOC
PP10231P3MM-NSMROOM=SOC
SM PP10221P3MM-NSMROOM=SOC
SM PP10211P3MM-NSM
ROOM=SOC
SM PP10201
34 29 16 8
25 8
25 8
30
16 11 9
13
34 13 34 30 8
19
19
19
28 16
16
16 9
34 33 16 8
16
28
16
31 28 16 9 5
34 16 5 3
19
9
19
19
25 8
19
19
19
34
34
34
34
34
30
19
19
34 30 21 20 17 14 13 12 8 7 6 5 3
16
17 8
9
16 9
31 28 16 9 5
16 9
16 11 9
16 9
19
19
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
NC
SYM 7 OF 14OWL_DDR_REQ
OWL_I2CM_SCL
OWL_FUNC_1
OWL_FUNC_3
OWL_UART2_TXDOWL_UART2_RXD
OWL_UART1_TXDOWL_UART1_RXD
OWL_UART0_TXDOWL_UART0_RXD
OWL_SWD_TMS1OWL_SWD_TMS0
OWL_SPI_SCLKOWL_SPI_MOSIOWL_SPI_MISO
OWL_I2S_MCKOWL_I2S_LRCK
OWL_I2S_DINOWL_I2S_BCLK
OWL_I2CM_SDA
OWL_FUNC_9OWL_FUNC_8
OWL_FUNC_2
OWL_FUNC_0
CFSB_AOP
AWAKE_RESET*
PMGR_SCLK0PMGR_SSCLK1
RT_CLK32768
HOLD_KEY*
MENU_KEY*
SKEY*
AWAKE_REQ
PMGR_MISOPMGR_MOSI
OWL_FUNC_4OWL_FUNC_5OWL_FUNC_6OWL_FUNC_7
OWL_SWD_TCK_OUT
SWD_TMS3SWD_TMS2
OWL_DDR_RESET*
NC
PP
PP
PP
PP
Administrator打字机文本http://www.mfcbox.com
MAUI - CPU, GPU & SOC RAILS 0.725V @TBDA MAX0.825V @4.7A MAX
NOTE: AP_GPU_SENSE_P probe location @ R2205.2
0.8V @10.5A MAX
0.625V @TBDA MAX
1.0V @12.5A MAX0.9V @10.5A MAX
10 OF 60
11 OF 49
A.0.0
051-00094
AP_SOC_SENSE_N
AP_SOC_SENSE_P
AP_GPU_SENSE_N
AP_GPU_SENSE_PAP_CPU_SENSE_P
AP_CPU_SENSE_N
PP_GPU
BUCK1_PP_GPU_FB
PP_CPU
BUCK2_PP_SOC_FB
BUCK0_PP_CPU_FB
PP_CPU
PP_SOC
PP_GPU
SOC:POWER (1/3)SYNC_MASTER=N71_SINGLE_BRD SYNC_DATE=05/29/2014
OMIT_TABLE
FCMSP
SC58980B0B-A040
MAUI-2GB-25NM-DDR-H
ROOM=SOCCRITICAL
U0600AA17AA19AA23AB14AB16AB20AB22AB24AB26AC17AC19AC23AD16AD20AD22AD24AD26
AE5AE15AE17AE19AE23AF14AF16AF20AF22AF24AF26AG17AG19AG23AH16AH20AH22AH24AH26AJ15AJ17AJ19AJ23AK14
J29G23
AK22F6
F14AL15AM5G25G27H24H26H28J27K24K26K28L27L23M26M28
AL19N7
N27P24P26P28R17R27R29T22T26
T7T28U17
V8V20V22V24V26W7
W11Y28
W23Y14Y16Y20Y22Y24Y26G29AA27F17F20L29N29V28
AJ20
L22L24L26L28M1M5M7M9M11M13M17M21M23M25M27M29M35N6N10N12N14N16N18G19N22N24N26N28N30N33P9P11P13P15P17P19P21P23P25P27P29P35R4R6R8R10R12R14M19R18R20R22R24R26R28R30T1T2R33T9T11T13T15T17P7T23T25T27T30T35U6U10U12
AK21
OMIT_TABLE
CRITICALROOM=SOC
SC58980B0B-A040FCMSP
MAUI-2GB-25NM-DDR-HU0600
AA7AA9
AA11AB6
AB10AB12AC13
AD6AD8
AD10AD12
AE7AE9
AE11AE13
AF8AF10AF12AH6AH8
AH10AH12
AJ5AJ7AJ9
AJ11AJ13AK6
AK10AL7AL9
AL11AM6AM8
AM10AN7
AN11AL13
Y8Y10Y12
AM12
Y6
G15W13T12M6U9V12W9M12M18N15N21N9F10H14H16H20H22H6H8J11J13J17J19J23J7K10K14K16K20K22K6K8L11L13L15L17L19L21M24L7L9F8M8N11N13N17N19P10G11P12P14P16P20R15R19G13R9T10T14T16U11V14V16G7R23G9H10T24P22W17N23G17G21T18T20
G20
Y7 H19
SM0.50MM
TP11001
0.50MMSM
TP11201
P2MM-NSM
SM
ROOM=SOCPP1105 1
P2MM-NSM
SM
ROOM=SOCPP1104 1
P2MM-NSM
SM
ROOM=SOCPP11021P2MM-NSM ROOM=SOC
SMPP1101 1P2MM-NSM
SM
ROOM=SOCPP1100 1
ROOM=SOC
SHORT-10L-0.1MM-SMXW1120
1 2
SHORT-10L-0.1MM-SM
ROOM=SOC
XW111012
SHORT-10L-0.1MM-SM
ROOM=SOC
XW110012
ROOM=SOC
6.3VX5R-CERM0201
2.2UF20%
C11221
2
ROOM=SOC
6.3VX5R-CERM0201
2.2UF20%
C11231
2
ROOM=SOC
6.3VX5R-CERM0201
2.2UF20%
C11031
2
6.3V
0201
2.2UF20%
X5R-CERM
ROOM=SOC
C11251
2
ROOM=SOC
6.3VX5R-CERM0201
2.2UF20%
C11241
2
ROOM=SOC
6.3VX5R-CERM0201
2.2UF20%
C11051
2
ROOM=SOC
6.3VX5R-CERM0201
2.2UF20%
C11041
2
CERM0402
0.47UF
ROOM=SOC
6.3V20%
C1156
1
2
3
4
CERM0402
ROOM=SOC
0.47UF6.3V20%
C1157
1
2
3
4
CERM0402
4V
1UF
ROOM=SOC
20%
C1154
1
2
3
4
CERM0402
4V
ROOM=SOC
1UF20%
C1155
1
2
3
4
CERM0402
4V
4.3UF
ROOM=SOC
20%
C1153
1
2
3
4
0402-9CERM-X5R
10UF
ROOM=SOC
6.3V20%
C11511
2
4V
0402CERM
1UF
ROOM=SOC
20%
C1134
1
2
3
4
CERM4V
1UF
ROOM=SOC
0402
20%
C1135
1
2
3
4
1UF4V
0402CERM
ROOM=SOC
20%
C1136
1
2
3
4
1UF
ROOM=SOC
CERM0402
4V20%
C1137
1
2
3
4
0402
4V
ROOM=SOC
4.3UF
CERM
20%
C1130
1
2
3
4
20%4V
CERM0402
ROOM=SOC
7.5UFC1131
1
2
3
4
4.3UF
0402
4VCERM
ROOM=SOC
20%
C1110
1
2
3
4
20%
CERM0402
4V
ROOM=SOC
7.5UFC1111
1
2
3
4
ROOM=SOC
CERM0402
6.3V20%
0.47UFC1117
1
2
3
4
0.47UF
ROOM=SOC
CERM0402
20%6.3V
C1116
1
2
3
4
1UF
ROOM=SOC
CERM0402
4V20%
C1113
1
2
3
4
1UF
ROOM=SOC
0402
4VCERM
20%
C1112
1
2
3
4
ROOM=SOC
1UF
CERM0402
4V20%
C1114
1
2
3
4
0402
4V
4.3UF
CERM
ROOM=SOC
20%
C1106
1
2
3
4
ROOM=SOC
0402
4V20%
CERM
1UFC1115
1
2
3
4
20%
ROOM=SOC
0402CERM4V
7.5UFC1107
1
2
3
4
ROOM=SOC
0402
4VCERM
4.3UF20%
C1108
1
2
3
4
CERM
20%7.5UF
ROOM=SOC
4V
0402
C1109
1
2
3
4
10UF
CERM-X5R0402-9ROOM=SOC
6.3V20%
C11011
2
ROOM=SOC
CERM-X5R
10UF6.3V20%
0402-9
C11021
2
ROOM=SOC
10UF
CERM-X5R0402-9
6.3V20%
C11201
20402-9ROOM=SOC
6.3V20%CERM-X5R
10UFC11211
2
ROOM=SOC
0402CERM4V20%
7.5UFC1126
1
2
3
4
20%
ROOM=SOC
CERM4V
0402
7.5UFC1127
1
2
3
4
4V
0402CERM
ROOM=SOC
20%4.3UF
C1128
1
2
3
4
4.3UF4V
0402
ROOM=SOC
CERM
20%
C1129
1
2
3
4
0.47UF
CERM0402
ROOM=SOC
6.3V20%
C1138
1
2
3
4
0.47UF
0402CERM
ROOM=SOC
6.3V20%
C1139
1
2
3
4
0.47UF
ROOM=SOC
0402CERM6.3V20%
C1140
1
2
3
4
0.47UF
0402CERM
ROOM=SOC
6.3V20%
C1141
1
2
3
4
ROOM=SOC
4V
0402CERM
4.3UF20%
C1132
1
2
3
4
4V20%
ROOM=SOC
CERM0402
7.5UFC1133
1
2
3
4
16
14 10
14
14 10
14
14
14 10
14
14 10
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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36
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REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM 9 OF 14
VSS
VDD_SOC
VDD_SOC_SENSE
VSS_SOC_SENSE
VDD_SOC
SYM 8 OF 14
VSS_CPU_SENSE
VDD_CPU_SENSE
VDD_GPU
VDD_GPU_SENSE
VSS_GPU_SENSE
VDD_CPU
PP
PP
PP
PP
PPPP
PP
Administrator打字机文本http://www.mfcbox.com
0.8V @0.5A MAX
0.9V @TBDA MAX1.0V @1.0A MAX
0.8V @TBDA MAX
0.802-TBDV @1.1A MAX
DDR IMPEDANCE CONTROL
0.756-TBDV @44mA MAX
1.1V @7mA MAX
MAUI - POWER SUPPLIES
11 OF 60
VOLTAGE=1.1V
12 OF 49
A.0.0
051-00094
PMU_TO_OWL_SLEEP1_READY
PP1V1_DDR_PLL
DDR0_ZQDDR3_ZQ
SYSTEM_ALIVE
DDR3_RREFDDR2_RREFDDR1_RREFDDR0_RREF
PP1V1_SDRAM
PP0V8_OWL
PP1V1
PP1V1
PP1V1
PP_CPU_SRAM
PP_GPU_SRAM
PP_FIXED
SYNC_DATE=05/29/2014SYNC_MASTER=N71_SINGLE_BRD
SOC:POWER (2/3)
4V20%
CERM
4.3UF
ROOM=SOC
0402
C1224
1
2
3
4
OMIT_TABLEROOM=SOC
CRITICAL
FCMSP
SC58980B0B-A040
MAUI-2GB-25NM-DDR-HU0600
C18
C21
C19
B21
AP15
AP17
AP16
Y31
V31
W32
U4
P5
T3
P2
A20A22B11B15B23B25D16D20D22E15E17E19E21
AN19AR18AR21
AR8AT13AT16AM14AM16AM18AM20AR15AN13AN15
AB29V29Y29Y35
AB35AG34
M34R35T29T34
AA30U30
AC30
AA1AC2
V6W2H2M2U5P6T6U1N5R5W5
F19AK18W26P8
D19AN17W31T4
MAUI-2GB-25NM-DDR-HFCMSP
SC58980B0B-A040
CRITICALROOM=SOC
OMIT_TABLE
U0600 AC11AC7AC9AA13AG11AG7AG9AK12
AA15AA21AA25AB18AC15AC21AC25AD14AD18AE21AE25AF18AG15AG21AH25AH14AH18AJ21AK16
F12G10V18
AL17J25L25N25R25
R7AN6U25W15W21W25Y18F21F26
AB28AC27
G18AK20
F16R16
T8V7
U19W27U27AF4
AF27U21
H12H18R21U15J15J21J9K12K18M10M14M16M20P18R11R13U13V10M22
AH29AD29AF29
ROOM=SOC
X5R-CERM0201
2.2UF20%6.3V
C12481
2
ROOM=SOC
X5R-CERM0201
2.2UF20%6.3V
C12271
2
100OHM-25%-0.12A
ROOM=SOC01005
FL12801 2
ROOM=SOC
X5R-CERM0201
2.2UF20%6.3V
C12231
2
ROOM=SOC
X5R-CERM0201
2.2UF20%6.3V
C12431
2
1.0UF
ROOM=SOC
X5R0201-1
20%6.3V
C12501
2
6.3V
ROOM=SOC
X5R-CERM0201
2.2UF20%
C12421
2
ROOM=SOC
X5R-CERM0201
2.2UF20%6.3V
C12411
2
0.22UF
ROOM=SOC
X5R01005-1
20%6.3V
C12801
2
ROOM=SOC
1/32W1%
01005MF
240R12041
2 ROOM=SOC
240
MF01005
1/32W1%
R12051
2
0.47UF
ROOM=SOC
6.3V
0402CERM
20%
C1220
1
2
3
4
ROOM=SOC
0402
4V
1UF20%
CERM
C1221
1
2
3
4
CERM0402
4.3UF20%4V
ROOM=SOC
C1222
1
2
3
4
CERM0402
ROOM=SOC
4.3UF20%4V
C1226
1
2
3
4
1UF20%4V
ROOM=SOC
CERM0402
C1225
1
2
3
4
CERM
ROOM=SOC
0.47UF20%6.3V
0402
C1203
1
2
3
4
0402CERM
ROOM=SOC
1UF20%4V
C1202
1
2
3
4
ROOM=SOC
X5R-CERM0201
2.2UF20%6.3V
C12441
2
CERM
0.47UF
ROOM=SOC
0402
20%6.3V
C1247
1
2
3
4
CERM
ROOM=SOC
4.3UF
0402
20%4V
C1245
1
2
3
4
CERM-X5R
10UF
0402-9ROOM=SOC
20%6.3V
C12401
2
ROOM=SOC
0402
1UF
CERM
20%4V
C1246
1
2
3
4
ROOM=SOC
240
MF01005
1%1/32W
R12031
2
1/32W1%
MF
240
ROOM=SOC01005
R12021
201005MF1/32W1%
ROOM=SOC
240R12011
201005
1%1/32W
ROOM=SOC
240
MF
R12001
2
ROOM=SOC0402-9CERM-X5R
10UF20%6.3V
C12001
24.3UF
CERM0402
ROOM=SOC
20%4V
C1201
1
2
3
4
16 9
17 16 13
15 14 12
15
14 11
14 11
14 11
14
14
14 7 6
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
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REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
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NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM 11 OF 14
DDR0_RET*
DDR3_ZQDDR0_ZQ
DDR2_RET*
VDDIO11_DDR3
VDDIO11_DDR2
VDDIO11_DDR1
VDDIO11_DDR0
DDR1_SYS_ALIVE
DDR3_SYS_ALIVEDDR2_SYS_ALIVE
DDR0_SYS_ALIVE
VDDIO11_RET_DDR
VDDIO11_PLL_DDR
DDR0_RREFDDR1_RREFDDR2_RREFDDR3_RREF
DDR1_RET*
DDR3_RET*
SYM 10 OF 14
VDD_CPU_SRAM
VDD_GPU_SRAM
VDD_FIXED
VDD_LOW
Administrator打字机文本http://www.mfcbox.com
1.62-1.98V @41mA MAX
MAUI - POWER SUPPLIES
NOTE: Commandeered C1311 for PP1V1
1.62-1.98V @8mA MAX
1.62-1.98V @1mA MAX
1.62-1.98V @10mA MAX
(OWL)
(AON)
1.70-1.95V @100mA MAX
12 OF 60
13 OF 49
A.0.0
051-00094
PP1V8
PP1V8_SDRAM
PP1V1_SDRAM
PP1V8_IMU_OWL
PP1V8_ALWAYS
PP1V8
SYNC_DATE=05/29/2014SYNC_MASTER=N71_SINGLE_BRD
SOC:POWER (3/3)
OMIT_TABLE
FCMSP
SC58980B0B-A040
MAUI-2GB-25NM-DDR-H
CRITICALROOM=SOC
U0600AN12AN14AN18AN29AN33
AP2AP13AP14AP20AP25AP26AP27AP30AP31AP32AP33AR1AR5AR9
AR14AR16AR25AR34AR35
AT1AT2AT6AT8AT9
AT14AT17AT18AT21AT25AT34AT35
B1B2
B16B20B22B24B27B34B35C2C3C4C5C6C7C8C9
C10C11C12C13C14C20C22C23C24C25C26C27C28C29C30C31C32C33
D3D4D5D6
D11D17D21D23D26D27D28D29D30
E1E3E4E5D7E9
E12E16E18E20E22E24E26E29E32F4F5F7F9F11F13F15F18D18F23E30F25F27F28F29G4G5G6G8G12G14G16E6G22G24G26G28G33H1H7H9H11H13H15H17E28H21H23H25H27H29J2J5J6J30J8J10J12J14J16J18J20J22J24J26J28K7K9K11K13K15K17K19K21K23K25K27K29K34K35L1L5L6K4L8L10L12L14L16L18L20
OMIT_TABLE
FCMSP
CRITICALROOM=SOC
MAUI-2GB-25NM-DDR-H
SC58980B0B-A040
U0600A1A2A11A16A21A24A25A27A34A35AA6AA8
AA10AA12AA14AA16AA18AA20AA22AA24AA26
N8AA28AA35
AB1C17AB3AB5AB7AB9
AB11AB13AB15AB17AB19AB21AB23AB25AB27AB30AC1AC6AC8
AC10AC12AC14AC16AC18AC20AC22AC24AC26
T5AC28AC34AC35
AD5AD7AD9
AD11AD15AD17AD19AD21AD23AD25AD27AD33
AE6AE8
AE10AE12AE14AE16AE18AE20AE22AE24AE26AE29AE30AE35
AF5AF7AF9
AF11AF15AF17AF19AF21
AF23AF25AF30AG1AG2AG3AG6AG8AG10AG14AG16AG18AG20AG22AG24U7AG29AG33AG35AH5AH7AH9AH11AH13AH15AH17AH19AH21AH23AH27AJ6AJ8AJ10AJ12AJ14AJ16AJ18W8AJ22AG12AK24AJ28AK2AK3AK5AK7AK9AK11AK13AK15B28AK17M15AP28AK26AK30AK34AK29AL6AL8AL10AL12AF28AL14AM29AL16AR27AL18Y30AL20AL25AL28AL30AL31AM7AM9AM11AM13AM15AM17AM19AM21AM33AM34AM35AN3AN5AN16AN8AN10
SC58980B0B-A040FCMSP
MAUI-2GB-25NM-DDR-H
OMIT_TABLEROOM=SOC
CRITICAL
U0600A10A26AD1
AH35AT22
AT7G1
L35
A15A23
AB34AD2
AH34AR13AR17AR22
AR7AT15
B10B26G2
L34N2R1
U34V2
W35
AN24
AM22AG26
AG13AK8AB8N20U23
AK23
AD13
F30H30K30M30N31P30H5K5
AN9AA5AC5AG5AL5
AM23AE28AG28
Y5
U14U16U18U22U24U26U28U35V1V5AA29U29V9V11V13V15V17V19V21V23V25V27W30W1W6W10W12W14W16W18W20W22W24W28W29W34Y1Y9Y11Y13Y15Y17Y19Y21Y23Y25Y27Y34AC29AD28AE27AG27AJ30AJ35AK19AT27D31G30L30P4U8V30A28AL32T21
ROOM=SOC
6.3VX5R-CERM0201
2.2UF20%
C13141
2
ROOM=SOC
6.3VX5R-CERM0201
2.2UF20%
C13001
2
0201ROOM=SOC
6.3VX5R-CERM
2.2UF20%
C13301
2
ROOM=SOC
6.3VX5R-CERM0201
2.2UF20%
C13131
2
ROOM=SOC
6.3VX5R-CERM0201
2.2UF20%
C13121
2
X5R-CERM
ROOM=SOC
6.3V
0201
2.2UF20%
C13231
2
ROOM=SOC
6.3VX5R-CERM0201
2.2UF20%
C13221
26.3V
ROOM=SOC
X5R-CERM0201
2.2UF20%
C13211
2
ROOM=SOC
6.3VX5R-CERM0201
2.2UF20%
C13021
2
ROOM=SOC
6.3VX5R-CERM0201
2.2UF20%
C13011
2
4V
0402CERM
ROOM=SOC
1UF20%
C1316
1
2
3
4
4V
0402
1UF
ROOM=SOC
CERM
20%
C1317
1
2
3
4
10UF
0402-9CERM-X5R
ROOM=SOC
6.3V20%
C13101
2
ROOM=SOC
10UF
0402-9CERM-X5R6.3V20%
C13201
2
34 30 21 20 17 14 13 12 9 8 7 6 5 3
34 32 31 28 25 16 15 14 8
15 14 11
19 14
17 15 8
34 30 21 20 17 14 13 12 9 8 7 6 5 3
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM 14 OF 14
VSS VSS
SYM 13 OF 14
VSSVSS
SYM 12 OF 14
VDDIO18_GRP4
VDD18_AMUXVDD18_UVDVDD18_FMON
VDD18_TSADC
VDD18_LPOSC
VDDIO18_GRP11
VDDIO18_GRP10
VDDIO18_GRP1
VDDIO18_GRP2
VDDIO18_GRP3
VDD2
VDD1
VSS
Administrator打字机文本http://www.mfcbox.com
Administrator打字机文本
S3E NAND
EXTRA CAPS ADDED
PROBE POINTS
FOR UF BLOCKING.
EXTRA CAPS ADDEDFOR UF BLOCKING.
FOR UF BLOCKING.
EXTRA CAPS ADDED
13 OF 60
VOLTAGE=0V
VOLTAGE=1.8V
15 OF 49
A.0.0
051-00094
AP_TO_NAND_SYS_CLK PMU_TO_NAND_LOW_BATT_BOOT_L
SWD_AP_BI_NAND_SWDIO
SWD_AP_NAND_SWCLK_R
PCIE_AP_TO_NAND_REFCLK_N
SWD_AP_BI_NAND_SWDIO_R
SWD_AP_NAND_SWCLK_R
PCIE_AP_TO_NAND_REFCLK_P
PCIE_AP_TO_NAND_TXD0_N
PCIE_AP_TO_NAND_TXD0_P
PCIE_AP_TO_NAND_REFCLK_N
PCIE_AP_TO_NAND_TXD1_N
PCIE_AP_TO_NAND_TXD1_P
NAND_AGND
PCIE_AP_TO_NAND_REFCLK_P
PCIE_AP_TO_NAND_RESET_L
SYSTEM_ALIVE
AP_TO_NAND_FW_STRAP
NAND_ZQ
PCIE_AP_TO_NAND_TXD1_P
PCIE_NAND_TO_AP_RXD0_P
PCIE_NAND_TO_AP_RXD1_PPCIE_NAND_TO_AP_RXD1_N
SWD_AP_BI_NAND_SWDIO_R
SWD_AP_PERIPHERAL_SWCLKPCIE_AP_TO_NAND_TXD1_N
PCIE_AP_TO_NAND_TXD0_P
PCIE_NAND_TO_AP_CLKREQ_L
PCIE_NAND_TO_AP_RXD0_N
NAND_AGND
PCIE_NAND_RESREF
PCIE_AP_TO_NAND_TXD0_N
PP1V8_NAND_AVDD
PP0V9_NAND
PP1V8
PP1V8
PP3V0_NAND
NAND_VREF
AP_TO_NAND_RESET_L
SYNC_MASTER=N71_SINGLE_BRD
NANDSYNC_DATE=05/29/2014
100PF
ROOM=NAND
NP0-C0G
5%16V
01005
C15331
201005NP0-C0G16V
ROOM=NAND
100PF5%
C15341
2
ROOM=NAND
100PF
NP0-C0G
5%16V
01005
C15351
2NP0-C0G
ROOM=NAND
5%16V
100PF
01005
C15321
2
NP0-C0G
ROOM=NAND
100PF5%16V
01005
C15571
2
ROOM=NAND
NP0-C0G
5%100PF
01005
16V
C15561
2
100PF5%16VNP0-C0G01005ROOM=NAND
C15551
2
01005NP0-C0G
5%100PF16V
ROOM=NAND
C15131
201005
100PF
ROOM=NAND
16VNP0-C0G
5%
C15141
201005
5%
NP0-C0G16V
ROOM=NAND
100PFC15151
201005
5%
NP0-C0G16V
ROOM=NAND
100PFC15121
2
6.3V
0402-9
10UF
CERM-X5R
ROOM=NAND
20%
C15281
2
10UF20%6.3VCERM-X5R
ROOM=NAND0402-9
C15231
2
1.0UF
0201-1
6.3V
ROOM=NAND
X5R
20%
C15091
2
ROOM=NAND0201-1X5R
1.0UF20%6.3V
C15061
2
15UF
X5R6.3V
0402-1ROOM=NAND
20%
C15041
2
15UF
0402-1
20%6.3V
ROOM=NAND
X5R
C15051
2
6.3VX5R0201-1ROOM=NAND
1.0UF20%
C15471
26.3VX5R
1.0UF20%
0201-1ROOM=NAND
C15461
2
CERM-X5R
10UF20%
ROOM=NAND
6.3V
0402-9
C15481
2
20%
01005
0.1UF
X5R-CERM
ROOM=NAND
6.3V
C15111
216V
ROOM=NAND01005
100PF5%
NP0-C0G
C15101
216V
01005ROOM=NAND
100PF5%
NP0-C0G
C15441
201005
0.1UF
ROOM=NAND
X5R-CERM
20%6.3V
C15451
2
16VNP0-C0G
5%100PF
ROOM=NAND01005
C15261
26.3V0.1UF20%
ROOM=NAND01005X5R-CERM
C15271
2
ROOM=NAND
SM
P3MM-NSMPP15051ROOM=NAND
SM
P3MM-NSMPP15041
ROOM=NAND
SM
P3MM-NSMPP15031
SM
ROOM=NANDP3MM-NSM
PP15021
ROOM=NAND
SM
P3MM-NSMPP15001
SM
ROOM=NANDP3MM-NSM
PP15011
P3MM-NSMROOM=NAND
SM PP15211
SM
ROOM=NANDP3MM-NSM
PP15201
ROOM=NAND1/32W MF010050%
0.00 R15211 2
0.000% 01005 MF
ROOM=NAND1/32W
R15201 2
THGBX5G9D8KLFXF
BOMOPTION=OMIT_TABLE
VLGA
PINUSE=IN
PINUSE=OUTPINUSE=OUT
PINUSE=OUT
PINUSE=OUTPINUSE=OUT
PINUSE=IN
PINUSE=IN
PINUSE=IN
ROOM=NAND
CRITICALPINUSE=IN
U1500
C3
D2
D4
H4
G3J3H2E3E7F6C7B8
G1
F4
C5
G5
M4
J5 J7
M6
K4 K6
H6H8
K8M8
N3N5
N7P8
K2M2
OA0
OA1
0O
D0O
D10
OG
0O
G10
A3 A7 F2 J1 J9 R3 R7 A5 OB0
OB1
0O
F0O
F10
R5E5
B4 B6 G7 L3 L5 L7
OC0
OC1
0O
E0
OE1
0 P2 P4 P6B2
D6
G9
F8
D8
ROOM=NAND
10%6.3V
0.01UF
01005X5R
C15601
2
0402-9CERM-X5R6.3V20%10UF
ROOM=NAND
C15431
2ROOM=NAND0402-9CERM-X5R
20%6.3V
10UFC15421
2
6.3V
ROOM=NAND
2.2UF20%
0201X5R-CERM
C15301
2
0.01UF
01005X5R6.3V10%
ROOM=NAND
C15611
2
1%10K1/32W
NOSTUFF
ROOM=NAND
MF01005
R15611
2
ROOM=NAND
1/32W
01005MF
1%10K
NOSTUFF
R15601
2
01005
1/32W
34.80.5%
MF
ROOM=NAND
R15001
2
ROOM=NAND
15UF
0402-1
6.3V20%
X5R
C15031
2
ROOM=NAND
15UF20%6.3V
0402-1X5R
C15021
220%15UF
ROOM=NAND0402-1
6.3VX5R
C15011
2
0402-1ROOM=NAND
20%15UF6.3VX5R
C15411
2
15UF20%
0402-1X5R6.3V
ROOM=NAND
C15401
2
ROOM=NAND0402-1
20%6.3V
15UF
X5R
C15211
26.3V0402-1ROOM=NAND
15UF
X5R
20%
C15201
2
20%
X5R-CERM6.3V
0.1UF
01005ROOM=NAND
C15311
2
24.9
1%1/32W
01005MF
ROOM=NAND
R15301 2
NP0-C0G
5%
ROOM=NAND01005
100PF16V
C15081
2
100PF
NP0-C0G
5%16V
01005ROOM=NAND
C15071
2
0.1UF6.3VX5R-CERM
20%
ROOM=NAND01005
C15241
2
100PF16VNP0-C0G01005ROOM=NAND
5%
C15251
20402-9
10UF
CERM-X5R
ROOM=NAND
20%6.3V
C15221
2
10%
ROOM=NAND01005X5R-CERM
1000PF6.3V
C15541
2
ROOM=NAND01005X5R-CERM6.3V20%0.1UFC15511
2
0.1UF6.3V
01005
20%
X5R-CERM
ROOM=NAND
C15501
2
3.01K1/20WMF201
1%
ROOM=NAND
R15011
2
8 16
9
13
13 6
13
13
13 6
13 6
13 6
13 6
13 6
13 6
13
13 6
6
17 16 11
8
13 6
6
6
6
13
34 9
13 6
13 6
6
6
13
13 6
15
34 30 21 20 17 14 13 12 9 8 7 6 5 3
34 30 21 20 17 14 13 12 9 8 7 6 5 3
15
5
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PP
PP
PP
PP
PP
PP
PP
PP
VER-1
PCI_
AVDD
_CLK
1PC
I_AV
DD_C
LK2
CLK_IN
PCIE_REFCLK_PPCIE_REFCLK_M
PCI_
VDD1
PCI_
VDD2
VREF
VDDI
OVD
DIO
VDDI
OVD
DIO
VDDI
O
VCC
VDDI
O
VCC
VCC
VCC
VCC
VCC
AVDD
1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
EXT_ALE
EXT_CLE
EXT_RNB
EXT_NWE
EXT_NRE
EXT_NCE
EXT_D7EXT_D6EXT_D5EXT_D4EXT_D3EXT_D2EXT_D1EXT_D0
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
ZQ
PCIE_RX1_P
PCI_RESREF
PCIE_RX0_MPCIE_RX0_P
VSS
VSS
PCIE_TX0_MPCIE_TX0_P
PCIE_RX1_M
RESET*
TRST*
PCIE_CLKREQ*
PCIE_TX1_PPCIE_TX1_M
PCI_
AVDD
_H
NC
NC
NC
NCNCNCNCNC
Administrator打字机文本http://www.mfcbox.com
ANTIGUA PMU - Buck Supplies
0.80V/0.90V/1.0V
0.80V/0.90V/1.0V
1.1A MAX
10.5A MAXBUCK4
4.7A MAX4.7A MAX
1.5A MAXBUCK0
BUCK212.5A MAX
1.1A MAX
BUCK
5400mA MAX
BUCK
7BU
CK6
BUCK
81.1A MAX
BUCK1BUCK3
0.80V/0.90V/1.0V
0.725V/0.825V
0.775V/0.95V/1.0V
14 OF 60
VOLTAGE=0.85V
VOLTAGE=1V
VOLTAGE=1.2V
VOLTAGE=1V
VOLTAGE=1.8
VOLTAGE=1V
VOLTAGE=1.1V
VOLTAGE=1V
VOLTAGE=1.1V
VOLTAGE=1.1V
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.8V
20 OF 49
A.0.0
051-00094
VCC_MAIN_SNS
PIQA20161T-SM
CRITICALL2041
0.47UH-20%-3.8A-0.048OHM
PIQA20121T-SMROOM=PMU
XW2040
ROOM=PMU
XW2030
1.0UH-20%-3.6A-0.060OHMCRITICAL
OMIT_TABLE OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLEOMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
10UFC2086
D2255A080UXUVAI2
0201
1.0UH-20%-3.6A-0.060OHM
BUCK3_FB
BUCK3_LX0ROOM=PMU
U17
M19
1.0UH-20%-3.6A-0.060OHM L20301
BUCK6_LX0
BUCK5_FB
BUCK5_LX0
Z16 BUCK2_PP_SOC_FB
BUCK2_LX1
CRITICAL
BUCK0_LX10.47UH-20%-3.8A-0.048OHM
C2088
BUCK2_LX0
ROOM=PMU
0.47UH-20%-3.8A-0.048OHM
15UF
PP1V8_TOUCHPP1V8_IMU_OWL
C2024
C2018
15UF
PP1V1
PP1V8_SDRAM
BUCK8_LX0
BUCK8_FB
BUCK7_LX0
BUCK7_FB
BUCK6_FB
PP1V1_SDRAM
BUCK4_FB
BUCK4_LX1
BUCK4_LX0
PP_FIXED
PP_GPU_SRAM
PP1V2_CAMERA
BUCK0_LX2
PP_CPU_SRAM
BUCK1_LX2
BUCK0_PP_CPU_FB
BUCK1_LX0
BUCK0_LX3
BUCK0_LX0 PP_CPU
PP1V8
PP_VCC_MAIN
PP_GPU
BUCK1_LX1
BUCK1_LX3
BUCK1_PP_GPU_FB
PP_SOC
SYSTEM POWER:PMU (1/3)SYNC_MASTER=N71_SINGLE_BRD SYNC_DATE=05/29/2014
1.0UH-20%-3.6A-0.060OHM
PIQA20161T-SMROOM=PMU
CRITICAL
L200012
0.47UH-20%-3.8A-0.048OHM
PIQA20121T-SM
CRITICALROOM=PMU
L200312
0.47UH-20%-3.8A-0.048OHM2
PIQA20121T-SMROOM=PMU
CRITICAL
L20131
1.0UH-20%-3.6A-0.060OHM
PIQA20161T-SMROOM=PMUCRITICAL
L201012
ROOM=PMU
10UF
0402
20%6.3V
C20871
2
ROOM=PMU0402
20%6.3V
1
2
ROOM=PMU0402
20%6.3V
10UFC20851
2
5%
ROOM=PMU
NP0-C0G
100PF
01005
16V
C20621
2
C15
ROOM=PMUCSP
CRITICAL
U2000
F8
A3B3C3
A5B5C5
A7B7C7
A9B9C9
F12
A17B17C17
A15B15
A13B13C13
A11B11C11
J14
H17H18H19
K17K18K19
V19
R18R19
U18V18Y18Z18
U16U15
T9
V11Y11Z11
V13Y13Z13
V16Y16
M13
M17M18
J5
H1H2
C1
F1F2
C19
F17F18F19
V17Y17Z17
V15Y15Z15
A4B4C4
A8B8C8
A16B16C16
A12B12C12
J17J18J19
T18T19
V12Y12Z12
N17N18N19
J1J2
E1E2
E17E18E19
F10
L5L13
R6
R8L4
V3
ROOM=PMU
NP0-C0G
5%
01005
100PF16V
C20441
2
CRITICAL
1 2
ROOM=PMUPIQA20121T-SM
L202112
0.47UH-20%-3.8A-0.048OHM
ROOM=PMUCRITICALPIQA20121T-SM
L20111 2
CRITICALROOM=PMU
PIQA20121T-SM
L20011 2
ROOM=PMUPIXB2016FE-SM
1.0UH-20%-2.25A-0.15OHMCRITICAL L2080
12
ROOM=PMUPIXB2016FE-SM
CRITICAL1.0UH-20%-2.25A-0.15OHM
L207012
ROOM=PMUPIQA20161T-SM
CRITICAL L205012
ROOM=PMU
L20401 2
PIQA20161T-SM
2
CRITICALPIQA20161T-SM
1.0UH-20%-3.6A-0.060OHML2020
1 2
1.0UH-20%-3.6A-0.060OHM
CRITICALROOM=PMU
PIQA20161T-SM
L20121 2
1.0UH-20%-3.6A-0.060OHM
CRITICALPIQA20161T-SMROOM=PMU
L20021 2
0201X5R-CERM
20%2.2UF
ROOM=PMU
6.3V
C20981
2
2.2UF
X5R-CERM
20%6.3V
ROOM=PMU
C20971
2
X5R-CERM0201
2.2UF20%
ROOM=PMU
6.3V
C20961
26.3V20%
ROOM=PMU
X5R-CERM0201
2.2UFC20951
220%
0201X5R-CERM
ROOM=PMU
6.3V
2.2UFC20941
2
ROOM=PMU
X5R-CERM
20%
0201
2.2UF6.3V
C20931
2
0201ROOM=PMU
20%
X5R-CERM6.3V
2.2UFC20921
2
ROOM=PMU
X5R-CERM
2.2UF20%
0201
6.3V
C20911
220%2.2UF6.3V
0201X5R-CERM
ROOM=PMU
C20901
2
2.2UF
ROOM=PMU0201
6.3V20%
X5R-CERM
C20891
2
ROOM=PMU01005
100PF5%
NP0-C0G16V
C20321
2
ROOM=PMU0402-1
15UF
X5R
20%6.3V
C20811
2
ROOM=PMU
X5R
20%
0402-1
15UF6.3V
C20711
2
20%
ROOM=PMU0402-1X5R
15UF6.3V
C20611
2
0402-1X5R
20%
ROOM=PMU
6.3V
15UFC20511
2
ROOM=PMU0402-1X5R
20%15UF6.3V
C20801
2
ROOM=PMU
X5R
20%
0402-1
15UF6.3V
C20701
2
ROOM=PMU0402-1
15UF
X5R
20%6.3V
C20601
2
ROOM=PMU0402-1
15UF
X5R
20%6.3V
C20501
2
ROOM=PMU
15UF
0402-1X5R
20%6.3V
C20431
2
ROOM=PMU0402-1
15UF
X5R
20%6.3V
C20421
2
ROOM=PMU
15UF
0402-1X5R
20%6.3V
C20411
2
ROOM=PMU
15UF
0402-1X5R
20%6.3V
C20401
2
ROOM=PMU0402-1X5R
20%6.3V
C20311
2
ROOM=PMU0402-1
15UF
X5R
20%6.3V
C20301
2
ROOM=PMU0402-1
15UF
X5R
20%6.3V
C20261
2
15UF
X5R
20%6.3V
0402-1ROOM=PMU
C20251
2
ROOM=PMU0402-1X5R6.3V20%15UF
1
2
ROOM=PMU
15UF
0402-1X5R
20%6.3V
C20231
2
115UF20%6.3VX5R0402-1ROOM=PMU
C20222
ROOM=PMU0402-1
15UF
X5R
20%6.3V
C20211
2
ROOM=PMU0402-1
15UF
X5R
20%6.3V
C20201
2
15UF
0402-1X5R
20%6.3V
ROOM=PMU
C20191
220%
0402-1
6.3V
15UF
X5R
ROOM=PMU
1
20402-1
15UF
X5R
20%6.3V
ROOM=PMU
C20171
2
6.3V20%
X5R0402-1
15UF
ROOM=PMU
C20161
26.3V20%
X5R
15UF
0402-1ROOM=PMU
C20151
26.3V15UF
X5R
ROOM=PMU
20%
0402-1
C20141
20402-1ROOM=PMU
6.3V20%
X5R
15UFC20131
2
15UF20%
ROOM=PMU
X5R6.3V
0402-1
C20121
2
15UF20%
X5R
ROOM=PMU0402-1
6.3V
C20111
2
ROOM=PMU
15UF
0402-1X5R
20%6.3V
C20101
220%
0402-1
15UF6.3VX5R
ROOM=PMU
C20091
2
15UF
0402-1X5R
20%6.3V
ROOM=PMU
C20081
2X5R20%6.3V
15UF
0402-1ROOM=PMU
C20071
2
ROOM=PMU
20%15UF
0402-1X5R6.3V
C20061
2
ROOM=PMU
15UF
0402-1X5R
20%6.3V
C20051
2
ROOM=PMU0402-1X5R
20%15UF6.3V
C20041
2
ROOM=PMU
15UF
0402-1X5R
20%6.3V
C20031
2
15UF
ROOM=PMU0402-1X5R
20%6.3V
C20021
2
ROOM=PMU
X5R
20%6.3V
0402-1
C20011
2
NP0-C0G
100PF5%
ROOM=PMU01005
16V
C20991
2
CERM-X5R
ROOM=PMU
20%6.3V
0402-9
10UF1
2
ROOM=PMU
SH