Analog and Digital Communication Labchettinadtech.ac.in/storage/14-07-17/14-07-17-14-08-56...28 Analog and Digital Communication Lab The incoming message wave is sampled with a train

1 Analog and Digital Communication Lab



Amplitude modulator trainer kit diagram

AM Detector trainer kit Diagram



Calculations:


Result:




Balanced modulator circuit diagram

Generation of DSB-SC

1. For the same circuit apply the modulating signal(AF) frequency in between

1Khz to 5Khz

having 0.4 VP-P and a carrier signal(RF) of 100KHz having

a 0.1 VP-P .


2. Adjust the RF carrier null potentiometer to observe a DSB-SC

waveform at the output terminal on CRO and plot the same.

3. Repeat the above process by varying the amplitude and frequency of AF but

RF maintained constant.

Result:






Result:




Result:




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Result:


EXNO: DATE:

PULSE CODE MODULATION ENCODER AND DECODER

Aim:

To perform the pulse code modulation encoding and decoding process.

Apparatus Required:

S. No. Components Specification Quantity

1. Resistor 2. Capacitor 3. Transistor 4. Bread Board 5. Function Generator 6. Oscilloscope 7. Diode 8. Trainer Kit 9. IC

Theory:

The Pulse Code Modulation is a technique where the samples are transmitted as coded

words of finite bit (binary digit) length. In this method of signal Coding, the message

signal is sampled and the amplitude of each sample is rounded off (approximated) to the

nearest one of a finite set of discrete levels, so that both time and amplitude are

represented in discrete form. This allows the message to be transmitted by means of a

digital (coded) waveform, thereby distinguishing pulse-code modulation from all analog

modulation techniques. The three essential blocks of any PCM system are SAMPLING,

QUANTIZING &ENCODING as shown in the fig below.

PCM Modulation encoder Block Diagram


The incoming message wave is sampled with a train of narrow rectangular pulses so as

to closely approximate the instantaneous sampling process. In order to ensure perfection

reconstruction of the message at the receiver, the sampling rate must be greater than

twice that of the message wave (in accordance with the sampling theorem).Thus the

application of sampling permits the reduction of the continuously varying the message

wave to a limited number of discrete values per second.

Quantizing:

Quantizing is the process of approximating sample levels into their closest fixed value.

The values are pre-selected and, since they are fixed, they are easy to encode. The

quantized waveform experiences either quantum changes in amplitude or no change in

amplitude. Given a signal, fs, with peak voltage points of Vh and Vl, the size (S) of a

quantum step is determined by this relationship:

S = (Vh - Vl) / n

Where n is the number of steps between Vh and Vl . The below fig. illustrates the

relationship between fs and a quantized example. The quantized levels are those fixed

levels that are the nearest to fs at the point the sample is taken.

Encoding:

To exploit the advantages of sampling and Quantizing, we require the use of an encoding

process to translate the discrete set of sample values to a more appropriate form of signal.

Any plan for representing each member of this discrete set values as a

particular arrangement of discrete events is called a code.

One of the discrete events in a code is called a code element or symbol. For example, the

presence or absence of a pulse is a symbol. A particular arrangement of symbols used in a

code to represent a single value of the discrete set is called a code word or character.

Suppose that in a binary code, each code word consists of n-bits. Then using such a code,

we may represent a total of 2n distinct numbers. For example, a sample quantized in to

one of 24=16 levels may be represented by a 4-bit code word.


The figure above summarizes the theoretical process of developing a PULSE CODE

MODULATION (PCM) effect. The range of voltages for signal fs is divided into discrete

quantized steps (S). The signal is sampled at each step, with the resulting amplitude of

the samples coded into binary values. The binary equivalents are actually associated with

analog values midway between step amplitudes to minimize errors. These binary codes

are shown at the bottom of the figure. The original waveform is transmitted as a

serial stream of binary bits are decoded into the quantized level of each of the samples.

At the receive station the binary bits are decoded into the quantized samples and the

original signal is reproduced from the resulting samples. Quantizing errors resulting from

original levels that were not exactly the same as the quantized step value appear in the

replicated waveform.

PCM Model Graph


PCM Encoder & Decoder Trainer Kit Diagram


Procedure:

1. Give the connection as per the diagram 10.2

2. Switch on the power supply

3. Take the reading of PCM output

4. Give the connections for PCM decoder

5. Take the readings and draw graph

Result


EXNO: DATE:

DELTA MODULATION AND DEMODULATION

Aim:

To perform the Delta modulation and demodulation.

Apparatus Required:



Theory:

Delta modulation is an encoding process where the logic levels of the transmitted pulses

indicate whether the decoded output should rise or fall at each pulse.

The figure below shows the linear delta modulation process.

Delta Modulator Block Diagram


The Delta encoding process samples, quantizes and encodes the intelligence signal into a

digital signal. The instantaneous voltage of an intelligence signal is compared to the

feedback signal. The result of the comparison is quantized and encoded and appears as a

logic 1 or logic 0, depending on which sample voltage is greater. The encoded logic

levels make up the digital signal. Delta modulation requires simple hardware for

encoding an intelligence signal. The encoding process consists of a digital sampler and an

integrator shown in the figure below.

The digital sampler consists of a comparator and a D-type flip-flop. The intelligence

signal drives the non-inverting input of the comparator. The feedback signal from the

integrator drives the inverting input of the comparator. During each clock signal the

comparator compares the present sample voltage of the intelligence signal with the

feedback signal.

The feedback signal is an approximate voltage of the previous intelligence signal sample.

If the intelligence signal is greater than the feedback signal, the comparator outputs logic

1 to the D input of the D-type flip-flop. The D-type flip-flop will set the Q OUTPUT to

+5V on the leading edge of the next clock pulse. If the intelligence signal is

less than the feedback signal the comparator outputs an negative signal to the D-type flip-

flop.

The Q output of the D-type flip-flop is 0V on the leading edge of the next clock pulse.

The Q output of the D-type flip-flop is the digital signal. The digital signal contains the

information needed by an integrator to generate the approximate intelligence signal

(feedback signal).


This is shown in the figure below

Delta Modulator Graph

The integrator outputs an upward –sloping ramp as the feedback signal when the

digital signal is at logic 1.When the digital signal is at logic 0, the integrator

outputs a downward-sloping ramp as the feedback signal. The digital signal is the

difference between the intelligence and feedback signals.


Delta Modulator Trainer Kit Diagram


Procedure:

1. Connect PLA1 to PLAA

2. Connect channel 1 to CRO to TPA1/TPAA ; adjust VR1 to minimum to get zero

level signal.

3. Connect channel 1 to TP1 and channel 2 to TPB1 and adjust VR2 to obtain square

wave half the frequency of the clock rate selected (Output at TP1)

4. Connect Channel 1 to TP2 and set voltage/div of channel 1 to mV range and

observe a triangle waveform, which is output of integrator. It can be observed that

as the clock rate is increased, amplitude of triangle waveform decreases. This is

called minimum step size (Clock rate can be changed by depressing SW1 switch).

5. Connect channel 1 to TPA1/TPAA; adjust VR1 in order to obtain a 1 KHz

sinewave of 500 mV pp approximately.

6. Signal approximating 1 KHz is available at the integrator output (TP2); this signal

is obtained by integrating the digital output resulting from Delta Modulation.

7. Connect channel 1 to TP2 and channel 2 to TPB1; it can be observed that the

digital high makes the integrator output to go upwards and digital low makes the

integrator output to go downwards.

8. With an oscilloscope displaying three traces,, it is possible to simultaneously

observe the input signal of the modulation, the digital output of the modulator and

the signal obtained by the integration from the modulator digital output.

9. Notice that, when the output (Feedback signal) is lower than the analog input the

digital output is high, whenever it is low when the analog input is lower than the

integrated output.

10. Increase the amplitude of 1 KHz sinewave by rotating VR1 to1 Vpp and observe

that the integrator output follows the input signal.

11. Increase the amplitude of 1 KHz sinewave further high, and observe that the

integrator output cannot follow the input signal. State the reason


12. Repeat the above mentioned procedures with different signal sources and

selecting different clock rates and observe the response of the linear Delta

Modulator

The decoding process of the delta modulation system is simpler than the decoding

process of a simple pulse-code modulation system. The Delta modulation decoding

process receives, integrates and filters the digital signal into a reconstructed intelligence

signal.

Delta Demodulator

The digital signal is converted to an integrated signal, which approximates the original

intelligence signal. The integrated signal is then filtered and converted to the

reconstructed intelligence signal.

The Delta De-Modulation uses simple hardware for converting a digital signal to a

reconstructed signal. The decoding system consists of an integrator and a low-pass filter

as shown in the figure above.

The integrator in the decoding system is identical to the integrator in the encoding

process. The digital signal is input to the integrator. The integrator outputs an upwards

loping ramp when the digital signal is logic 1.

When the digital signal is at logic 0, the integrator outputs a downward-sloping ramp.

The integrated signal is then input to a low-pass filter. The low-pass filter filters the high

frequency components from the integrated signal and converts it to the reconstructed

signal.


Delta Demodulator

Procedure:

1. Prearrange the connections of Linear Delta Modulator

2. Connect PLB1 (Digital o/p of Delta Modulator) to PLBB (i/p of Linear Delta

Modulator)

3. Connect PLC1 (Linear Delta Demodulator output) to either PLCA (i/p of fourth

order

LPF) or PLCB (i/p of second order LPF)


Result


EXNO: DATE:

DIGITAL MODULATION TECHNIQUES

Aim:

To perform the digital modulation techniques (ASK,PSK)

Apparatus Required:



Theory:

Amplitude Shift Keying(ASK):

we have the equation for the modulated carrier represented by the

C (t) = A (t) cos [w0t + Ö (t)]

Where C (t)= Carrier sine wave

A (t)= Time varying Amplitude

w0t = time varying angle

Ö (t) = phase difference

In Amplitude shift keying, the carrier is being transmitted only when the modulating data

is ‘one’ and when the data is ‘zero’ the carrier is rejected from transmission. Thus the

resulting modulated output of this type of modulation can be represented as follows:

M (t) = r (t) C (t), where M (t)=Modulated carrier


r (t) = Time varying modulating which is either ‘one’ or ‘zero’

Now M (t) = A (t) cosw0t when modulating data is one= 0 when modulating data is zero

Phase Shift Keying (PSK):

In the PSK modulation, for all ‘one ‘ to ‘zero’ transitions of the modulating data, the

modulated output switches between the in phase and out-of-phase components of the

modulating frequency.

Hence, we have M (t) = A (t) coswt, if the data is ‘one’

= A (t) cos (wt + Ö (t)), if the data is ‘one’

where Ö(t)=180o

Amplitude Shift Keying


Phase Shift Keying

Amplitude Shift Keying Trainer Kit Diagram


Phase Shift Keying Trainer Kit Diagram

Procedure:

1. Give connection as per the trainer kit

2. Switch on the kit

3. Take the readings

4. Draw the circuit diagram


Result

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Analog and Digital Communication Labchettinadtech.ac.in/storage/14-07-17/14-07-17-14-08-56...28 Analog and Digital Communication Lab The incoming message wave is sampled with a train