IEEE TRANSACTIONS ON EDUCATION. VOL. 34. NO. I , FEBRUARY 1991 I29

An Educational Image Processing/Machine Vision System

William David Richard, Member, IEEE

Abstract-This paper describes an image processing/machine vision system that was developed specifically for educational use. Most sys- tems used in educational settings were not designed specifically for such use. In many cases, most of a student’s laboratory time is spent learn- ing the particular system in use, rather than the complexities of the assigned algorithm. The IBM PC-based system described here, which consists of an adapter card for the PC, a standard black-and-white video camera and monitor, and a collection of image processing algo- rithms, eliminates this problem. The major advantages of the system described are its low cost and extremely simple programming inter- face. Both the hardware design of the adapter card and the software interface are described.

I. INTRODUCTION HERE are many different image processinghachine vision T systems in use at universities for teaching concepts at an

introductory level. Most of these systems were not designed specifically for educational use. In many cases, most of a stu- dent’s laboratory time is spent learning the particular system in use, rather than the complexities of the assigned algorithm. The IBM PC-based system described here eliminates this problem. The major advantages of this system are its low cost and ex- tremely simple programming interface.

11. SYSTEM ARCHITECTURE The PC-based educational image processinglmachine vision

system described here consists of a gray-scale image digitizer/ display adapter for the IBM PC /XT, a standard black-and-white camera and monitor, and a library of image processing soft- ware. The adapter is capable of digitizing 256 x 256 x 8-b noninterlaced images and displaying them on a standard com- posite monitor with a 1 : 1 pixel aspect ratio in real time. Eight- bit pixel resolution allows each pixel to be displayed in one of 256 different shades of gray. To the PC, the adapter looks like 64 kilobytes of dynamic random access memory (DRAM).

The architecture of the image digitizeddisplay adapter is shown in Fig. 1. The adapter contains 65 536 bytes of video random-access memory, or VRAM, that is used as a frame store [ 11. The images displayed on the video monitor are stored in this VRAM. The frame store is mapped directly into the mem- ory address space of the computer and occupies one complete 65 536 byte segment. The starting address of this buffer is nor- mally set to EOOOOH. This address can be set to any segment boundary via jumpers. The 65 536 byte segment starting at EOOOOH is typically unused by the PC/XT. It is also above the 640 kilobyte DOS boundary, eliminating all the problems that

Manuscnpt received July 20, 1989; revised September 20, 1990. The author is with the Department of Electrical Engineering, Washing-

IEEE Log Number 904 1505. ton University, St. Louis, MO 63130.

would arise if this memory were available for program memory, data memory, etc.

The frame store is actually a two-port memory since both the computer and the video circuitry have access to it. The CPU access port is implemented using the VRAM’s normal DRAM input/output (I/O) port. The video access port is implemented using the VRAM’s built-in shift registers [l]. A row of the memory array can be transferred to/from these shift registers.

The image digitizer/display adapter can operate in two dif- ferent modes, digitize and freeze. A one-bit output port is used to select the active mode of operation. Synchronizing flip-flops are used so that the active mode only changes during a vertical blanking interval.

The image digitizer/display adapter uses both a video analog- to-digital converter (VADC) and a video digital-to-analog con- verter (VDAC) to reduce system complexity and cost. The VADC used is a flash converter with an on-chip video clamp that does not require an external video amplifier [2]. The VDAC used is an 8-b DAC that produces composite video and is ca- pable of driving 75 or 37.5 Q loads. It has TTL-compatible SYNC and BLANK inputs [3].

In freeze mode, images in the frame buffer are displayed on the external monitor, and the VADC is disabled. During the horizontal blanking interval proceeding a given video line, the associated row of the frame store is loaded into the VRAM shift registers via a special VRAM control cycle. After the VRAM’s shift registers are loaded, they are clocked to shift their data to the output VDAC. This operation is independent of the opera- tion of the DRAM 1/0 port once the shift registers are loaded.

Since the adapter does not have genlock capability, the video output from the adapter is used to drive the composite sync in- put on a standard black-and-white RS-170 video camera. In dig- itize mode, the image digitizeddisplay adapter digitizes each video line from the camera via the VADC and shifts the data into the shift registers associated with the frame store. At the same time, this information is fed to the output VDAC to drive the monitor. This allows the contents of the frame store to be displayed in real time on the system monitor during digitiza- tion. At the end of each video line, during the horizontal blank- ing interval, a special VRAM control cycle loads the digitized video information into the corresponding row of the frame store. In digitize mode, the CPU has normal access to the frame store. This allows routines to be written which, for example, monitor changes in the image or check for movement.

Since improper operation would result if both the computer and the video circuitry tried to access the frame store at the same time, it is necessary to have an arbitration scheme. The image digitizer/display adapter uses one of the computer’s DMA channels to eliminate the possibility of simultaneous computer access and video system access to the image store.

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Fig. 1. Block diagram of the image digitizeridisplay adapter

The IBM PC/XT has four DMA channels. Channel 0 is used for system DRAM refresh. Channel 2 is used by the floppy disk circuitry, and channel 3 is used by the hard drive circuitry. This leaves channel 1 free for use by external peripherals.

Each time the host computer is turned on or rebooted, DMA channel 1 is programmed via a short assembly language routine, called from the AUTOEXEC.BAT file, to perform a single DMA cycle in response to the DRQl + signal from the video timing generator. During this cycle, the bus interface circuitry on the adapter card performs the appropriate VRAM control cycle. In freeze mode, a cycle is generated which loads the VRAM shift registers with the next row of the VRAM to be displayed. In digitize mode, a cycle is generated which writes the VRAM shift register contents into the appropriate row in the frame store. Since a DMA cycle is in progress when these cycles occur, it is impossible for the CPU to request access to the frame store, so contention is eliminated.

Once the image digitizer/display adapter has been initialized, the frame store looks like 65 536 bytes of DRAM to the com- puter. The byte at offset 0 from the base segment address cor- responds to the pixel in the upper left corner of the video display. The byte at offset 1 corresponds to the adjacent pixel on the same row. The byte at offset FFFFH corresponds to the pixel in the lower right corner of the video display.

111. THE TURBO PASCAL INTERFACE

Turbo Pascal provides an exceptional software interface to the image digitizerldisplay adapter, and all of the utilities used with the adapter were written in Turbo Pascal [4]. The feature of Turbo Pascal that makes it so useful is the absolute decla- ration. This declaration allows variables, and in this case, ar- rays, to reside at specific memory addresses. The two- dimensional array Image is defined in each of the example rou- tines below as follows:

var Image: array[O. ,2541 of array [O. .255]

of byte absolute $E000:0;

This definition defines the two-dimensional array of bytes named Image to have 255 rows, with each row containing 256 ele- ments, or columns. In addition, the absolute declaration places the physical starting location of the array at memory location EOOOOH. This corresponds to the standard memory location of the frame store. In effect, this definition defines a Turbo Pascal

array that overlays exactly the memory used for the frame store. To access the Zth row and Jth column of the image, it is only necessary to use the proper subscripts. For example, the state- ment:

Image [Z ,q : = 0 ;

sets the pixel in the Zth row and Jth column to zero, or black. There is only one problem with the definition of Image given

above: the array has been declared to be 255 X 256, rather than 256 x 256, the actual size of the frame store. This is necessary because Turbo Pascal generates the compile time error message “insufficient memory” when an attempt is made to declare an array containing more than 65 535 bytes (a 256 X 256 byte image contains 65 536 bytes). Since the bounds error checking function is turned off by default, however, the entire image can be addressed even though its full size is not declared. The pro- gram or other data cannot be destroyed by doing so either since this memory is otherwise unavailable to DOS (it is above the 640 kilobyte DOS boundary). The only thing that cannot be done is the use of a constant row index of 255 in a program statement since this will result in a compile time error message. You can “program around” this quirk, if needed, by assigning a variable the value of 255 and then using the variable in the program statement.

IV. IMAGE PROCESSING UTILITIES

A library of image processing/machine vision routines has been developed for use with the image digitizer/display adapter. A brief list of the most commonly used routines is given below.

DIGITIZE - set the adapter for continuous image acqui-

FREEZE - disable image digitization (freeze frame) FASTLOAD- loads a file into the buffer from disk FASTSAVE - saves a file from the buffer to disk ADDNOISE - adds uniformly distributed noise BLANK COHIST EULER GROW HIST HISTEQ - performs histogram equalization INTHIST LOWPASSX- low-pass filtering routines, X = 1, 2, 3

sition

- blanks the display buffer - histogram routine for the color card - finds Euler number for a binary image - enlarges an image from upper left (2 X )

- histogram routine for nongraphics systems

- fast integer version of HIST

RICHARD: EDUCATIONAL IMAGE VISION SYSTEM 131

NEGATE - negates the image in the buffer REFLECT - reflects the image about the x = y axis ROBERTS - performs Robert’s algorithm on an image ROTATE - rotates an image 90” clockwise SHRINK - shrinks an image to the upper left comer SOBEL - performs Sobel’s algorithm on an image THRESH - thresholds an image using an input value

V. EXAMPLE UTILITIES Two example utilities are given below. The first, Negate,

forms the photographic negative of the image in the frame store by replacing each pixel with its negative, i.e., with 255 minus the original pixel value. The second routine, Roberts, performs Robert’s edge detection algorithm on the image in the frame store [5]. The image in the buffer is replaced with the magnitude of the operator.

A. Image Negative program Negate ; {Form the negative of the image in the

buffer. }

var I ,J : Integer ; { I = row, J = column } Image : array[O. .2541 of array[O. .2551 of byte absolute $e000:0 ;

begin for I : = 0 to 255 do begin

{For each row ... I

{and each column.. . I

{Negate a pixel. I

for J : = 0 to 255 do begin

Image[I,J] := 255 - Image[I,J] ;

end ; end;

end .

B. Robert’s Algorithm

program Roberts ; {Perform Robert’s algorithm. I var I , J : Integer ; { I = row, J = column }

A,B,C, D : real ; Image : array[O. .254] of array[O. .255] of

byte absolute $e000:0 ;

{A,B,C,D = pixels

begin for I := 0 to 254 do begin

f o r J : = Oto254do begin

A := Image [I,J] ; B : = Image[I+ 1 , J ] ; C : = Image[Z,J+ 11 ; D : = Image[I+ 1 ,J+ 11 ; A : = A - D ; B : = B - C ; A : = A * A ; B : = B * B ; A : = sqrt(A+B) ; if (A > 255) then

Image[I,J] : = trunc(A) ; A := 255 ;

end; end ;

end .

{For each row.. .

{and each column.. .

{Initialize the real {variables with the {correct values.

{Compute the (magnitude of the {operator.

{Check for overflow.

{Replace the upper {left pixel with the {value of the {operator.

C. Comments On a standard IBM PC/XT running at 4.77 MHz, Robert’s

algorithm executes in 765 s without math coprocessor support. This time is reduced to 170 s using the coprocessor. The negate routine executes in approximately 10 s with or without a copro- cessor. Since it does not use floating point arithmetic, copro- cessor support does not reduce the execution time of this routine.

When any routine modifies an element of the array Image, the result is immediately observable on the monitor. This fea- ture greatly increases the educational value of the system. When students execute routines they have written, they see the results as they are calculated. In many cases, the cause of improper algorithm operation can be identified via observation of pro- gram execution in this manner.

VI. EXPERIMENT OUTLINES

In an educational setting, it may not always appropriate to release the source listings of all the utilities. The Negate routine can then be given as an example, for instance, and the students asked to write a reflect or rotate utility. In addition, utilities more pertinent to a specific course can be assigned as projects. Examples could include a routine that checked for changes in the image during digitization (an intruder detector) or the im- plementation of an advanced edge operator.

Several of the utilities supplied are well suited for use in short “observation” experiments. The histogram equalization rou- tine is a good example. Students can be required to use this routine to enhance one or more images, which can be turned in as proof of project completion, and comment on the results. The edge detection algorithms, as well as others, work well when used in this manner.

Several utilities can be combined to form more interesting experiments. Starting with a noise-free image, students can add random noise to an image with the AddNoise utility. The three different low-pass filter routines can then be used to filter and improve the image. Many other such experiments are possible.

VII. DISCUSSION

The unique contention elimination scheme described above, as well as the use of a VADC, a VDAC, and VRAM’s, makes the overall architecture of the image digitizer/display adapter described here very simple. The current implementation uses a VADC, a VDAC, 8 VRAM’s, an EPROM, an oscillator, a re- sistor pack, and 22 SSI TTL packages. The package count could be reduced considerably by using larger VRAM modules and PAL’S or PLA’s instead of SSI components. SSI components are relatively inexpensive, and since the design easily fits on one two-sided, PC-sized card, little, if any, cost savings would be realized by such a redesign. Because of the its simple archi- tecture, construction cost of an image digitizeddisplay adapter is very low. Excluding the cost of the circuit board, parts for the prototype cost approximately $100.

The arbitration scheme used in the design of the image digi- tizer/display adapter represents a tradeoff between cost and per- formance. Almost no hardware is required to implement this scheme. This savings is obtained at the cost of reduced system bandwidth. Each time a VRAM cycle is required, a DMA cycle is initiated. This occurs even when the CPU is not accessing the frame store. At standard video rates, 256 X 60, or 15360, DMA cycles are required per second. For a standard PC, each DMA cycle takes 6 X 210 ns, or 1260 ns, to complete. The

132 IEEE TRANSACTIONS ON EDUCATION. VOL. 34. NO. 1, FEBRUARY 1991

total overhead, per second, is thus 15360 x 1260 ns, or 19.3 ms. This scheme thus reduces the total system bus bandwidth by 1.93 %. Considering the reduction in system complexity and cost, this performance reduction is easily justified for the edu- cational system described here.

VIII. CONCLUSIONS The PC-based educational image processing/machine vision

system described here has been used very successfully for teaching and research purposes both at Washington University in St. Louis and at the University of Missouri-Rolla. The ex- tremely simple programming interface to the image digitizer/ display adapter allows emphasis on the subject matter of a course, rather than on the intricacies of a particular image pro- cessing system. The ability to observe program execution en- hances the learning process, in addition to reducing algorithm debugging time. Only a rudimentary understanding of PC-DOS is required to use the system, and this material is easily covered in a single one hour lecture. Similarly, Turbo Pascal can be introduced and the first programming assignment made after a second 1 h lecture.

REFERENCES

[ l ] Texas Instruments MOS Memory Data Book, Texas Instruments, Inc., Dallas, TX, 1986, pp. 4-17-4-40.

Brooktree Bt208 Data Sheet, Brooktree Corporation, San Diego,

Telmos TML 1842 Video DAC Data Sheet, Telmos, Inc., Sun- nyvale, CA, 1985, pp. 1-4. Turbo Pascal Version 3 .O Reference Manual, Borland Interna- tional, Inc., Scotts Valley, CA, 1986. L. G. Roberts, “Machine perception of three-dimensional sol- ids,” in Optical and Electro-Optical Information Processing, J . T. Tippet er a l . , Eds. Cambridge, MA: M.I.T. Press, 1965, pp. 159- 197.

CA, 1988, pp. 1-15.

William D. Richard (S’81-M’88) was born on January 23, 1961 in Poplar Bluff, MO. He re- ceived the B.S., M.S., and Ph.D. degrees in electrical engineering from the University of Missouri-Rolla in 1983, 1985, and 1988, re- spectively.

He was the General Motor’s Fellow in the Institute for Flexible Manufacturing and Indus- trial Automation at the University of Missouri- Rolla from 1986 to 1988. He is currently an Assistant Professor of Electrical Eneineerine at ~~~~~

Washington University in St. Louis, MO. His interests inclide m e d h imaging and instrumentation, ultrasound applications, image process- ing, machine vision, and computer engineering.

Dr. Richard is a member of Eta Kappa N u , Tau Beta Pi, Phi Kappa Phi, and Sigma Xi.