Advanced Silicon/Silicon-GermaniumDevice Simulations

John Barkerin collaboration with

Asen Asenov, Mirela Borici, Scott Roy,Jeremy Watling, Richard Wilkins, Lianfeng Yang

Nanoelectronics Research CentreDepartment of Electronics and Electrical Engineering

University of Glasgow

UK SiGe Research ProgrammeReview Meeting, 3rd April, 2003

Outline

•Is silicon near its end?

•Physics, Modelling and Simulation

•Interface Roughness

•Silicon-Germanium studies

•Advanced Simulation methodology

•Advanced Devices

•Fully quantum atomistic simulation

•Summary

1. Is silicon near its end?

House of Commons Select Committee(2002)Red brick wall between 2005-2007Fundamental limit: 2015Theory Limit: 10-20 nm

Suggests: single electronics,magnetic and atomic devicescarbon nanotubes, quantum computingand other radical alternatives to CMOSbe pursued

Concentrate on microprocessor designand architecture

1978:red brick wall 0.25µm limit,alternatives included magnetic bubble logic

conv. & quantum devices based on GaAs and InP!

Atomic scale MOSFET in the near future ??

We still firmly believe the Si route is the best

Reality check:Reality check:

Scaling of MOSFETs to decanano dimensionsScaling of MOSFETs to decanano dimensions

International Technology Roadmap 2001 EditionYear 2001 2004 2007 2010 2013 2016

Technology node (nm) 130 100 65 45 32 22

MPU Gate Length (nm) 65 37 25 18 13 9

Oxide thickness (nm) 1.3-1.6 0.9-1.4 0.6-1.1 0.5-0.8 0.4-0.6 0.4-0.5

Inte l Road map J une 200 1 (Kyoto)Year 2000/1 2003 2005 2007 2009

Technology node (nm) 130 90 65 45 30

Gate length (nm) 70 50 30 20 15

IEDM 2001 a mendme ntGate length (nm) 60 50 30 20 15

Solution exists

Solution Being Pursued

No Known Solutions The accelerating road map!

House of Lords

MOSFET Technology

The accelerating road map!

50 nm gates 30 nm gates

Intel

Raised Source Drain: power reduction

High k dielectric: leakage, avoid too thin

SOI : kill leakage; better materials:strained Si, SiGe

Paradigm shift

Beyond the House of Lords!

2001-2

Intel 20 nm transistor Intel 10 nm transistor (2002)

The IBM 6 nm silicon transistor (IEDM 2002)

demonstrated

Silicon Nanoelectronics

Today’s transistors 130 nm to 90 nm

Tomorrows transistors: still silicon!

Projection:

a vision down to 4nm-2 nm exists

corresponding to a timescale 2023-2025

Huge possibilities: versatile platform

for new and emerging technologies

US,

Japan

Europe,

UK??

(width of a Carbon NT)

new programmes

Device issues (partial): routes forward exist

Leakage

Power dissipation

Voltage scaling

Frequency

Direct S-D tunnelling

Off-On control

Fluctuation phenomena

device architectureengineered Si compatible materials

novel dielectrics

SOI RSD

interface roughness

many-body “mobility” degradation

atomistic effects

quantum effects

Will need different kinds of transistors in system blocks:

•Datapaths (speed, leakage)•Dedicated DSP (power, leakage)•Memory (density is main concern)•AnaloguePower and leakage determine the size ratiosbetween these blocksNumber of different transistors types is determined byparameter spreadLess devices could solve the problem, but, needcontrol of the threshold (4th terminal), with strongtransfer function.System solutions: adaptive control, coding, ...

System issues

Future of mainstream electronics

Silicon nanoelectronics

Device design and System design required togetherto solve issues of: power, leakage, fluctuations, stability

Silicon, strained silicon, silicon-germanium, germaniumIII-V on silicon/germanium good versatile materials technology

ALL subscribed to by major industry players

Lifetime: beyond 2025

THIS IS OUR MOTIVATION FOR BEING IN THE SiGe Project

2. Physics, modelling and simulation

Why is simulation useful?

•Part of the design-optimisation cycle

•Extraction of circuit parameters

•Calibration and extension of commercial tools

•Develop device physics and architecture

•Getting ahead of the game.

Simulation toolsDevelopment of a fully bipolar (electrons and holes) 2-D Full-Band Monte Carlo device simulator for Si/strained Si/SiGe that includes degeneracy, high doping effects, advanced screening models, quantum potential and interface roughness scattering. Down to 30 nm.

Device Physics and new Simulation tools– Investigation of carrier transport and scattering at interfaces– New non-perturbative models for interface roughness scattering– Effects of degeneracy, high doping, band-gap narrowing– Advanced screening models– Quantum transport extensions: density gradient, quantum potential, Wigner function,

Green function– Atomistic studies: classical , semi-classical and full quantum transport

Design - optimisation with partners– Layer and device design for consortium partners– Modelling and scaling study of high linearity MODFETs, based on experimental data

from Daimler Chrysler

Applications to partners and industrySiGe MODFETs, RF devices, Si, strained Si and SiGe well tempered

devices, double gate devices, atomistic devices.Course on Device Modelling

2nd-5th July 2002

Summary of Progress (2002-2003) - see also posters

• An extension of semi-classical Boltzmann-Fuchs theory, that is suitable for efficient inclusion within the Monte Carlo framework.

• Probability of specular or diffuse scattering is chosen according to the carrier k-vector and incident scattering angle. This overcomes one of the major failings of the traditional semi-classical model.

€

Ps =exp−4Δrms2 k2cos2ϑ( )

The scattering from a rough surface, has strong randomizing effects, resulting in a broad distribution over the emergent angles, while scattering from a smoother interface has a high probability at emergent angles close to specular

4. Interface Roughness: new non-perturbative model

Gaussian auto-covariance Exponential auto-covariance

RMS height: 0.5nm Correlation Length: Lc = 3nm

Diffuse scattering, depends on the autocorrelation function considered.

Polar plot of probability of scattering through a given angle

in

surface

P=1.0diffuse

specular

diffuse

Semi-classical model versus ab-initio quantum calculations

Ab initio interface scattering:Gaussian wavepacket scattering off a smooth interface

Initial Motion of Wave Packet

Time Real Space k (Fourier) Space

0.0 ps

0.02 ps

0.05 ps

Electron rest mass, V(r) = 0; kx0 = ky0 = 109 m-1;E = 76meV

Ab initio interface scattering:Gaussian wavepacket scattering off a rough interface

Initial Motion of Wave Packet

Time Real Space k (Fourier) Space

0.0 ps

0.02 ps

0.05 ps

Electron rest mass, V(r) = 0; kx0 = ky0 = 109 m-1;E = 76meV

backscattering&diffuse scattering

4. Silicon-Germanium Studies: 2 examples

• Simulation of 67Simulation of 67nmnm IBM IBM Relaxed and Strained Si Relaxed and Strained Si nn-MOSFET.-MOSFET. Provides test for interface roughness simulationsProvides test for interface roughness simulations

• Optimizations of Si/SiGe 70 nm MODFET for RF Optimizations of Si/SiGe 70 nm MODFET for RF and high linearity applications: and high linearity applications: using Daimler-Chrysler data using Daimler-Chrysler data ((part of support for experimental RF part of support for experimental RF and linear systems programme and linear systems programme))

Other work: see posters

4.1 Simulation of 4.1 Simulation of 67nm IBM Relaxed and Strained Si IBM Relaxed and Strained Si nn-MOSFET-MOSFET

Comparison between the n-type Strained Si and control Si MOSFETs:• 67nm effective channel length• Similar processing and the same doping conditions

For the strained Si MOSFET:• 20nm strained Si layer thickness• Strained Si on relaxed SiGe (Ge content: 15%)

K.Rim, et. al., Symposium on VLSI Technology 2001http://www.research.ibm.com/resources/press/strainedsilicon/

IIdd-V-Vgg Current Characteristics: Monte Carlo v Experiment Current Characteristics: Monte Carlo v Experiment

IIdd-V-Vg g Current Characteristics Current Characteristics (higher fields)

Channel Velocities: Monte CarloChannel Velocities: Monte Carlo

Electron Velocities along the channel of IBM 67nm Si n-MOSFET, Vd=Vg=1V

Strained Si 67nm n-channel MOSFET Structure

Id-Vg Current Characteristics for strained Si n-MOSFET

Study 2: Optimizations of Si/SiGe MODFET Study 2: Optimizations of Si/SiGe MODFET for RF and high linearity applicationsfor RF and high linearity applications

• Based on the understanding of a Daimler-Chrysler 70nm Si/SiGe MODFET

• Aim for high RF performance and high linearity:

• RF: fT=f(gm,Cg, etc); fmax=f(fT, gm,Cgs,Cgd, gds,etc)

• Linearity: PIP3=4gm/(gm2 RL) High is Good

• Trade-off designs between fT and linearity

• Gate-to-channel distance

• Gate position (Lgs/Lds)

• Doping in the channel (MODFETs vs. DCFETs)

• Effects of scaling on RF performance and linearity

L. Yang, A. Asenov, M. Boriçi, J. R. Watling, J. R. Barker, S. Roy, K. Elgaid1, I. Thayne, T. Hackbarth

Device StructureDevice Structure

• MODFET• DaimlerChrysler structure• double-side modulation doping• high mobility

• MODFET with doped channel• sandwich-like doped channel• reduced mobility• high carrier density

• Doped Channel FET (DCFET)• sandwich-like doped channel• without modulation doping• high carrier density• lower mobility

Calibrations of drift-diffusion simulatorsCalibrations of drift-diffusion simulators

Calibrated Id-Vg characteristics of DaimlerChrysler70nm Si/SiGe MODFET

One example: Effects of the gate-to-channel distanceOne example: Effects of the gate-to-channel distance

Effects of the gate-to-channel distance d on the linearity (PIP3);the inset is the effect of d on the transconductance gm

small dis worstfor linearitybut good for RF

ResultsResults

• Trade-off designs for RF performance and linearity

• Gate-to-channel distance d: decreasing d enhances RF, but lowers linearity

• Gate position Lgs/Lds: increasing Lgs/Lds achieves high linearity, but reduces gm and drive current ID

• Doped channel – leads to good linearity, although gives a decrease for gm and drive current ID

• Scaling• improved RF performance• slightly decreased linearity

5. Development of Advanced Simulation Methodologies

•SiGe heterostructure FET models•Full Band Monte Carlo Device & bulk simulation,Poisson-Schrödinger•Drift Diffusion, Hydrodynamic, Quantum corrected versions

•Density gradient & space-dependent mass•Wigner equation (2002)

•Quasi-Classical atomistic simulator(2002) unique to Glasgow•Full Non-Equilibrium Green Function simulator (2003)•Green function - T-matrix quantum hydrodynamic atomistic simulator (2003) unique to Glasgow

Grants

NASA

IBM

EPSRC

(Platform)

Ind. partners

NEW

Possible quantum effects within a MOSFET

GateTunnelling

B-to-BTunnelling

S-to-DTunnelling

QuantumConfinement

Quantum transport

6. Advanced Devices

• Intel have announced conventional MOSFETs scaled down to 10nm, and IBM have even announced a 6nm channel length.

• The scaling of this design below 10nm is likely to require intolerably thin gate oxides and unacceptably high channel doping, therefore advocating a departure from the conventional MOSFET concept.

• One of the most promising new device structures is the double-gate MOSFET, with the possibility of scaling to 10nm and below, where direct source-drain tunnelling will become a real possibility.

4 nm Double gate MOSFET:An Artist’s Impression

Classical Quantum

6.1 Double-Gate MOSFET structure

Based on structure of Z. Ren, R. Venugopal, S. Datta, M. Lundstrom, D. Jovanovic, J. Fossum IEDM Technical Digest pp. 715-718 (2000)

density-gradient

Source-Drain TunnellingClassical and Density Gradient Simulations

ID-VG characteristics obtained from classical and calibrated DG simulations for double gate MOSFETs with channel lengths of 20nm and 4nm. VD=1V, VG is applied to both gates. The quantum mechanical threshold voltage shift,VT, is illustrated.

Non-equilibrium Green’s Function Method

• Equations of motion for Green’s functions:

• (E-H-r) Gr (r,r',E) = (r-r')

• (E-H-r) G< (r,r',E) = < Ga (r,r',E)

• (E-H-r) G> (r,r',E) = >> Ga (r,r',E)

r represents self-energy due to open boundaries and scattering

r = U gr (surface) U

• Poisson’s equation

Striations in DOS plots are sub-bands. Spectral shift evident near source barrier. Multiple sub-bands are required for accurate scattering calculations

MOSFET Quantum Mechanical Effects: Sub-bands Jovanovich et al (2001)

Quantum mechanical DOS (spectral function) data taken at Si-SiO2 interface

Non-equilibrium Green’s Function and low-costDensity Gradient Simulations for double gate structure

ID-VG characteristics obtained from Non-equilibrium Green’s function and calibrated DG simulations for double gate MOSFETs with gate lengths ranging from 20nm to 4nm. VD=1V.

Fig. 4 The current approach tosemiconductor device simulationassumes continuous ionised dopantcharge and smooth boundaries andinterfaces.

Fig. 5 Sketch of a 22 nm MOSFETexpected in mass production in 2008.There are less than 50 Si atoms alongchannel. Random discrete dopants,atomic scale interface roughness andline edge roughness introducesignificant parameter fluctuations.

Fig. 6 Sketch of a 4 nm MOSFETexpected in mass production in 2023.There are less than 10 Si atoms alongthe channel. The size of the devicebecomes smaller than the size of alarge molecule.

6.2 The transition to atomistic devices

need more advanced simulation tools

4 nm

Atomistic effects: being studied in depth at Glasgow

Discrete nature of charge

Discrete nature of dopants

Line edge roughness

Interface roughness

Atomic segregation

Discrete many-body carrier interactions

Fischettiasenov et al

Large systems: self-averaging

Small systems: random micro-configurations

Conventional perturbation methods inadequate including NEGF

Exact non-asymptotic T-matrix partial-wave analysis of hard sphere model for impurities

and roughness

Results sensitive to configurationNo self-averaging

Treat impurity/roughness scattering non-perturbatively

7. Fully quantum atomistic simulation Barker, Physica (2003)

open 3D slab confined open box geometry

€

Vtotal(r) = V(r − rj )j =1

NI

∑

Random impurity potential: the Kohn and Luttinger ansatz

€

Vtotal(q ) = ρ I (q )V(q )

Fourier transform

€

ρI (q ) = e−iq.rj

j =1

NI

∑structure factor

€

< e−iq1 .r j

j=1

N I

∑ >= N Iδq1 0

€

< e−iq1 .r j e−iq 2 .r j '

j '=1

N I

∑j=1

N I

∑ > → N Iδq1 +q 2 0 + N I (N I −1)δq1 0δq 2 0

standard GF theory

ensemble average

€

=N−1 exp(iq.rI)I =1

N

∑ ≈ δq0 plotted for qmax =10π /boxside

N = 3 N=10 N=100 N=1000

€

Re{δ } = N−1 Re{ exp(iq.rI)I =1

N

∑ }

Im{δ } = N−1 Im{ exp(iq.rI)I =1

N

∑ }self-averaged

strong interference

Impurity array: N short range scatterering centres

€

Vtotal (r) = V (r − rj)j=1

N

∑

G= + +

+ +…

G≠ + + +

€

| ψ + >=| φin > −2m*

h2G0V | ψ + > ≡| φin > −

2m*

h2G0T | φin >

T matrix

€

G0+(r − r') =

1

4π

e ik |r −r ' |

| r − r'|

XSTANDARD NON-EQUILIBRIUM GREEN FUNCTION FAILS

T-matrix approximation: no self-averaging

€

T = V +VG0T€

tj = Vj +VjG0tj

€

T = tjj =1

NI

∑ +j =1

NI

∑ tjj '=1

NI

∑ G0tj ' +...

€

T ≈ t j

j=1

N I

∑

€

< k | T | k'> = e−i(k−k').r j

j=1

N I

∑ < k | t | k'>=

= FI (k − k') < k | t | k'>

€

|< k | T | k'>|2= N I |< k | t | k'>|2 {1+2

N I

(j> j '

∑ cosq.(r j − r j ')}

interference term

€

O(N I (N I −1) /2)

cross-section~

€

N Iσ ↔ N I2σ

open slab box

ka=0.25k=0.1a=2.5 nm

low energy

ka=1a=2.5 nm

mediumenergy

incoming current interferes with scattered current from impurity & boundary

classical trajectories

strong blocking by impurities or remote fluctuation pot

3 impurity system: box geometry z=0 plane

quantum flow meanders through despite classical blocking

strong diffractioneffects; somemultiple scattering

Box geometry 25 X 25 X 25 nm :density & current

meandering flowbetween impurities & vortices

S D S D

ka=2.5Si300K

Transmission coefficients and conductance

€

T = j(r)drain

∫∫ d2r / jin (r)source

∫∫ d2r

Compute conductance using Landauer formula

Results for devices with < 25 nm geometries

•Conductance very sensitive to impurity cluster orientation•Conductance not given by standard GF or Boltzmann•Flow between vortices is reversible: quasi-ballistic suggests flow between impurities and vortices is relaxiveConjecture:

Thermal superposition: Lundstrom picture

Why do small devices work?

actual flow is semi-classical fluid but within a renormalised fluctuation potential landscape.

8. Summary• A new interface roughness scattering model

developed:gives good agreement with 67 nm n-channel Si and Strained Si MOSFETs.

• Design and scaling studies provide useful results forRF and linear devices

• A state-of-the-art Monte Carlo simulator

• Practical and new ab initio quantum simulation tools• Role of atomicity and fluctuations• Advanced device studies down to 4 nm scale

• Silicon nanoelectronics has a great future -lets not ignore it!

END