A Low-Energy Reconfigurable Fabric For Embedded ComputingGayatri Mehta, Justin Stander, Colin Ihrig, Mustafa Baz, Brady Hunsaker and Alex K. JonesDepartment of Electrical & Computer Engineering, University of PittsburghFPGAs exhibit poor power characteristics compared to ASICs making them less desirable for mobile and battery-powered applications.ASICs exhibit better power characteristics but no programmability.Solution: Reprogrammable, Low-Energy Fabric The energy of 5:1 multiplexer fabric iswithin 5-10X of the ASIC implementation10X better than the Virtex II Pro FPGA 100X better than the Intel Xscale Processor at 733 MHzMotivationEnergy Consumption ResultsEmbedding the representative graph into different interconnectsSuperCISC ArchitectureMicro-Power Fabric ModelFabric is comprised of power-optimized ALUs and multiplexer-based interconnectIt mimics the computational style of SDFGsFPGA-like programmable ASIC-like power characteristics

Mapping of a benchmark onto the fabricAutomated mapping onto the fabricA representative Graph from signal processing applications4:1 interconnect4:1 multiplexer interconnectSystem-Level Interconnect Study5:1 multiplexer interconnect5:1 interconnect355:1 interconnect3553:1 interconnectEnergy comparison of different interconnect patternsEnergy comparison of different hardware and software implementationsMapping techniques used to map a benchmark onto fabric:-Heuristic Mapping-Mixed-Integer Linear Programming-Constraint Programming-Simulated Annealing

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