A High Efficiency Synchronous Buck VRM with Current Source

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A High Efficiency Synchronous A High Efficiency Synchronous Buck VRM with Current Source Buck VRM with Current Source Gate DriverGate Driver

Wilson EberleZhiliang ZhangDr. Yan-Fei LiuDr. P.C. Sen

QueenQueen’’s Power Groups Power GroupKingston, ON, CanadaKingston, ON, Canada

www.queenspowergroup.comwww.queenspowergroup.com 2

OutlineOutline1. Introduction

1.1. Why you should use current source gate driveWhy you should use current source gate drive2.2. Drawbacks of existing voltage source and Drawbacks of existing voltage source and

resonant based driversresonant based drivers2. Proposed Driver and Operation3. Driver Design Procedure4. Driver Optimization in the VRM5. Logic and Level Shift Circuits6. Experimental Results7. Conclusions


IntroductionIntroduction•• Application:Application: low voltage high current low voltage high current

voltage regulator modulesvoltage regulator modules

•• Trend to increase switching frequency for Trend to increase switching frequency for improvements in:improvements in:++ power densitypower density++ dynamic performancedynamic performance

Topology of Choice

Synchronous Buck


Drawbacks of Increased Switching Drawbacks of Increased Switching Frequency with Conventional DriversFrequency with Conventional Drivers

RextPWM

VCC=VGS

QP

QN

Gate Loss

Switching Loss

MOSFET Driver

SGSggate fVQP = SDSDSfallriseswitch fIVttP )(21

+=

MOSFET, or BJT

switches

Hard Switching WaveformsPower MOSFETparasitics in blue


Resonant Gate Drive TechniquesResonant Gate Drive Techniques

++ Many good (~10) circuits proposed Many good (~10) circuits proposed since early 1990s, but generally unusedsince early 1990s, but generally unused

•• LC resonant charging of the power LC resonant charging of the power MOSFET gate from zero initial currentMOSFET gate from zero initial current

•• These circuits emphasize gate energy These circuits emphasize gate energy savings,savings, but ignore, or canbut ignore, or can’’t achieve t achieve potential switching loss savingspotential switching loss savings


Resonant Gate Drive ReviewResonant Gate Drive ReviewExisting techniques suffer from at least Existing techniques suffer from at least one of five problems:one of five problems:

1.1. Circulating current conduction lossCirculating current conduction loss2.2. Peak current dependent on duty cyclePeak current dependent on duty cycle

CirculatingCurrent

Loss


Resonant Gate Drive ReviewResonant Gate Drive Review3.3. Large inductance, bulky transformer, or Large inductance, bulky transformer, or

coupled inductor coupled inductor 4.4. Slow turnSlow turn--on and/or turnon and/or turn--offoff5.5. Gate not actively clamped high and/or low, so Gate not actively clamped high and/or low, so

false triggering (false triggering (Cdv/dtCdv/dt) can result) can result

Q1

Qb

igate

vGSQ

Charging

Discharging


Conventional vs. Resonant DriveConventional vs. Resonant DriveSwitching Loss SavingsSwitching Loss Savings

Voltage source Voltage source RCRC--type chargingtype charging

limits speedlimits speed

Constant current source Constant current source type charging type charging

improves speed!improves speed!

Gate Gate CurrentCurrent

CURRENT SOURCE DRIVERS CAN CURRENT SOURCE DRIVERS CAN REDUCE TURNREDUCE TURN--ON AND TURNON AND TURN--OFF LOSS!OFF LOSS!


OutlineOutline1. Introduction2. Proposed Driver and Operation3. Driver Design Procedure4. Driver Optimization in the VRM5. Logic and Level Shift Circuits6. Experimental Results7. Conclusions


Proposed DriverProposed Driver


Creating a Discontinuous Current SourceCreating a Discontinuous Current SourceIndependent control of high side (HS) MOSFET and SR

Key To Speed:Key To Speed:• Create discontinuous

inductor current source, then

• Divert inductor pre-charge current to the gate


High Side MOSFETHigh Side MOSFETTurn On SequenceTurn On Sequence

• Dictated by PWMQ1signal

• Independent control of HS MOSFET and SR














High Side MOSFETHigh Side MOSFETTurn Off SequenceTurn Off Sequence




SR OperationSR Operation• Same procedure for

SR• Different time

intervals due to larger gate charge





Driver DesignDriver Design1. Set the turn on time, or

average gate current2. Set inductor pre-charge

time3. Calculate the inductor

value

on

gavg

avg

gon t

QIg

IgQ

t == ,

⎟⎠

⎞⎜⎝

⎛ += 11 4 don

g

oncb tt

QtV

L

ond tt21

1 ≈




Optimizing HS Gate Current Optimizing HS Gate Current w.r.tw.r.t. . Driver Loss and Switching LossDriver Loss and Switching Loss

1 1.5 2 2.5 3 3.5 4 4.5 50

0.250.5

0.751

1.25

1.51.75

22.25

2.52.75

33.253.5

avgHS

HS avgHSIg

1∝

avgHSIg∝

Total Driver LossTotal Driver Loss

SwitchingSwitchingLossLoss

Total Switching Total Switching + Driver Loss+ Driver Loss


Optimizing SR Gate Current Optimizing SR Gate Current w.r.tw.r.t. . Driver Loss and Body Diode LossDriver Loss and Body Diode Loss

1

1

avgQIg∝

1avgQIg∝

Total Driver LossTotal Driver Loss

Body Diode LossBody Diode Loss

Total Switching Total Switching + Driver Loss+ Driver Loss




Logic Generation for Logic Generation for DeadtimeDeadtimeand Sand S11--SS44 Gating SignalsGating Signals

Gating Signal Gating Signal OutputsOutputs

HS HS MOSFETMOSFET SRSR


Level Shift CircuitLevel Shift Circuit6 Switches (S6 Switches (S11--SS66))

RequireRequireLevel Shift Level Shift

CircuitsCircuits

x6x6




Experimental Setup and SpecsExperimental Setup and Specs•• Single Phase Apples Single Phase Apples

to apples comparisonto apples comparison• 6-layer, 2oz• 12V Input• 1.3V Output• Up to 30A Load•• 1MHz1MHz• IRF6617 HS• IRF6691 SR• 330nH inductor:

Vishay IHLP5050FD

Current Source DriverCurrent Source DriverSS11--SS88: NDS351AN, L: NDS351AN, L11: 68nH, L: 68nH, L22: 307nH: 307nH2.5ns fixed maximum 2.5ns fixed maximum deadtimedeadtime

Conventional DriverConventional DriverUCC27222UCC27222, Predictive Predictive deadtimedeadtime controlcontrol


WaveformsWaveformsHS MOSFET HS MOSFET

and SR and SR gategate--source source waveformswaveforms

HS MOSFET HS MOSFET DriverDriver

InductorInductorCurrentCurrent

WaveformWaveform


Efficiency vs. LoadEfficiency vs. Load1MHz, 12V input, 1.3V load, 10V 1MHz, 12V input, 1.3V load, 10V VccVcc

4% 4% Improvement!Improvement!

78.5

83.2 82.883.8

80.5

77.9

79.7

85.5

86.685.9

84.2

81.9

76

77

78

79

80

81

82

83

84

85

86

87

88

5 10 15 20 25 30Load Current [A]

Effic

ienc

y [%

]

UCC27222 Vo=1.3VResonant Driver Vo=1.3V


Power Loss vs. LoadPower Loss vs. Load1MHz, 12V input, 1.3V load, 10V 1MHz, 12V input, 1.3V load, 10V VccVcc

2.5W 2.5W ImprovementImprovement

PerPerPhase!Phase!

1.792.62

3.76

5.42

7.87

11.07

1.662.20

2.99

4.24

6.09

8.58

0

1

2

3

4

5

6

7

8

9

10

11

12

5 10 15 20 25 30Load Current [A]

Loss

[W]

UCC27222 Vo=1.3VResonant Driver Vo=1.3V


1.662.20

2.99

4.24

6.09

8.58

1.792.62

3.76

5.42

7.87

11.07

0

1

2

3

4

5

6

7

8

9

10

11

12

5 10 15 20 25 30Load Current [A]

Loss

[W]

Resonant Driver Vo=1.3VUCC27222 Vo=1.3V

Implications of Loss SavingsImplications of Loss Savings• 15W savings (2.5Wx6) in a

6 phase VRM, or• 120A output, assuming

loss limited to 9W per phase:• 5 phases required for

conventional driver (27A max per phase; 120A/27A=5 phases)

• 4 phases required for current source driver (30A max per phase; 120A/30A=4 phases)

• 1 phase eliminated: A SIGNIFICANT COST SAVINGS

27A

9W




Summary of AdvantagesSummary of Advantages• Current source drive to increase switching

speed, decrease switching loss and decrease conduction loss

• SR gate energy recovery (~50%) or higher operating Vcc

• Small driver inductors:• HS MOSFET: <100nH compared to 1uH+ for other

competitor current source gate driver• Optimized independent control of HS and SR

gate currents• Potential driver integration with no additional

pins for HS MOSFET and 1 additional pin for SR


ConclusionsConclusions• Novel current source gate driver for

synchronous buck VRM proposed• Driver operation, design, optimization,

logic, level shift and experimental results presented

• Driver achieves 4% efficiency improvement and 2.5W savings over conventional at 1MHz

• Elimination of 1 phase at 1.3V/120A load


AcknowledgementsAcknowledgementsThe authors would like to thank:

Ontario Centres of Excellence

C&D Technologies

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A High Efficiency Synchronous Buck VRM with Current Source