1

8255Programmable

Peripheral Interface

2

8255• It is a programmable peripheral

Interface with three i/o ports– A 8 bits– B 8 bits – C 4 bits upper and 4 bits lower

3

P A 3

P A 2

P A 1

P A 0

R D

C S

G N D

A 1

A 0

P C 7

P C 6

P C 5

P C 4

P C 0

P C 1

P C 2

P C 3

P B 0

P B 1

P B 2

P B 4

P B 5

P B 6

P B 7

W R

R E S E T

D 0

D 1

D 2

D 3

D 4

D 5

D 6

D 7

V C C

P B 7

P B 6

P B 5

P B 4

P B 3

1

3

2

4

5

6

7

3

3

9

8

10

12

13

11

14

15

16

17

19

20

18

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

8255A

Pin diagram 8255

4

P ow erS uppl i es

+ 5VG N D

G roupA

contro l

8255 B lock D iagram

G roupA

pro tA

(8)

G roupA

pro t CU pper

(4)

G roupA

pro t CL ow er

(4)

G roupB

pro tB

(8)

G roupB

contro l

R ead/w ri te

contro ll ogi c

D atabus

buff er 8 - b i tI nternaldata bus

B idi rectionalD ata B usD 7 - D 0

R D

W RA 1A 0

R E S E T

C S

I OP B 7 - P B 0

I OP C 3 - P C 0

I OP C 7 - P C 4

I OP A 7 - P A 0

5

AB

Y 0

G 2A

G 1

C

G 2B

Y 1Y 2Y 3Y 4Y 5Y 6Y 7

A7A3A4

A6A5A0

D7 - D0

IO RCIO W C

A1A2

RESET

RDW RA0A1RESETCS

D0D1D2D3D4D5D6D7

PA0PA1PA2PA3PA4PA5PA6PA7

PB0PB1PB2PB3PB4PB5PB6PB7

PC0PC1PC2PC3PC4PC5PC6PC7

Po

rt CP

ort B

Po

rt A

6

PA, PB, PC(Port A,B,C)

8 bit i/o ports

CS (Chip Select) A low signal at this pin enables the chipRD (Read) Read enable

WR (Write) Write enable

D0-D7 (Data Bus) Bi-directional data lines

A0,A1 (Address) Address select

7

8255 •The 8255 can work in 2 modes that are I/O mode and BSR mode

•i/o mode is further divided in to

1 0. Mode (Basic I/O) 2. 1 ( / )Mode Strobe I O - 3. 2 ( )Mode Bi Conditional Bus

8

Control Bytes for I/O mode

1

0D12D3D4D5D6D7D

Group B Port C (lower)

1 = input 0 = output

Port B 1 = input

0 = outputM MMM MMMMMMMMM

00 0= mode M MMM M011

1x = mode2

Group A Port C (upper)

1 = input 0 = output

Port A 1 = input

0 = outputM MMM MMMMMMMMM

00 0= mode M MMM M011

1 2x = mode