17
1 STORAGE COMPONENTS DIVISION 80331 DDR DIMM CRB 80331 CRB 2.0 1 C 8 7 6 5 D B A A B D 8 7 6 5 2 1 2 3 3 4 4 C REVISION: SHEET DATE MODIFIED: DESIGN NAME: SHEET TITLE: OF DESIGN ENGINEER: ProtoB Copyright 2003, Intel Corporation TABLE OF CONTENTS PBI FLASH INTERFACE / RESET STRAPS CPLD / HEX DISPLAY I2C / UART VOLTAGE REGULATORS PAGE 3 PAGE 4 PAGE 5 PAGE 6 PAGE 7 PAGE 8 PAGE 9 PAGE 10 PAGE 11 PAGE 12 PAGE 13 PAGE 14 PAGE 2 DDR BATTERY BACKUP PAGE 15 MICTOR CONNECTORS PAGE 16 PAGE 17 REVISION HISTORY 80331 DDR DIMM CUSTOMER REFERENCE BOARD BLOCK DIAGRAM 80331 - PRIMARY AND SECONDARY PCI 80331 - DDR / PBI / JTAG / UART / I2C 80331 - POWER / GROUND PRIMARY PCI BUS - EDGE CONNECTOR SECONDARY PCI BUS - SLOT DDR333 SERIES TERMINATION DDR333 DIMM CONNECTOR DDR333 TERMINATION 17 12-5-2003_8:37 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The 80331 DDR DIMM Customer Reference Board may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. MPEG is an international standard for video compression/decompression promoted by ISO. Implementations of MPEG CODECs, or MPEG enabled platforms may require licenses from various entities, including Intel Corporation. This schematic is furnished under license and may only be used or copied in accordance with the terms of the license. The information in this manual is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by Intel Corporation. Intel Corporation assumes no responsibility or liability for any errors or inaccuracies that may appear in this document or any software that may be provided in association with this document. Except as permitted by such license, no part of this document may be reproduced, stored in a retrieval system, or transmitted in any form or by any means without the express written consent of Intel Corporation. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com. AnyPoint, AppChoice, BoardWatch, BunnyPeople, CablePort, Celeron, Chips, CT Media, Dialogic, DM3, EtherExpress, ETOX, FlashFile, i386, i486, i960, iCOMP, InstantIP, Intel, Intel Centrino, Intel logo, Intel386, Intel486, Intel740, IntelDX2, IntelDX4, IntelSX2, Intel Create & Share, Intel GigaBlade, Intel InBusiness, Intel Inside, Intel Inside logo, Intel NetBurst, Intel NetMerge, Intel NetStructure, Intel Play, Intel Play logo, Intel SingleDriver, Intel SpeedStep, Intel StrataFlash, Intel TeamStation, Intel Xeon, Intel XScale, IPLink, Itanium, MCS, MMX, MMX logo, Optimizer logo, OverDrive, Paragon, PC Dads, PC Parents, PDCharm, Pentium, Pentium II Xeon, Pentium III Xeon, Performance at Your Command, RemoteExpress, SmartDie, Solutions960, Sound Mark, StorageExpress, The Computer Inside., The Journey Inside, TokenExpress, VoiceBrick, VTune, and Xircom are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others. Copyright © 2003, Intel Corporation

80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

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Page 1: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

1STORAGE COMPONENTS DIVISION 80331 DDR DIMM CRB80331 CRB 2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

TABLE OF CONTENTS

PBI FLASH INTERFACE / RESET STRAPS

CPLD / HEX DISPLAY

I2C / UART

VOLTAGE REGULATORS

PAGE 3

PAGE 4

PAGE 5

PAGE 6

PAGE 7

PAGE 8

PAGE 9

PAGE 10

PAGE 11

PAGE 12

PAGE 13

PAGE 14

PAGE 2

DDR BATTERY BACKUP PAGE 15

MICTOR CONNECTORS PAGE 16

PAGE 17REVISION HISTORY

80331 DDR DIMM CUSTOMER REFERENCE BOARD

BLOCK DIAGRAM

80331 - PRIMARY AND SECONDARY PCI

80331 - DDR / PBI / JTAG / UART / I2C

80331 - POWER / GROUND

PRIMARY PCI BUS - EDGE CONNECTOR

SECONDARY PCI BUS - SLOT

DDR333 SERIES TERMINATION

DDR333 DIMM CONNECTOR

DDR333 TERMINATION

1712-5-2003_8:37

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The 80331 DDR DIMM Customer Reference Board may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. MPEG is an international standard for video compression/decompression promoted by ISO. Implementations of MPEG CODECs, or MPEG enabled platforms may require licenses from various entities, including Intel Corporation. This schematic is furnished under license and may only be used or copied in accordance with the terms of the license. The information in this manual is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by Intel Corporation. Intel Corporation assumes no responsibility or liability for any errors or inaccuracies that may appear in this document or any software that may be provided in association with this document. Except as permitted by such license, no part of this document may be reproduced, stored in a retrieval system, or transmitted in any form or by any means without the express written consent of Intel Corporation. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com. AnyPoint, AppChoice, BoardWatch, BunnyPeople, CablePort, Celeron, Chips, CT Media, Dialogic, DM3, EtherExpress, ETOX, FlashFile, i386, i486, i960, iCOMP, InstantIP, Intel, Intel Centrino, Intel logo, Intel386, Intel486, Intel740, IntelDX2, IntelDX4, IntelSX2, Intel Create & Share, Intel GigaBlade, Intel InBusiness, Intel Inside, Intel Inside logo, Intel NetBurst, Intel NetMerge, Intel NetStructure, Intel Play, Intel Play logo, Intel SingleDriver, Intel SpeedStep, Intel StrataFlash, Intel TeamStation, Intel Xeon, Intel XScale, IPLink, Itanium, MCS, MMX, MMX logo, Optimizer logo, OverDrive, Paragon, PC Dads, PC Parents, PDCharm, Pentium, Pentium II Xeon, Pentium III Xeon, Performance at Your Command, RemoteExpress, SmartDie, Solutions960, Sound Mark, StorageExpress, The Computer Inside., The Journey Inside, TokenExpress, VoiceBrick, VTune, and Xircom are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others. Copyright © 2003, Intel Corporation

Page 2: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

80331 DDR DIMM CUSTOMER REFERENCE BOARD

2 17BLOCK DIAGRAMSTORAGE COMPONENTS DIVISION 80331 CRB 12-5-2003_8:37

DDR 333

GPIOs

DDR SDRAMBatteryBackup

8 MB

StrataFLASH

JTAG

Slot

RS-232I2C

Edge Connector

HEXLED Buzzer

Local BusSecondary PCI-X Bus (133MHz)

80331RS-232

Primary PCI-X Bus (133MHz)

Target MarketRAID CardTCP/IP Offload CardLow End NAS

32 KB

NV R

AM

Page 3: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

+3_3

V

33 CR1206 5%

100

100

8200

5%

NC

NC

+3_3

VPC

I

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

+3_3

VPC

I

+3_3

VPC

I8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

GND

GND

+1_5V

+3_3V

2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

GND

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

NC

NCNC

NCNCNCNC

NCNCNCNCNCNC

NC

NCNCNCNCNC

NCNCNC

NC

NC

NCNC

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

5%0

NC5%

05%

0

5%0

8200

5%

8200

5%

8200

5%

8200

5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

8.2K 5%

33.2 1%

33.2 1%

33.2 1%

33.2 1%

33.2 1%

8.2K 5%

+3_3

VPC

I

+3_3V

S_ACK64_N

S_AD0S_AD1

S_AD10S_AD11S_AD12S_AD13S_AD14S_AD15S_AD16S_AD17S_AD18S_AD19

S_AD2

S_AD20S_AD21S_AD22S_AD23S_AD24S_AD25S_AD26S_AD27S_AD28S_AD29

S_AD3

S_AD30S_AD31S_AD32S_AD33S_AD34S_AD35S_AD36S_AD37S_AD38S_AD39

S_AD4

S_AD40S_AD41S_AD42S_AD43S_AD44S_AD45S_AD46S_AD47S_AD48S_AD49

S_AD5

S_AD50S_AD51S_AD52S_AD53S_AD54S_AD55S_AD56S_AD57S_AD58S_AD59

S_AD6

S_AD60S_AD61S_AD62S_AD63

S_AD7S_AD8S_AD9

S_C/BE0_NS_C/BE1_NS_C/BE2_NS_C/BE3_NS_C/BE4_NS_C/BE5_NS_C/BE6_NS_C/BE7_N

S_CLKIN

S_CLKO0S_CLKO1S_CLKO2S_CLKO3

S_CLKOUT

S_DEVSEL_N

S_FRAME_N

S_GNT0_NS_GNT1_NS_GNT2_NS_GNT3_N

S_INTA_NS_INTB_NS_INTC_NS_INTD_N

S_IRDY_N

S_LOCK_N

S_M66EN

S_PAR

S_PAR64

S_PCIXCAP

S_PERR_N

NC_R25

S_RCOMP

S_REQ0_NS_REQ1_NS_REQ2_NS_REQ3_N

S_REQ64_N

S_RST_N

S_SERR_N

S_STOP_NS_TRDY_N

LD_1

PART 1 OF 980331 IOP

SECONDARY PCI-X BUS(IOP BUS)

LD_8

1_5V

HPI_N

NC_AA1

NC_E7

NC_F11

NC_F7

NC_G12

NC_H11

NC_H12

NC_H7

NC_H8NC_H9

NC_J8

NC_K2

NC_K5

NC_K6

NC_T4

NC_T8

NC_U5NC_U6

NC_U8

NC_V7

NC_V8

NC_W7

NC_W8

P_ACK64_N

P_AD0P_AD1

P_AD10P_AD11P_AD12P_AD13P_AD14P_AD15P_AD16P_AD17P_AD18P_AD19

P_AD2

P_AD20P_AD21P_AD22P_AD23P_AD24P_AD25P_AD26P_AD27P_AD28P_AD29

P_AD3

P_AD30P_AD31P_AD32P_AD33P_AD34P_AD35P_AD36P_AD37P_AD38P_AD39

P_AD4

P_AD40P_AD41P_AD42P_AD43P_AD44P_AD45P_AD46P_AD47P_AD48P_AD49

P_AD5

P_AD50P_AD51P_AD52P_AD53P_AD54P_AD55P_AD56P_AD57P_AD58P_AD59

P_AD6

P_AD60P_AD61P_AD62P_AD63

P_AD7P_AD8P_AD9

P_C/BE0_NP_C/BE1_NP_C/BE2_NP_C/BE3_NP_C/BE4_NP_C/BE5_NP_C/BE6_NP_C/BE7_N

P_CLK

P_DEVSEL_N

P_FRAME_N

P_GNT_N

P_IDSEL

P_INTA_NP_INTB_NP_INTC_NP_INTD_N

P_IRDY_N

P_LOCK_N

P_M66EN

P_PAR

P_PAR64

P_PERR_N

NC_H13

P_RCOMP

P_REQ64_N

P_REQ_N

P_SERR_N

P_STOP_NP_TRDY_N

VSS

PART 8 OF 9

PRIMARY PCI-X BUS80331 IOP

Place Resitor Packs near PCI ConnectorNO_POP RPACKS

R83R85R84R82

B0 silicon

Don't PopulateDon't PopulatePopulate

Don't PopulatePopulate

PopulateDon't Populate

A0 siliconA0/B0 Routing of REQ/GNT

Populate

W8T8

W7

U5U6AA1

V7

H12

H7

H11T4T6

E6

G5

H8J8F7

T3U2

A7D5B4E1

R1P4P3P1N1N2N3M1M2M4L1L3L4K1J1J2R8R7R5P6P7P8N5N6N8M5M7M8L6L7L8K8B10C10A9B9D9A8C8D8B7C7A6B6D6A5C5A4B3C3C2D3D2D1E4F4F2F1G3G2G1H4H3H1

V8

G11

R2E3

F5

H10G6

J7

J4J5

C4

H6

V2V4V5W3

F11

H9

V1

H13

U3

U8

AA8

U1

W4

R4K5G12K3K2

E7G9

Y1

K6

U3E3

K25E21F28N25

B24A23

C28

F29

G25

F25G24H24

L26K28K27D27C27H17H20

L29M26M28M29N27N29N28P29P27P26R29R28R26T27T26U29J22J23J25

K22

L24L23

M23M25

N24P24P23A21B21A22C22D22B23C23A24D24A25C25D25A26B26C26B27G18H18F19G19H19E20F20D21G21H21F22G22H22E23F23E24

R22

J29

K29C20

E29

E28D28

G29E26

F26

J28

U27

R21

U25

H23

T29

G27

L27

N22

M22

L22

J26K24

P22

E27

R25

U28

R23T24

U3E3

S_STOP_N

S_STOP_N7/B5 S_STOP_N

S_PAR7/B5 S_PAR

S_M66EN7/B7 S_M66EN

72 RP3A3

R2D7

R2D10

R2D8

R2D12

R2D5

1 8RP5A5NO_POP=TRUE

1 8RP5A4NO_POP=TRUE

1 8RP5A3NO_POP=TRUE

1 8RP5A2NO_POP=TRUE

1 8RP3A3NO_POP=TRUE

1 8RP3A2NO_POP=TRUE

1 8RP3A1NO_POP=TRUE

81 RP4A1NO_POP=TRUE

1 8RP4A5NO_POP=TRUE

S_REQ0_N S_REQ0_N7/C8

21

R2D

1NO

_PO

P=TR

UE

12

R2D

3NO

_PO

P=TR

UE

12

R2D

13NO

_PO

P=TR

UE

12

R2D

2NO

_PO

P=TR

UE

P_IDSEL 6/C5

2 1 R7R1NO_POP=TRUE

12 R7R2NO_POP=TRUE

P_INTD_N 6/D8P_GNT_N_A0

2 1 R3E2

P_REQ_N 6/C8

P_REQ_N_B0

12 R3E3P_REQ_N_A0

81 RP5A1NO_POP=TRUE

81 RP4A4NO_POP=TRUE

81 RP4A3NO_POP=TRUE

81 RP4A2NO_POP=TRUE

S_REQ3_N

S_GNT0_N7/C5

S_CLKO_MICTOR16/D8

S_CLKO3_R

S_CLKO_CPLD_RS_CLKO_SLOT_R

S_CLKO_CPLD12/C8

S_AD62

S_AD63

7/A7S_AD[63:0]

S_AD63

S_AD61S_AD60S_AD59S_AD58S_AD57S_AD56S_AD55S_AD54S_AD53S_AD52S_AD51S_AD50S_AD49S_AD48S_AD47S_AD46S_AD45S_AD44S_AD43S_AD42S_AD41S_AD40S_AD39S_AD38S_AD37S_AD36S_AD35S_AD34S_AD33S_AD32S_AD31S_AD30S_AD29S_AD28S_AD27S_AD26S_AD25S_AD24S_AD23S_AD22S_AD21S_AD20S_AD19S_AD18S_AD17S_AD16S_AD15S_AD14S_AD13S_AD12S_AD11S_AD10S_AD9S_AD8S_AD7S_AD6S_AD5S_AD4S_AD3S_AD2S_AD1S_AD0

S_AD62

S_AD32

S_AD33

S_AD34

S_AD35

S_AD36

S_AD37

S_AD38

S_AD39

S_AD40

S_AD41

S_AD43

S_AD44

S_AD45

S_AD46

S_AD47

S_AD42

S_AD48

S_AD49

S_AD50

S_AD51

S_AD52

S_AD53

S_AD54

S_AD55

S_AD56

S_AD57

S_AD58

S_AD59

S_AD60

S_AD61

7/A7

S_C/BE7_N

S_C/BE5_NS_C/BE4_NS_C/BE3_NS_C/BE2_N

S_C/BE0_NS_C/BE1_N

S_C/BE6_N

S_C/BE2_N

S_C/BE3_N

S_C/BE[7:0]_N

S_C/BE4_N

S_C/BE5_N

S_C/BE6_N

S_C/BE7_N

S_C/BE0_N

S_C/BE1_N

4 5RP4A1

63 RP4A1

2 7RP4A1

54 RP4A5

3 6RP4A5

S_INTD_N7/D4,13/B8

S_INTC_N7/D8,13/B8

S_INTA_N7/D8,13/B8S_INTB_N7/D4,13/B8

S_REQ1_NS_REQ2_N

S_REQ64_N7/A5 S_REQ64_N

S_REQ64_N

S_ACK64_N7/A8 S_ACK64_N

S_ACK64_N

S_PERR_N

S_PERR_N7/B8 S_PERR_N

S_LOCK_N

S_LOCK_N7/B8 S_LOCK_N

S_IRDY_N

S_IRDY_N7/B8 S_IRDY_N

S_FRAME_N

S_FRAME_N7/B5 S_FRAME_N

S_TRDY_N

S_TRDY_N7/B5 S_TRDY_N

S_DEVSEL_N7/B8 S_DEVSEL_N

S_DEVSEL_N

S_PAR647/C1 S_PAR64

S_RST_N7/C5 S_RST_N

S_PCIXCAP7/B7 S_PCIXCAP

HPI_N 13/B8

54 RP5A4

54 RP5A3

S_CLKIN

P_INTB_N6/D8P_INTA_N6/D5

P_CLK 6/C8

3 1780331 PRIMARY AND SECONDARY PCISTORAGE COMPONENTS DIVISION 80331 CRB 12-5-2003_8:37

S_RCOMP

S_CLKOUT_R

P_RCOMP

P_INTC_N 6/D5

P_AD62P_AD61P_AD60P_AD59P_AD58P_AD57P_AD56P_AD55P_AD54P_AD53P_AD52P_AD51P_AD50P_AD49P_AD48P_AD47P_AD46P_AD45P_AD44P_AD43P_AD42P_AD41P_AD40P_AD39P_AD38P_AD37P_AD36P_AD35P_AD34P_AD33P_AD32P_AD31P_AD30P_AD29P_AD28P_AD27P_AD26P_AD25P_AD24P_AD23P_AD22P_AD21P_AD20P_AD19P_AD18P_AD17P_AD16P_AD15P_AD14P_AD13P_AD12P_AD11P_AD10P_AD9P_AD8P_AD7P_AD6P_AD5P_AD4P_AD3P_AD2P_AD1P_AD0

P_AD63

P_AD[63:0]6/A7

P_M66EN 6/B8

P_REQ64_N 6/A5

P_PAR64 6/C2P_ACK64_N 6/A8

P_LOCK_N 6/B8

P_SERR_N 6/B8

P_PERR_N 6/B8

P_DEVSEL_N 6/B8

P_IRDY_N 6/B8

P_FRAME_N 6/B5

P_TRDY_N 6/B5

P_STOP_N 6/B5

P_PAR 6/B5

P_C/BE[7:0]_N6/A8

P_C/BE6_NP_C/BE5_NP_C/BE4_NP_C/BE3_NP_C/BE2_NP_C/BE1_NP_C/BE0_N

P_C/BE7_N

72 RP5A2

3 6RP5A2

54 RP5A2

72 RP5A3

3 6RP5A3

72 RP5A4

3 6RP5A4

72 RP5A5

3 6RP5A5

54 RP5A5

2 7RP4A2

63 RP4A2

4 5RP4A2

2 7RP4A3

63 RP4A3

4 5RP4A3

2 7RP4A4

63 RP4A4

4 5RP4A4

2 7RP5A1

63 RP5A1

4 5RP5A1

72 RP3A1

3 6RP3A1

54 RP3A1

72 RP3A2

3 6RP3A2

54 RP3A2

3 6RP3A3

54 RP3A3

72 RP4A5

7/C8 S_CLKO_SLOT

S_CLKO_MICTOR_R

6/C5P_GNT_N

P_GNT_N_B0

12

R2D

15

12

R3C

8

12

R4D

6

1 2R3A4

S_SERR_N7/B8 S_SERR_N

S_SERR_N

Page 4: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

1%53.6

GND

+3_3V

GND

5%10

00

5%10

00

GND

33.2 1%

+3_3V

GND

100

0.1UF16V

0.1UF16V

GND

GNDGND+3_3V

2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

GND

+3_3V

0.1UF16V

0.1UF16V

100

1%84

5

0

82005%

82005%

82005%

82005%

NCNC

+2_5V

GND

GND

+3_3V

GND;474LVC2G08

GND GND

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

1%38

5

5%10

00

5%10

00

GND

+5V

1%31

.6K

1%12

.4K

SOT23_5

GND

RST_INMR_N

RESET_N VCC

MAX6306UK29D3

+3_3V

0

0

82005%

82005%

82005%

82005%

82005%

82005%

GND

NC

0.1UF16V

SI3441

1%10

K

1%10

K

GND;474LVC2G08

+3_3V

5%15

00

SN74LVC1G14

GND

NC VCC

+3_3V

+3_3V

GND

5%15

00

X7RCC0603

.01UF

5%10

00

5%220

SOT143

MAX811_EUS_T

GNDMR_NRESET_N

VCC

LD_2

A0A1

A16A17A18A19

A2

A20A21A22

AD0AD1

AD10AD11AD12AD13AD14AD15

AD2AD3AD4AD5AD6AD7AD8AD9

ALE

GPIO[0]/U0_RXDGPIO[1]/U0_TXD

GPIO[2]/U0_CTS_NGPIO[3]/U0_RTS_N

GPIO[4]/U1_RXDGPIO[5]/U1_TXD

GPIO[6]/U1_CTS_NGPIO[7]/U1_RTS_N

PCE0_NPCE1_N

POE_NPWE_N

SCD0

SCD1

SCL0

SCL1

PART 2 OF 9

PBI / GPIO

LD_3

BA[0]BA[1]

CAS_N

CB[0]CB[1]CB[2]CB[3]CB[4]CB[5]CB[6]CB[7]

CKE[0]CKE[1]

CS[0]_NCS[1]_N

DDRCRES0

DDRDRVCRES

DDRRES[1]DDRRES[2]

DDRSLWCRES

DDRVREF

DM[0]DM[1]DM[2]DM[3]DM[4]DM[5]DM[6]DM[7]DM[8]

DQ0DQ1

DQ10DQ11DQ12DQ13DQ14DQ15DQ16DQ17DQ18DQ19

DQ2

DQ20DQ21DQ22DQ23DQ24DQ25DQ26DQ27DQ28DQ29

DQ3

DQ30DQ31DQ32DQ33DQ34DQ35DQ36DQ37DQ38DQ39

DQ4

DQ40DQ41DQ42DQ43DQ44DQ45DQ46DQ47DQ48DQ49

DQ5

DQ50DQ51DQ52DQ53DQ54DQ55DQ56DQ57DQ58DQ59

DQ6

DQ60DQ61DQ62DQ63

DQ7DQ8DQ9

DQS[0]

DQS[1]

DQS[2]

DQS[3]

DQS[4]

DQS[5]

DQS[6]

DQS[7]

DQS[8]

DQS_N[0]

DQS_N[1]

DQS_N[2]

DQS_N[3]

DQS_N[4]

DQS_N[5]

DQS_N[6]

DQS_N[7]

DQS_N[8]

MA[0]

MA[10]MA[11]MA[12]MA[13]

MA[1]MA[2]MA[3]MA[4]MA[5]MA[6]MA[7]MA[8]MA[9]

M_CK[0]M_CK[0]_N

M_CK[1]M_CK[1]_N

M_CK[2]M_CK[2]_N

M_RST_N

ODT[0]ODT[1]

RAS_NWE_N

PART 3 OF 9

DDR SDRAM INTERFACE

DDR INTERFACEPBI INTERFACE

RESET LOGIC AND JTAG INTERFACE

Leave floating for production designsThe 80331 has weak internal pullups on the JTAG TDI, TMS, TRST_N signals

80331_RESET_N

80331_RESET_N

PU_NC2PU_NC1

W1AA7AB6

Y5W6T1Y8

Y2Y6

AB3

AA2AA4

AB1

AB4AA5

U3E3

AC1

AB20AC22

AC9AJ10AD7AH9AH10AG11AF11AC12

AD22AF5AC8AC18

AE12AC13

AG17

AJ15

AJ17

AH17

AJ14

AJ16

AF16

AF29

AJ25

AJ23

AG19

AH13

AE9

AJ4

AE3

AG16

AE29

AJ26

AH23

AF19

AG13

AJ5

AE4

AF6AE7AF2

AD26AD25AF27AG28AD28AD29AE26AF28AH27AH26AE23AE24AG27AG26AF25AF24AH24AJ24AF21

AF23AG23AG22AJ22AH20AJ20AH18AJ18AJ21AG20AE18AF18AG14AF14AF12AJ11AD14AE13AJ12AH12AE10AD10AF8AH7AD11AG10AJ8AG8AJ6AH6AE6AD8

AH15AE27AG25AE21AJ19AJ13AJ9AG5AE1

AC28

AH4AG4

AE17AD16AC14AC15AC16AD17AF15AE15

AD13AD18

AB28AB29

AC29

AH3

AC21

AE20AD23

AH21

AD4AD5

AJ7AG7

AF3AG2AD2AD1AF1

AC27

AD20AC19

AF9

U3E3

AB21

AB23AB24

AB26AB27AA21AA22AC26AC25

W29Y27U21V22Y29Y28W22

V29V28

T21Y24U24V25U22Y22

W24V23T23V26T22

W26W27

AA28

Y25AA29W21

V21Y21

AA26AA25

W23

AA23

AB22AC24

U3E3

2 31 4

U4D1

TRST_MR_N

1 2R4D8

12

R4D

7

C4D11

TRST_R_N

21R

4D5

NO

_PO

P=TR

UE

9

7

5

3

1 2

8

6

4

2019

1817

1615

1413

1211

10

P1C1

2

3

1 5

4

U3E2

PBI_ALE

11/C6,12/C8,16/C6PBI_OE_N

12

R9N

4

PWRDELAY_N

PWR_OK9/A8,9/D2,15/B3

PWR_OK

1

27

U3E1

+3_3V;8

6/C5 P_RST_N

P_RST_N

12

R5E

2

12

R5E

1

21 D

5E1

2

1

3 4

5

6

Q6E1

C5E10

12

R5P3NO

_POP=TR

UE

12

R5P6NO

_POP=TR

UE

12

R5P5NO

_POP=TR

UE

12

R9N1NO

_POP=TR

UE

DUT_TMS

DUT_TMS

12

R9N2NO

_POP=TR

UE

12

R9N3NO

_POP=TR

UE

R9N5

R4D4

NO_POP=TRUE

DDR_LD_DQ0

DDR_LD_DQ60DDR_LD_DQ61DDR_LD_DQ62DDR_LD_DQ63

DDR_LD_DQ2DDR_LD_DQ1

DDR_LD_DQ[63:0]8/D8

DDR_LD_DQ3DDR_LD_DQ4DDR_LD_DQ5DDR_LD_DQ6DDR_LD_DQ7DDR_LD_DQ8DDR_LD_DQ9DDR_LD_DQ10DDR_LD_DQ11DDR_LD_DQ12DDR_LD_DQ13DDR_LD_DQ14DDR_LD_DQ15DDR_LD_DQ16DDR_LD_DQ17DDR_LD_DQ18DDR_LD_DQ19DDR_LD_DQ20DDR_LD_DQ21DDR_LD_DQ22DDR_LD_DQ23DDR_LD_DQ24DDR_LD_DQ25DDR_LD_DQ26DDR_LD_DQ27DDR_LD_DQ28DDR_LD_DQ29DDR_LD_DQ30DDR_LD_DQ31DDR_LD_DQ32DDR_LD_DQ33DDR_LD_DQ34DDR_LD_DQ35DDR_LD_DQ36DDR_LD_DQ37DDR_LD_DQ38DDR_LD_DQ39DDR_LD_DQ40DDR_LD_DQ41DDR_LD_DQ42DDR_LD_DQ43DDR_LD_DQ44DDR_LD_DQ45DDR_LD_DQ46DDR_LD_DQ47DDR_LD_DQ48DDR_LD_DQ49DDR_LD_DQ50DDR_LD_DQ51DDR_LD_DQ52DDR_LD_DQ53DDR_LD_DQ54DDR_LD_DQ55DDR_LD_DQ56DDR_LD_DQ57DDR_LD_DQ58DDR_LD_DQ59

DDR_LD_DM8

DDR_LD_DM[8:0]8/C6DDR_LD_DM0

DDR_LD_DM2DDR_LD_DM3DDR_LD_DM4DDR_LD_DM5

DDR_LD_DM7DDR_LD_DM6

DDR_LD_DM1

2

43

1 5

U6E1

12

R6E

11

2R

6E2

DDRRES2

12

R3C

7

12

R3C

5

12

R3C

4

PBI_A0

PBI_A2PBI_A1

PBI_A[2:0]11/D7,16/D5

11/C6,12/C8,16/C6PBI_WE_N

11/C8,16/C6PBI_CE0_N

12/C8,16/C6,16/C6

PBI_CE1_N

36

5U3E1

+3_3V;8

MR_RESET_N

MR_RESET_N

DDRRES1

DDR_LD_CS1_N

8/B4DDR_LD_CKE0

8/B4

DDR_M_RST_N 9/B4DDR_LD_WE_N 8/B4

DDR_LD_CS0_N8/B4

12

NO

_POP=TU

RE

R4D1 12

NO

_POP=TR

UE

R6R1 12

NO

_POP=TR

UE

R5P2 12

NO

_POP=TR

UE

R5P4

DDR_CK0 8/C2

DUT_TCK

DUT_TCK

DUT_TDI

DUT_TDI

DUT_TDO

DUT_TDO

DUT_TRST_N

DUT_TRST_N

PU_NC3

DDR_LD_CAS_N

8/C4

DDR_I2C_SCL 9/D4,13/D39/D4,13/D3DDR_I2C_SDA

13/C7SCL1

13/C7SCD1

DDR_VREF9/A5,14/A7

R4D3

12

R3C

3

12

R4D

2

C6P8

C5E6

U0_RTS_N 13/B7

U1_RTS_N 13/B7

U1_RXD 13/B7

U0_RXD 13/B7U0_TXD 13/B7U0_CTS_N 13/B7

U1_TXD 13/B7U1_CTS_N 13/A7

4 1780331 - DDR / PBI / JTAGSTORAGE COMPONENTS DIVISION 80331 CRB 12-5-2003_12:31

PBI_A16PBI_A17PBI_A18PBI_A19PBI_A20PBI_A21PBI_A22

11/D7,12/B8,16/D5PBI_A[22:16]

11/D4,12/C8,16/D8PBI_AD[15:0]PBI_AD15

PBI_AD14PBI_AD13PBI_AD12PBI_AD11PBI_AD10PBI_AD9PBI_AD8PBI_AD7PBI_AD6PBI_AD5PBI_AD4PBI_AD3PBI_AD2PBI_AD1PBI_AD0

C4D8

C6P6

21

R6P

1

DDR_LD_DQS7

DDR_LD_DQS6

DDR_LD_DQS5

DDR_LD_DQS4

DDR_LD_DQS3

DDR_LD_DQS2

DDR_LD_DQS1

DDR_LD_DQS0

DDR_LD_DQS[8:0]8/D6

DDR_LD_DQS8

DDR_LD_RAS_N8/B4

DDR_LD_BA0 8/B4DDR_LD_BA1 8/B4

DDR_LD_CB2DDR_LD_CB3DDR_LD_CB4DDR_LD_CB5DDR_LD_CB6DDR_LD_CB7

DDR_LD_CB[7:0]8/B6

DDR_LD_CB0DDR_LD_CB1

DDR_LD_CKE1

8/B4

DDR_CK1 8/C2

DDR_CK2 8/C2

DDR_CK0_N 8/C2

DDR_CK1_N 8/C2

DDR_CK2_N 8/C2

DDR_LD_A12DDR_LD_A11DDR_LD_A10

DDR_LD_A9DDR_LD_A8DDR_LD_A7DDR_LD_A6DDR_LD_A5DDR_LD_A4DDR_LD_A3DDR_LD_A2DDR_LD_A1DDR_LD_A0

DDR_LD_A[13:0]8/D5

DDR_LD_A13

DDRCRES0

DDRSLWCRESDDRDRVCRES

R3E1

NO_POP=TRUE

12

R5E

3

12

R3E

4

PBI_ALE_R 11/A8,12/C8,16/C621R3C6

LD_7

PWRDELAY_NPWRGD/P_RST_N

SPARE0SPARE1SPARE2SPARE3

TCKTDI

TDO

NC34NC35

NC33

TMSTRST_N

VSSPART 7 OF 9

JTAG/MISC

$4I121

Page 5: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

150UFPOLYMER

22UFX5R

22UFX5R

22UFX5R

22UFX5R

22UFX5R

22UFX5R

10UFX5R

GND

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

10UFX5R

10UFX5R

1UFX5R10V

1UFX5R10V

1UFX5R10V

22UFX5R

22UFX5R

GND

22UFX5R

22UFX5R

1%

0.5

1%

0.5

1%

0.5

GND

+1_5V

+1_5V

+1_5V

+1_5V

+1_5V

+1_5V

+1_5V

+1_5V

0.1UF16V

0.1UF16V

0.1UF16V

GND

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V 0.1UF

16V0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V 0.1UF

16V0.1UF16V

GND

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V 0.1UF

16V0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

GND

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V 0.1UF

16V0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V 0.1UF

16V0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

GND

GND

0.1UF16V

+1_5V

+3_3V

+1_35V

2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

GND

+1_35V

+1_5V

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

4.7UH

4.7UH

4.7UH

4.7UH

1%

0.5

22UFX5R

22UFX5R

10UFX5R

GND

10UFX5R

+3_3V

+3_3V

+2_5V+2_5V

22UFX5R

GND

LD_4

VCC13_1VCC13_2VCC13_3VCC13_4VCC13_5VCC13_6VCC13_7

VCC15B_1

VCC15B_10VCC15B_11VCC15B_12VCC15B_13VCC15B_14

VCC15B_2VCC15B_3VCC15B_4VCC15B_5VCC15B_6VCC15B_7VCC15B_8VCC15B_9

VCC15C_1

VCC15C_10VCC15C_11VCC15C_12VCC15C_13VCC15C_14VCC15C_15VCC15C_16VCC15C_17VCC15C_18VCC15C_19

VCC15C_2

VCC15C_20VCC15C_21VCC15C_22VCC15C_23VCC15C_24VCC15C_25VCC15C_26VCC15C_27VCC15C_28VCC15C_29

VCC15C_3

VCC15C_30VCC15C_31VCC15C_32VCC15C_33

VCC15C_4VCC15C_5VCC15C_6VCC15C_7VCC15C_8VCC15C_9

VCC15E_1VCC15E_2VCC15E_3VCC15E_4VCC15E_5VCC15E_6VCC15E_7

VCC15F_1

VCCDDR_1

VCCDDR_10VCCDDR_11VCCDDR_12VCCDDR_13VCCDDR_14VCCDDR_15VCCDDR_16VCCDDR_17VCCDDR_18VCCDDR_19

VCCDDR_2

VCCDDR_20VCCDDR_21VCCDDR_22VCCDDR_23VCCDDR_24VCCDDR_25VCCDDR_26VCCDDR_27VCCDDR_28VCCDDR_29

VCCDDR_3VCCDDR_4VCCDDR_5VCCDDR_6VCCDDR_7VCCDDR_8VCCDDR_9

VCC_PLL1

VCC_PLL2

VSS_L15

VCC_PLL4

VCC_PLL5

VSSA1

VSSA2

VSS_K15

VSSA4

VSSA5

PART 4 OF 9

LD_6

VSS_1

VSS_10

VSS_100VSS_101VSS_102VSS_103VSS_104VSS_105VSS_106VSS_107VSS_108VSS_109

VSS_11

VSS_110VSS_111VSS_112VSS_113

VSS_114VSS_115VSS_116VSS_117VSS_118VSS_119

VSS_12

VSS_120VSS_121VSS_122VSS_123VSS_124VSS_125VSS_126VSS_127VSS_128VSS_129

VSS_13

VSS_130VSS_131VSS_132VSS_133VSS_134VSS_135VSS_136VSS_137VSS_138VSS_139

VSS_14

VSS_140VSS_141VSS_142VSS_143VSS_144VSS_145VSS_146VSS_147VSS_148VSS_149

VSS_15

VSS_150VSS_151VSS_152VSS_153VSS_154VSS_155VSS_156VSS_157VSS_158VSS_159

VSS_16

VSS_160VSS_161

VSS_162VSS_163VSS_164VSS_165VSS_166VSS_167VSS_168VSS_169

VSS_17

VSS_170VSS_171VSS_172VSS_173VSS_174VSS_175VSS_176VSS_177VSS_178VSS_179

VSS_18

VSS_180VSS_181VSS_182VSS_183VSS_184VSS_185VSS_186VSS_187VSS_188VSS_189

VSS_19

VSS_190VSS_191VSS_192VSS_193VSS_194VSS_195VSS_196VSS_197VSS_198VSS_199

VSS_2

VSS_20

VSS_200VSS_201VSS_202VSS_203VSS_204VSS_205VSS_206VSS_207VSS_208VSS_209

VSS_21

VSS_210VSS_211VSS_212VSS_213VSS_214VSS_215VSS_216

VSS_217VSS_218VSS_219

VSS_22

VSS_220

VSS_23VSS_24VSS_25VSS_26VSS_27VSS_28VSS_29

VSS_3

VSS_30VSS_31VSS_32VSS_33VSS_34VSS_35VSS_36VSS_37VSS_38VSS_39

VSS_4

VSS_40VSS_41VSS_42VSS_43VSS_44VSS_45VSS_46VSS_47VSS_48

VSS_5

VSS_50VSS_52VSS_53VSS_54VSS_55VSS_56VSS_57VSS_58VSS_59

VSS_6

VSS_60VSS_61VSS_62VSS_63VSS_64VSS_65VSS_66VSS_67VSS_68VSS_69

VSS_7

VSS_70VSS_71VSS_72VSS_73VSS_74VSS_75VSS_76VSS_77VSS_78VSS_79

VSS_8

VSS_80VSS_81VSS_82VSS_83VSS_84VSS_85VSS_86VSS_87VSS_88VSS_89

VSS_9

VSS_90VSS_91VSS_92VSS_93VSS_94VSS_95VSS_96VSS_97VSS_98VSS_99

PART 6 OF 9

NC_A11NC_A12

NC_A18 NC_A19NC_A20

NC_B12

NC_B17

NC_B18

NC_C11

NC_C12

NC_C14

NC_C16NC_C17

NC_C19

NC_D11

NC_D12

NC_D14NC_D15

NC_D16

NC_D18NC_D19

NC_E12NC_E13

NC_E15

NC_E17

NC_E18

NC_F13NC_F14

NC_F16NC_F17

NC_G14

NC_G16

VCC15_A15

VCC15_H15

VSS_A14

VSS_A16VSS_B15

VSS_G15

PART 9/9

NC

LD_5

VCC33_1

VCC33_10VCC33_11VCC33_12VCC33_13VCC33_14VCC33_15VCC33_16VCC33_17VCC33_18VCC33_19

VCC33_2

VCC33_20VCC33_21VCC33_22VCC33_23VCC33_24VCC33_25VCC33_26VCC33_27VCC33_28VCC33_29

VCC33_3

VCC33_30VCC33_31

VCC33_32VCC33_33VCC33_34VCC33_35VCC33_36VCC33_37VCC33_38VCC33_39

VCC33_4

VCC33_40VCC33_41VCC33_42VCC33_43VCC33_44VCC33_45VCC33_46VCC33_47VCC33_48VCC33_49

VCC33_5VCC33_6

VCC33_7VCC33_8VCC33_9

PART 5 OF 9

C9C6C1D4E9F6F3G10H5J3L5M6M3R6R3U7V3W5

C29C24C21D26F21G23H26J27J24J20J18K21K19K17L25L20M27M21N26N23N20P21R27R24R20

U26U20V24

W20Y26

AA24 U3E3

B15

A14

G14

E18

A18

E17

E12

A11

D14

D16

F13

C11

C17

D19

A19

F16

C12

E15

H15

A15

A16

F14

D12

A12

C14

C16

D18

B18

F17

G15

E13

B12

D11

D15

B17

C19

A20

G16

U3E3

AG3AC6AC5AC3

A27

P5P2

R19R17R13R11

R9T28T25T20T18T16T14T12T10

T7T5T2

U23U19U17U15U13U11

U9U4

V27V20V18

AB25AB18AB16AB14AB12AB10

AB8AB5AB2

AC23AC17AC11AC7AC4

AD27AD21AD15AD9AD3

AE28AE25AE22AE19AE16AE14AE11

AE8AE5AE2AF7

AG29AG24AG21AG18AG15AG12

AG9AG6AG1

AH28AH25AH22AH19AH14AH8AH5AH2

AJ27

A17A10A3B28B25B22B20B19B16B14B13B11B8

C15D29D23D20D17D13D10D7E25E22E19E11E10E8E5E2F27F24F18F15F12F10F9F8G28G26G20G17G13G8G7

H28H27H25H16H14

J21J19J17J15J13J11J9J6K26K23K20K18K16K14K12K7K4L28L21L19L17L16L14L13L11L9L2M24M20M16M14M10N21N19N17N15N13N11

N7N4P28P25P20P18P16P12P10

V16V14V12V10V6

W28W25W19W17W15W13W11

W9W2Y23Y20Y18Y16Y14Y12Y10

Y7Y4Y3

AA27AA19AA17AA15AA13AA11

AA9AA6AA3

B5B2

G4H29

N9

H2

AC2

U3E3

V11

A13

L18L12M17M15M13N18N16N14N12P19P17P15P11R18R14R12T19T17T15T13T11U18U16U14V19V17V15W18W16W14Y19Y17

AA20AA18AA16AA14AA12AA10

AB7AB19AB17AB15AB13AB11

AB9AC20AC10AD24AD19AD12AD6

AF26AF22AF20AF17AF13AF10

AF4AH16AH11

AJ3

U12V13

W12W10Y13Y11

Y9

P14

R16

K15

M12

M18

P13

R15

L15

M11

M19

C18C13E16E14J16J14

J10K13K11K10K9L10

P9R10T9U10V9

J12

N10M9

Y15

U3E3

C5D5

C4E1 C5D8

C7N6

C7P1

VCC_PLL5_L

VCC_PLL4_L

VCC_PLL2_L

VCC_PLL1_L

R6R3

1 2

1 2

VCC_PLL4

1 2

1 2

VSSA1

VSSA4

VSSA2

VSSA5

5 1780331 POWER/GROUNDSTORAGE COMPONENTS DIVISION 80331 CRB 12-5-2003_8:37

C4C9

C5R2C6R2C5P3C5R3C5R1C5E4 C5E5 C6E2 C5E3 C5D9

C7N7C3E4C7N3C6N5C8N1C8P2 C4E4 C6N4 C7N2 C8P1

C4C8C2C2C2D3C6R7C6N6C3C8 C6N3 C7R1 C8N2 C8R1

C4D10C5D6C6P7 C5P2 C6P9 C4D9

C6N2C7N4C4C5C4D2C4C6C6P2 C6P4 C6P1 C4D6 C4D1

C2D2C3E1

C2E1

C3C3C3C5C7N1

R6R2

R7N1

R7P1

C6R4

C6R3

VCC_PLL1

VCC_PLL2

VCC_PLL5

C4D5 C3C2

C6R1 C7N8 C4E2 C2D4 C3E2

C3E3C2D8C2D5 C3D1

C4D7

C2D7 C4D3

C4C3C3C6

C2C1

C3B1

2

1 C2E2

Page 6: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

22UFTANT

X7RCC0603

.01UF

X7RCC0603

.01UF

10UFX5R

10UFX5R

10UFX5R

10UFX5R

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

GND

0.1UF16V

NC

NC

+3_3V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

GND

0.1UF16V

0.1UF16V

GND

0.1UF16V

+5V

0.1UF16V

+3_3V +3_3V

GNDGND

-12V

+5V

+12V

+5V

+3_3V +3_3V

GND

NC

NC

NC

NC

NC

NC

NC

NC

NC

2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

GND

+12V

+12V

+3.3V1

+3.3V10

+3.3V11

+3.3V12

+3.3V2

+3.3V3

+3.3V4

+3.3V5

+3.3V6

+3.3V7

+3.3V8

+3.3V9

+3.3VAUX

+3.3VIO1

+3.3VIO2

+3.3VIO3

+3.3VIO4

+3.3VIO5

+5V1

+5V2

+5V3

+5V4

+5V5

+5V6

+5V7

+5V8

-12V

ACK64_N

AD00AD01

AD02

AD03

AD04AD05

AD06

AD07

AD08

AD09

AD10

AD11AD12

AD13

AD14

AD15

AD16AD17

AD18

AD19

AD20AD21

AD22

AD23

AD24

AD25

AD26AD27

AD28

AD29

AD30AD31

CBE0_N

CBE1_N

CBE2_N

CBE3_N

CLK

DEVSEL_N

FRAME_N

GND1

GND10

M66EN

GND12

GND13

GND14

GND15

GND16

GND17

GND18

GND19

GND2

GND20

GND21

GND22

GND3

GND4

GND5

GND6

GND7

GND8

GNT_N

IDSEL

INTA_N

INTB_N INTC_N

INTD_N

IRDY_N

LOCK_N

PAR

PCIXCAP

PERR_N

PME_N

PRSNT1_N

PRSNT2_N

REQ64_N

REQ_N

RST_N

RSVD1

RSVD2

RSVD3

RSVD4

RSVD5

RSVD6

SERR_N

STOP_N

TCK

TDITDO

TMS

TRDY_N

TRST_N

PART 1 of 2PCI - EDGE CONNECTOR

Key

ContinuedKey

+3.3VIO10

+3.3VIO11

+3.3VIO6

+3.3VIO7

+3.3VIO8

+3.3VIO9

AD32

AD33

AD34AD35

AD36

AD37

AD38AD39

AD40

AD41

AD42AD43

AD44

AD45

AD46AD47

AD48

AD49

AD50AD51

AD52

AD53

AD54AD55

AD56

AD57

AD58AD59

AD60

AD61

AD62AD63

CBE4_N

CBE5_NCBE6_N

CBE7_NGND23

GND24

GND25

GND26

GND27

GND28

GND29

GND30

GND31

GND32

GND33

GND34

GND35

GND36

GND37

GND38

PAR64

RSVD10

RSVD11

RSVD7

RSVD8

RSVD9

PCI - EDGE CONNECTOR

Key Continued

PART 2 of 2

0.1UF16V

0.1UF16V0.1UF

16V

GNDNC

NC

NC

NC

-12V

GND

22UFTANT

Route 3_3V_AUX as a 30 mil trace

C2E9

PCI_PME_N 7/C5

3_3V_AUX 7/C5

C2E7 C8R2C5E9

A75

A84

B70

B79

B88

A66

A91

B90

A89B89

A88

B87

A86B86

A85

B84

A83B83

A82

B81

A80B80

A79

B78

A77B77

A76

B75

A74B74

A73

B72

A71B71

A70

B69

A68B68

B66

A65B65

A64B64

B67

B73

B76

B82

B85

B91

B94

A63

A69

A72

A78

A81

A87

A90

A93

A67

A92

A94

B63

B92

B93

J1E3

A2

B25

A39

A45

A53

B31

B36

B41

B43

B54

A21

A27

A33

A14

B19

B59

A10

A16

A59

B5

B6

B61

B62

A5

A8

A61

A62

B1

B60

A58B58

A57

B56

A55B55

A54

B53

B52

A49

B48

A47B47

A46

B45

A44

A32B32

A31

B30

A29B29

A28

B27

A25

B24

A23B23

A22

B21

A20B20

A52

B44

B33

B26

B16

B37

A34

B3

B46

B49

B57

A50

A51

A18

A24

A30

A35

A37

B50

A42

A48

A56

B51

B15

B17

B22

B28

B34

A17

A26

A6

B7 A7

B8

B35

B39

A43

B38

B40

A19

B9

B11

A60

B18

A15

B10

B14

A9

A11

A40

A41

B42

A38

B2

A4B4

A3

A36

A1

J1E3

P_AD31

P_AD29

P_AD1

3/C2P_AD[63:0]

P_AD0

P_AD2

P_AD4

P_AD6

P_AD9

P_AD11

P_AD13

P_AD15

P_AD16

P_AD18

P_AD20

P_AD22

P_AD24

P_AD26

P_AD28

P_AD30

P_AD37

P_AD39

P_AD41

P_AD43

P_AD45

P_AD47

P_AD49

P_AD51

P_AD53

P_AD55

P_AD57

P_AD59

P_AD61

P_AD63

P_AD35

P_AD33

P_AD32

P_AD34

P_AD36

P_AD40

P_AD42

P_AD44

P_AD46

P_AD62

P_AD60

P_AD58

P_AD56

P_AD54

P_AD52

P_AD50

P_AD48

P_AD38

P_AD3

P_AD5

P_AD7

P_AD8

P_AD10

P_AD12

P_AD14

P_AD17

P_AD19

P_AD21

P_AD23

P_AD25

P_AD27

P_PCIXCAP

6 17PRIMARY PCI BUS - EDGE CONNECTORSTORAGE COMPONENTS DIVISION 80331 CRB 12-5-2003_8:37

C6R6C4E7 C8R4C2E8

C5R5C3E5C5R4 C4E3 C5E8C6R5

P_IDSEL 3/B1

P_RST_N 4/B8

P_GNT_N 3/B2

P_M66EN3/B2

3/A1 P_CLK

P_C/BE1_N

P_C/BE2_N

P_C/BE3_N

P_C/BE5_N

P_C/BE7_N

P_C/BE0_N

P_C/BE4_N

P_C/BE6_N

P_C/BE[7:0]_N3/C2

P_PAR64 3/B2

P_REQ_N3/B2

P_LOCK_N3/B2

P_INTC_N 3/B2

P_INTA_N 3/B2

P_TRDY_N 3/B2

P_INTD_N3/B2

P_PAR 3/C2

P_ACK64_N3/B2

P_SERR_N3/B2

P_PERR_N3/B2

P_DEVSEL_N3/B2

P_IRDY_N3/B2

P_FRAME_N 3/B2

P_STOP_N 3/C2

P_REQ64_N 3/B2

C3E6

C4E5 C8R3 C7R3C6R8

C4E6C2E5

C5E7 C2E3

C8R5 C8R6

P_INTB_N3/B2

C2E6

Page 7: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

5%15

00

22UFTANT

22UFTANT

GND

0.1UF16V

5%43

00

5%43

00

5%43

00

5%43

00

GND

0.1UF16V

0.1UF16V

GND

X7RCC0603

.01UF X7RCC0603

.01UF

10UFX5R

10UFX5R

10UFX5R

10UFX5R

+3_3VPCI

+3_3VPCI

GND

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

GND

0.1UF16V

0.1UF16V

GND

0.1UF16V

0.1UF16V

GNDGND

-12V

GND

GND

GND

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

+5VPCI

+3_3VPCI

+5VPCI

+12VPCI

+5VPCI

+3_3VPCI

+12V

+3.3V1

+3.3V10

+3.3V11

+3.3V12

+3.3V2

+3.3V3

+3.3V4

+3.3V5

+3.3V6

+3.3V7

+3.3V8

+3.3V9

+3.3VAUX

+3.3VIO1

+3.3VIO2

+3.3VIO3

+3.3VIO4

+3.3VIO5

+5V1

+5V2

+5V3

+5V4

+5V5

+5V6

+5V7

+5V8

-12V

ACK64_N

AD00AD01

AD02

AD03

AD04AD05

AD06

AD07

AD08

AD09

AD10

AD11AD12

AD13

AD14

AD15

AD16AD17

AD18

AD19

AD20AD21

AD22

AD23

AD24

AD25

AD26AD27

AD28

AD29

AD30AD31

CBE0_N

CBE1_N

CBE2_N

CBE3_N

CLK

DEVSEL_N

FRAME_N

GND1

GND10

M66EN

GND12

GND13

GND14

GND15

GND16

GND17

GND18

GND19

GND2

GND20

GND21

GND22

GND3

GND4

GND5

GND6

GND7

GND8

GNT_N

IDSEL

INTA_N

INTB_N INTC_N

INTD_N

IRDY_N

LOCK_N

PAR

PCIXCAP

PERR_N

PME_N

PRSNT1_N

PRSNT2_N

REQ64_N

REQ_N

RST_N

RSVD1

RSVD2

RSVD3

RSVD4

RSVD5

RSVD6

SERR_N

STOP_N

TCK

TDITDO

TMS

TRDY_N

TRST_N

PART 1 of 2

Key

ContinuedKeyPCI - 64B CONNECTOR

+3.3VIO10

+3.3VIO11

+3.3VIO6

+3.3VIO7

+3.3VIO8

+3.3VIO9

AD32

AD33

AD34AD35

AD36

AD37

AD38AD39

AD40

AD41

AD42AD43

AD44

AD45

AD46AD47

AD48

AD49

AD50AD51

AD52

AD53

AD54AD55

AD56

AD57

AD58AD59

AD60

AD61

AD62AD63

CBE4_N

CBE5_NCBE6_N

CBE7_NGND23

GND24

GND25

GND26

GND27

GND28

GND29

GND30

GND31

GND32

GND33

GND34

GND35

GND36

GND37

GND38

PAR64

RSVD10

RSVD11

RSVD7

RSVD8

RSVD9

Key Continued

PART 2 of 2PCI - 64B CONNECTOR

+3_3VPCI

+3_3VPCI

0.1UF16V

GND

+3_3V

+3_3V

NC

+12VPCI

1%20

0

GND

-12V

33C

R12

065%

1

2

R3A

2

3/B7,13/B8 S_INTA_N3/B7,13/B8 S_INTC_N 3/A7,13/B8S_INTD_N

3/B7,13/B8S_INTB_N

12

R3A

1

6/C5PCI_PME_N

3_3V_AUX 6/C5

C6L1

S_CLKO_SLOT3/A6

A75

A84

B70

B79

B88

A66

A91

B90

A89B89

A88

B87

A86B86

A85

B84

A83B83

A82

B81

A80B80

A79

B78

A77B77

A76

B75

A74B74

A73

B72

A71B71

A70

B69

A68B68

B66

A65B65

A64B64

B67

B73

B76

B82

B85

B91

B94

A63

A69

A72

A78

A81

A87

A90

A93

A67

A92

A94

B63

B92

B93

J2A1

A2

B25

A39

A45

A53

B31

B36

B41

B43

B54

A21

A27

A33

A14

B19

B59

A10

A16

A59

B5

B6

B61

B62

A5

A8

A61

A62

B1

B60

A58B58

A57

B56

A55B55

A54

B53

B52

A49

B48

A47B47

A46

B45

A44

A32B32

A31

B30

A29B29

A28

B27

A25

B24

A23B23

A22

B21

A20B20

A52

B44

B33

B26

B16

B37

A34

B3

B46

B49

B57

A50

A51

A18

A24

A30

A35

A37

B50

A42

A48

A56

B51

B15

B17

B22

B28

B34

A17

A26

A6

B7 A7

B8

B35

B39

A43

B38

B40

A19

B9

B11

A60

B18

A15

B10

B14

A9

A11

A40

A41

B42

A38

B2

A4B4

A3

A36

A1

J2A1

S_AD29

S_AD31

S_AD1

3/C5S_AD[63:0]

S_AD0

S_AD2

S_AD4

S_AD6

S_AD9

S_AD11

S_AD13

S_AD15

S_AD16

S_AD18

S_AD20

S_AD22

S_AD24

S_AD26

S_AD28

S_AD30

S_AD33

S_AD37

S_AD39

S_AD41

S_AD43

S_AD45

S_AD47

S_AD49

S_AD51

S_AD53

S_AD55

S_AD57

S_AD59

S_AD61

S_AD63

S_AD35

S_AD32

S_AD34

S_AD36

S_AD40

S_AD42

S_AD44

S_AD46

S_AD62

S_AD60

S_AD58

S_AD56

S_AD54

S_AD52

S_AD50

S_AD48

S_AD38

S_AD3

S_AD5

S_AD7

S_AD8

S_AD10

S_AD12

S_AD14

S_AD17

S_AD19

S_AD21

S_AD23

S_AD25

S_AD27

S_AD17

3/B8S_RST_N

7 17SECONDARY PCI-X BUSSTORAGE COMPONENTS DIVISION 80331 CRB 12-5-2003_8:37

C8L1C4A3 C4A2C2A4

C5L1 C7L3C6L2 C5L2 C8L3 C8L2C7L2

S_SLOT_IDSEL

3/B6 S_IRDY_N

S_C/BE1_N

S_C/BE2_N

S_C/BE3_N

S_C/BE5_N

S_C/BE7_N

S_C/BE0_N

S_C/BE4_N

S_C/BE6_N

3/C8S_C/BE[7:0]_N

S0_TCK

S0_TDI

S0_TMS

S0_TRST_N

3/B8S_PAR64

3/B7S_GNT0_N

3/B6 S_REQ0_N

3/B6 S_LOCK_N

3/C6S_TRDY_N

3/C8S_PAR

3/B7 S_ACK64_N

3/B6 S_SERR_N

3/B6 S_PERR_N

3/B6 S_DEVSEL_N

3/B6S_FRAME_N

3/C6S_STOP_N

3/B7S_REQ64_N

C2A1 C4A1

C2A5 C5A1

C8L4C9L1

C2A2 C2A3

12

R2A

2

12

R8L

1

12

R2A

3

12

R2A

1

C7L1

3/B8 S_PCIXCAP

3/B8 S_M66EN

C2A6

C2A8

12

R7L

1

Page 8: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%225%225%225%225%225%

225%

225%

225%225%225%225%225%225%225%

225%225%225%225%225%225%225%225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

225%

2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

225%225%

225%225%

225%

Place DDR Addr/CMD Series Resistors 0.25 to 0.5 inches of DIMM connector

Place DDR Clock Series Resistors within 0.5 inches of 80331

DDR_DM[8:0]9/D7,10/D5

DDR_DM5

DDR_DM0

DDR_DM1

DDR_DM2

DDR_DM3

DDR_DM4

DDR_DM7

DDR_DM8

DDR_DM6

R5C28

DDR_CB[7:0]9/C7,9/C4,10/A5

DDR_CB7

DDR_CB5

DDR_CB4

DDR_CB3

DDR_CB2

DDR_CB1

DDR_CB0

DDR_CB6

DDR_LD_CB0

DDR_LD_CB6

DDR_LD_CB7

DDR_LD_CB[7:0]4/A1

DDR_LD_CB5

DDR_LD_CB4

DDR_LD_CB3

DDR_LD_CB2

DDR_LD_CB1

DDR_LD_DM8

DDR_LD_DM[8:0]4/C2

DDR_LD_DM0

DDR_LD_DM1

DDR_LD_DM2

DDR_LD_DM3

DDR_LD_DM4

DDR_LD_DM5

DDR_LD_DM6

DDR_LD_DM7

DDR_LD_DQS0

DDR_LD_DQS7

DDR_LD_DQS8

DDR_LD_DQS[8:0]4/D1

DDR_LD_DQS6

DDR_LD_DQS5

DDR_LD_DQS4

DDR_LD_DQS3

DDR_LD_DQS2

DDR_LD_DQS1

DDR_DQS[8:0]9/D4,10/B5

DDR_DQS8

DDR_DQS6

DDR_DQS5

DDR_DQS4

DDR_DQS3

DDR_DQS2

DDR_DQS1

DDR_DQS0

DDR_DQS7

DDR_LD_DQ6

DDR_LD_DQ7

DDR_LD_DQ8

DDR_LD_DQ9

DDR_LD_DQ10

DDR_LD_DQ11

DDR_LD_DQ12

DDR_LD_DQ13

DDR_LD_DQ14

DDR_LD_DQ15

DDR_LD_DQ16

DDR_LD_DQ17

DDR_LD_DQ18

DDR_LD_DQ19

DDR_LD_DQ20

DDR_LD_DQ21

DDR_LD_DQ22

DDR_LD_DQ23

DDR_LD_DQ24

DDR_LD_DQ25

DDR_LD_DQ26

DDR_LD_DQ27

DDR_LD_DQ28

DDR_LD_DQ29

DDR_LD_DQ30

DDR_LD_DQ31

DDR_LD_DQ32

DDR_LD_DQ33

DDR_LD_DQ34

DDR_LD_DQ35

DDR_LD_DQ36

DDR_LD_DQ37

DDR_LD_DQ38

DDR_LD_DQ39

DDR_LD_DQ40

DDR_LD_DQ41

DDR_LD_DQ42

DDR_LD_DQ43

DDR_LD_DQ44

DDR_LD_DQ45

DDR_LD_DQ46

DDR_LD_DQ47

DDR_LD_DQ48

DDR_LD_DQ49

DDR_LD_DQ50

DDR_LD_DQ51

DDR_LD_DQ52

DDR_LD_DQ53

DDR_LD_DQ54

DDR_LD_DQ55

DDR_LD_DQ56

DDR_LD_DQ57

DDR_LD_DQ58

DDR_LD_DQ59

DDR_LD_DQ60

DDR_LD_DQ61

DDR_LD_DQ[63:0]4/C1

DDR_LD_DQ63

DDR_LD_DQ62

DDR_LD_DQ0

DDR_LD_DQ1

DDR_LD_DQ2

DDR_LD_DQ3

DDR_LD_DQ4

DDR_LD_DQ5

DDR_DQ62

DDR_DQ[63:0]9/D6,9/D4,10/D8

DDR_DQ63

DDR_DQ0

DDR_DQ1

DDR_DQ2

DDR_DQ3

DDR_DQ4

DDR_DQ5

DDR_DQ6

DDR_DQ7

DDR_DQ8

DDR_DQ9

DDR_DQ10

DDR_DQ11

DDR_DQ12

DDR_DQ13

DDR_DQ14

DDR_DQ15

DDR_DQ16

DDR_DQ17

DDR_DQ18

DDR_DQ19

DDR_DQ20

DDR_DQ21

DDR_DQ22

DDR_DQ23

DDR_DQ24

DDR_DQ25

DDR_DQ26

DDR_DQ27

DDR_DQ28

DDR_DQ29

DDR_DQ30

DDR_DQ31

DDR_DQ32

DDR_DQ33

DDR_DQ34

DDR_DQ35

DDR_DQ36

DDR_DQ37

DDR_DQ38

DDR_DQ39

DDR_DQ40

DDR_DQ41

DDR_DQ42

DDR_DQ43

DDR_DQ44

DDR_DQ45

DDR_DQ46

DDR_DQ47

DDR_DQ48

DDR_DQ49

DDR_DQ50

DDR_DQ51

DDR_DQ52

DDR_DQ53

DDR_DQ54

DDR_DQ55

DDR_DQ56

DDR_DQ57

DDR_DQ58

DDR_DQ59

DDR_DQ60

DDR_DQ61

R6C14

R6C11

R4C10

R4C9

DDR_CK04/A1

8 17DDR333 SERIES TERMINATIONSTORAGE COMPONENTS DIVISION 80331 CRB 12-5-2003_8:37

4/C2 DDR_LD_CKE1

DDR_BA0 9/C3,10/C3

DDR_WE_N 9/C3,10/C3

DDR_RAS_N 9/C7,10/C3

DDR_CAS_N 9/C3,10/C3

4/D2 DDR_LD_CKE0

DDR_LD_CS1_N4/D2

DDR_LD_BA14/C1

DDR_LD_WE_N4/D2

DDR_LD_CAS_N4/D2

DDR_LD_CS0_N4/D2

DDR_LD_BA04/C1

DDR_LD_RAS_N4/D2

9/B7,10/B3DDR_CKE1

9/B4,10/B3DDR_CKE0

DDR_CS1_N 9/C6,10/C3

DDR_CS0_N 9/C7,10/C3

DDR_BA1 9/C3,10/C3

DDR_A[13:0]9/C7,9/C4,10/C5

DDR_A1

DDR_A0

DDR_A2

DDR_A3

DDR_A4

DDR_A5

DDR_A6

DDR_A7

DDR_A8

DDR_A9

DDR_A10

DDR_A11

DDR_A12

DDR_A13

DDR_LD_A2

DDR_LD_A1

DDR_LD_A0

DDR_LD_A13

DDR_LD_A[13:0]4/C1

DDR_LD_A12

DDR_LD_A11

DDR_LD_A10

DDR_LD_A9

DDR_LD_A8

DDR_LD_A7

DDR_LD_A6

DDR_LD_A5

DDR_LD_A4

DDR_LD_A3

DDR_333_CK0 9/C7

DDR_333_CK0_N 9/C6DDR_CK0_N4/A1

4/A1 DDR_CK1_N

4/A1 DDR_CK1

9/C4DDR_333_CK1_N

9/C3DDR_333_CK1

4/A1 DDR_CK2_N

4/A1 DDR_CK2

9/B3DDR_333_CK2_N

9/B4DDR_333_CK2

R4C4

R4C3

R4C12

R4C11

R4C6

R4C5

R4C21

R4C19

R4C13

R4C14

R5C1

R4C20

R4C17

R4C15

R5C5

R5C7

R5C13

R5C12

R5C2

R5C3

R5C10

R5C11

R5C16

R5C17

R5C22

R5C23

R5C14

R5C15

R5C21

R5C20

R6C9

R6C8

R6C17

R6C18

R6C10

R6C15

R6C22

R6C24

R7C2

R7C3

R6C19

R6C20

R6C30

R6C31

R7C7

R7C6

R7C13

R7C14

R7C5

R7C4

R7C9

R7C12

R7C18

R7C17

R7C21

R7C22

R7C15

R7C16

R7C23

R7C24

R7C20

R7C11

R6C29

R6C12

R5C18

R5C6

R4C16

R4C8

R7C19

R7C10

R6C28

R6C13

R5C19

R5C9

R4C18

R5C29

R4C7

R6C4

R6C3

R5C25

R5C24

R6C5

R6C7

R5C26

R5C27

R7C8

R6C1

R5C38

R5C4

R5C8

R6C2

R5C31

R5C33

R5C32

R5C35

R5C34

R5C36

R5C37

R5C39

R6C26

R4C22

R6C21

R5C30

R6C27

R6C25

R6C6

R6C16

R6C23

R4C26

R4C25

R4C27

R4C28

R4C23

R4C24

Page 9: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

PNP_MMBT3906

GND

GND

PNP_MMBT3906

+2_5V

10UFX5R

10UFX5R

10UFX5R

0

100

0.1UF16V

0.1UF16V0

GND GND

0.1UF16V

100

+2_5V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

GND

0.1UF16V

0.1UF16V

0.1UF16V

NC

+3_3V

NC

NC

NC

NCNC

NC

NC

NC

NC

GNDGND

2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

+2_5V

DQ0VSS_1

DQ1DQS0

DQ2VDD_1

DQ3NC_9

NC_10VSS_2

DQ8DQ9

DQS1VDDQ_1

CK1

VSS_3DQ10DQ11CKE0

VDDQ_2DQ16DQ17DQS2

VSS_4A9

DQ18A7

VDDQ_3DQ19

A5DQ24

VSS_5DQ25DQS3

A4VDD_2

DQ26DQ27

A2VSS_6

A1CB0CB1

VDD_3DQS8

A0CB2

VSS_7CB3BA1

DQ32VDDQ_4

DQ33DQS4DQ34

VSS_8BA0

DQ35DQ40

VDDQ_5

DQ41

VSS_9DQS5DQ42DQ43

VDD_4NC_71DQ48DQ49

VSS_10

VDDQ_6DQS6DQ50DQ51

VSS_11VDDID

DQ56DQ57

VDD_5DQS7DQ58DQ59

VSS_12NC_90

SDA

VSS_13DQ4DQ5VDDQ_7DM0DQ6DQ7VSS_14NC_101TESTNC_103VDDQ_8DQ12DQ13DM1VDD_6DQ14DQ15CKE1VDDQ_9BA2DQ20A12VSS_15DQ21A11DM2VDD_7DQ22A8DQ23VSS_16A6DQ28DQ29VDDQ_10DM3A3DQ30VSS_17DQ31CB4CB5VDDQ_11CK0CK0_NVSS_18DM8A10CB6VDDQ_12CB7

VSS_19DQ36DQ37VDD_8DM4DQ38DQ39VSS_20DQ44

DQ45VDDQ_13

DM5VSS_21DQ46DQ47NC_163VDDQ_14DQ52DQ53A13VDD_9DM6DQ54DQ55VDDQ_15NC_173DQ60DQ61VSS_22DM7DQ62DQ63VDDQ_16SA0SA1SA2VDDSPD

CK2

SCL

VREF

CK2_N

WE_N

CAS_N

CK1_N

RAS_N

S0_NS1_N

KEY

DIM

M 1

84pi

n

+2_5V

GND;474LVC2G32

GND;474LVC2G32

GND;474LVC2G08

GND;474LVC2G08

DDR_CKE0

DDR_CKE0 8/B3,10/B3

4/B8,9/A8,15/B3 PWR_OK

4/B8,9/D2,15/B3 PWR_OK

DDR_DQ27

DDR_DQ61

DDR_DQ50

DDR_DQ37

DDR_DQ0

DDR_DQ62

DDR_DQ57

DDR_DQ35

DDR_DQ11

DDR_DQ8

8/D7,9/D6,10/D8DDR_DQ[63:0]

DDR_DQ4

DDR_DQ7DDR_DQ2

DDR_DQ12

DDR_DQ10

DDR_DQ16DDR_DQ17

DDR_DQ22

DDR_DQ19DDR_DQ28

DDR_DQ25

DDR_DQ30

DDR_DQ33

DDR_DQ39

DDR_DQ45

DDR_DQ41

DDR_DQ47DDR_DQ42

DDR_DQ51

DDR_DQ52DDR_DQ53

DDR_DQ59

DDR_DM2

DDR_DM0

DDR_DM6

8/C5,10/D5 DDR_DM[8:0]

DDR_DM7

DDR_DM5

DDR_DM4

DDR_DM8

DDR_DM3

DDR_DM1

CKE0_LATCH

DDR_CB6

DDR_CB4

8/B5,9/C7,10/A5DDR_CB[7:0]

DDR_CB7

DDR_CB1

DDR_A7

DDR_A0

8/D3,9/C7,10/C5DDR_A[13:0]

DDR_A9

DDR_A5

DDR_A4

DDR_A2

DDR_A1

DDR_DQS7

DDR_DQS8

DDR_DQS0

DDR_DQS2

DDR_DQS1

8/D5,10/B5DDR_DQS[8:0]

DDR_DQS6

DDR_DQS5

DDR_DQS4

DDR_DQS3

DDR_A10

DDR_A13

DDR_A11

DDR_A12

DDR_A3

8/D3,9/C4,10/C5DDR_A[13:0]

DDR_A6

DDR_A8

DDR_CB0

DDR_CB5

8/B5,9/C4,10/A5DDR_CB[7:0]

DDR_CB2DDR_CB3

8/B3,10/C3 DDR_RAS_N

DDR_DQ1

DDR_DQ54DDR_DQ55

DDR_DQ14DDR_DQ15

DDR_DQ18

DDR_DQ26

DDR_DQ32

DDR_DQ56DDR_DQ60

DDR_DQ63DDR_DQ58

DDR_DQ48DDR_DQ49

DDR_DQ43

DDR_DQ46

DDR_DQ40

DDR_DQ44

DDR_DQ34DDR_DQ38

DDR_DQ36

DDR_DQ31

DDR_DQ24DDR_DQ29

DDR_DQ23

DDR_DQ21DDR_DQ20

8/D7,9/D4,10/D8DDR_DQ[63:0]

DDR_DQ5

DDR_DQ6DDR_DQ3

DDR_DQ13DDR_DQ9

8/B3,10/C3DDR_BA1

8/C3,10/C3DDR_CAS_N

DDR_CKE18/B3,10/B3

6

53

U4C1

+2_5V;8

2

17

U4C1

+2_5V;8

6

53

U5C1

+2_5V;8

2

17

U5C1

+2_5V;8

CKE0_LATCH_FB

CKE1_LATCH_FB

CKE1_LATCH

DDR_M_RST_N 4/D1

2345678910111213141516

1819202122232425262728293031323334353637383940414243444546474849505152

53545556575859606162

64

666768697071727374

777879808182838485868788899091

93949596979899

100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144

145146147148149150151152153

155156

159160161162163164165166167168169170171172173174175176177178179180181182183184

76

92

1

75

63

65

17

154

157158

J4C1

DDR_VREF4/B3,14/A7

9 17DDR333 DIMM CONNECTORSTORAGE COMPONENTS DIVISION 80331 CRB 12-5-2003_8:37

C6B3 C6N1C7C2 C4N1 C4B4 C7B6 C3N1

4/D5,13/D3DDR_I2C_SCL

4/D5,13/D3DDR_I2C_SDA

8/B3,10/C3DDR_WE_N

8/B3,10/C3 DDR_CS1_N

8/B3,10/C3 DDR_CS0_N

8/C1 DDR_333_CK0

8/C1 DDR_333_CK0_N

8/C1DDR_333_CK2

8/C1DDR_333_CK2_N

8/B3,10/C3DDR_BA0

8/C1DDR_333_CK1_N

8/C1DDR_333_CK1

12

R3C

2

C4C2

R4C1C3C1

C4C1

21

R3C

1

R4C2

NO_POP=TRUE

DDR_333_VREF

C7C1C6C1 C4C4

1

2

3

Q4C1

1

2

3

Q5C1

Page 10: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

1%

49.9

1%

49.91%

49.91%

49.91%

49.91%

49.91%

49.91%

49.91%

49.91%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.91%

49.91%

49.91%

49.91%

49.91%

49.91%

49.91%

49.91%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

GND

DDR_VTT

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

DDR_VTT

GND

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

GND

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

DDR_VTT

GND

GND

DDR_VTT

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

DDR_VTT

0.1UF16V

0.1UF16V

DDR_VTT

DDR_VTT

DDR_VTT

2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9

1%

49.9 R4B17

R4B13

R4B10DDR_DQ55

DDR_DQ62

DDR_DQ63

DDR_DQ[63:0]8/D7,9/D6,9/D4

DDR_DQ0

DDR_DQ1

DDR_DQ2

DDR_DQ3

DDR_DQ4

DDR_DQ5

DDR_DQ6

DDR_DQ7

DDR_DQ8

DDR_DQ9

DDR_DQ10

DDR_DQ11

DDR_DQ12DDR_DQ13

DDR_DQ14

DDR_DQ15

DDR_DQ16

DDR_DQ17

DDR_DQ18

DDR_DQ19

DDR_DQ20

DDR_DQ21

DDR_DQ22

DDR_DQ23

DDR_DQ24

DDR_DQ25

DDR_DQ26

DDR_DQ27

DDR_DQ28

DDR_DQ29

DDR_DQ30

DDR_DQ31

DDR_DQ32

DDR_DQ33

DDR_DQ34

DDR_DQ35

DDR_DQ36

DDR_DQ37

DDR_DQ38

DDR_DQ39

DDR_DQ40

DDR_DQ41

DDR_DQ42

DDR_DQ43

DDR_DQ44

DDR_DQ45

DDR_DQ46

DDR_DQ47

DDR_DQ48

DDR_DQ49

DDR_DQ50

DDR_DQ51

DDR_DQ52DDR_DQ53

DDR_DQ54

DDR_DQ56

DDR_DQ57

DDR_DQ58

DDR_DQ59

DDR_DQ60

DDR_DQ61

R4B4

R4B7

R5B3

R6B11

10 17DDR333 TERMINATIONSTORAGE COMPONENTS DIVISION 80331 CRB 12-5-2003_8:37

C7B10C7B11 C7B5 C7B4 C4B2 C7B9 C7B7

C5B10C5B6C5B11C6B5C6B10C7B2 C6B2

C4B10C4B5C4B9C7B8C5B7C4B3 C6B4

C7B3C6B9C6B6C6B7C4B6C4B11 C6B8

C5B4C5B9 C5B5 C5B8 C4B1 C4B7 C4B8

DDR_DM[8:0]8/C5,9/D7

DDR_DM8

DDR_DM7

DDR_DM6

DDR_DM5

DDR_DM4

DDR_DM3

DDR_DM2

DDR_DM1

DDR_DM0

DDR_BA08/B3,9/C3

DDR_CS1_N8/B3,9/C6

DDR_CKE08/B3,9/B4

DDR_WE_N8/B3,9/C3

DDR_RAS_N8/B3,9/C7

DDR_CB6

DDR_CB7

DDR_CB[7:0]8/B5,9/C7,9/C4

DDR_CB0

DDR_CB1

DDR_CB2

DDR_CB3

DDR_CB4

DDR_CB5

DDR_DQS7

DDR_DQS8

8/D5,9/D4DDR_DQS[8:0]

DDR_DQS1

DDR_DQS0

DDR_DQS2

DDR_DQS3

DDR_DQS4

DDR_DQS5

DDR_DQS6

DDR_CKE18/B3,9/B7

DDR_CS0_N8/B3,9/C7

DDR_BA18/B3,9/C3

8/C3,9/C3 DDR_CAS_N

DDR_A12

DDR_A13

DDR_A[13:0]8/D3,9/C7,9/C4

DDR_A1

DDR_A0

DDR_A2

DDR_A3

DDR_A4

DDR_A5

DDR_A6

DDR_A7

DDR_A8

DDR_A9

DDR_A10

DDR_A11

R4B15

R4B11

R4B22

R6B16

R6B15

R6B23

R6B28

R6B31

R6B13

R6B20

R5B33

R7B3

R5B5

R6B4

R5B22

R5B8

R5B24

R5B10

R5B26

R5B30

R5B14

R5B34

R6B36

R6B19

R6B32

R6B10

R6B8

R6B29

R6B24

R5B15

R5B11

R5B16

R5B12

R5B7

R5B19

R5B9

R5B4

R4B6

R4B20

R4B18

R7B11

R7B7

R7B10

R7B18

R7B5

R7B13

R7B6

R7B2

R6B35

R6B30

R6B18

R6B14

R6B27

R6B25

R6B7

R5B31

R7B21

R7B17

R7B20

R7B8

R7B15

R7B12

R7B16

R7B1

R6B12

R5B27

R5B32

R5B28

R5B23

R5B25

R5B20

R4B9

R4B2

R4B5

R4B16

R4B1

R4B12

R4B21

R5B2

R7B19

R7B14

R6B34

R6B26

R5B29

R5B21

R4B19

R4B14

R5B37

R6B5

R6B21

R5B18

R5B17

R6B22

R6B6

R5B36

R5B35

R6B3

R4B3

R4B8

R5B6

R5B13

R6B9

R6B17

R7B4

R7B9

R6B33

Page 11: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

GND

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

0.1UF16V

+3_3V

+3_3V

NCNC

GND

+12V+5V

GND

GND

5%15

005%

1500

5%15

005%

1500

5%15

005%

1500

+3_3VGND

GND

GND

GND

+3_3V

GND

GND

2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

1D 1Q2D 2Q3D 3Q4D 4Q5D 5Q6D 6Q7D 7Q8D 8QGND LE

OE_N VCC3

SN74LVC573APWRTI

74LVC573A

+3_3V

28F640J3A

FLASH_4MX16

A0A1

A10A11A12A13A14A15A16A17A18A19

A2

A20A21A22

A3A4A5A6A7A8A9

BYTE_N

CE1CE2

DQ0DQ1

DQ10DQ11DQ12DQ13DQ14DQ15

DQ2DQ3DQ4DQ5DQ6DQ7DQ8DQ9

GND1GND2GND3

NC1

NC10

NC2NC3NC4NC5NC6NC7NC8NC9

OE_NRP_N

STS

VCC3_1VCC3_2

VCC3_Q

VPEN

WE_N

CE0

150UFPOLYMER

5%15

00

GND

+3_3V

+3_3V

5%15

00

-12V

GND

+3_3V

+3_3V

5%15

00

NCNCNCNCNCNCNCNCNC

NC

NCNC

NCNC

NC

NCNCNCNCNC

NCNC

NC

NCNCNCNCNCNCNC

NCNC

NC

NCNCNC

NCNCNCNCNCNCNC

NC

NCNCNCNC

NC

NC

NCNC

NCNC

NCNCNC1D 1Q

2D 2Q3D 3Q4D 4Q5D 5Q6D 6Q7D 7Q8D 8QGND LE

OE_N VCC3

SN74LVC573APWRTI

74LVC573A

0.1UF16V

GND

0.1UF16V

5%2000

5%300

5%300

5%300

5%15

00

5%15

00

+5V1+5V2+5V3 -12V

-5V

12V

AEN

BALE

DACK0*DACK1*DACK2*DACK3*DACK5*DACK6*DACK7*

DRQ0DRQ1DRQ2DRQ3DRQ5DRQ6DRQ7

ENDXFR*

GND0GND1GND2GND3GND4GND5GND6GND7

IOCHCHK*IOCHRDY

IOCS16*

IOR*IOW*

IRQ10IRQ11IRQ12IRQ14IRQ15

IRQ3IRQ4IRQ5IRQ6IRQ7IRQ9

KEY_1KEY_2

LA17LA18LA19LA20LA21LA22LA23

MASTER*

MEMCS16*

MEMR*MEMW*

OSC

REFRESH*RESETDRV

SA0SA1

SA10SA11SA12SA13SA14SA15SA16SA17SA18SA19

SA2SA3SA4SA5SA6SA7SA8SA9

SBHE*

SD0SD1

SD10SD11SD12SD13SD14SD15

SD2SD3SD4SD5SD6SD7SD8SD9

SMEMR*SMEMW*

SYSCLK

TC

PC104_MOD

NVSRAM 32KX8

STK14C88_3

A0A1

A11

A13

A2

A8A9

DQ0DQ1DQ2DQ3DQ4DQ5

VSS

NC1NC2

G_NW_N

VCAPVCCX

A14

A12

A7A6A5A4A3

E_N

DQ6DQ7

A10

HSB_N

5%15

00

5%15

00

NC

OPEN

P_BO

OT1

6# =

16-

BIT

FLAS

H

CO

RE_

RST

# =

HO

LD C

PU C

OR

E IN

RES

ET

RET

RY

= PC

I CO

NFI

GU

RAT

ION

EN

ABLE

D

DEFAULT SWITCH CONFIGURATION

BRG

_EN

= d

isab

le b

ridge

PRIV

DEV

= d

isab

le p

rivat

e de

vice

s on

S-P

CI

RESULT OF PULL DOWN ACTIVE

1 1

PUSH DOWN = 1

PIN/GATE SWAPS OK

S_PC

IX13

3EN

= 1

00M

HZ

MAX

PC

I-X A

BU

S

PCIO

DT_

EN =

Pul

l dow

n di

sabl

es In

tern

al 8

.2K

PU R

esis

tors

PUSH DOWN = 0 (enable pulldown)

PRIV

MEM

= N

orm

al a

ddre

ssin

g

P_PC

I32B

ITPC

I# =

Pul

l dow

n 32

bit b

us -

high

64b

it bu

s

0 1 0 1 1 0 0 0

9

8

7

6

5

4

3

202

19

18

17

16

15

14

13

12

11

10

1

S7C1

PBI_

A2

PBI_A1PBI_A2

PBI_A0

PBI_

A1

PBI_

A0

PBI_A0PBI_A1PBI_A2

PBI_A[2:0]4/C6,16/D5

PBI_A2PBI_A1PBI_A0

PBI_

AD5

PBI_AD15

PBI_AD0PBI_AD1PBI_AD2PBI_AD3PBI_AD4PBI_AD5PBI_AD6PBI_AD7PBI_AD8PBI_AD9PBI_AD10PBI_AD11PBI_AD12PBI_AD13PBI_AD14

PBI_AD3PBI_AD4PBI_AD5PBI_AD6PBI_AD7

PBI_AD14PBI_AD15

PBI_AD13PBI_AD12PBI_AD11PBI_AD10PBI_AD9PBI_AD8

PBI_AD[15:0]4/C6,12/C8,16/D8

PBI_

AD6

PBI_

AD4

PBI_

AD0

PBI_

AD3

PBI_AD0PBI_AD1PBI_AD2PBI_AD3PBI_AD4PBI_AD5PBI_AD6PBI_AD7PBI_AD8PBI_AD9PBI_AD10PBI_AD11PBI_AD12PBI_AD13PBI_AD14PBI_AD15

PBI_AD7PBI_AD6PBI_AD5

PBI_AD3PBI_AD4

PBI_AD2PBI_AD1PBI_AD0

PBI_

AD15

21

R6B

37

21

R8A

1NO

_PO

P=TR

UE

PBI_LA14

PBI_LA7PBI_LA6PBI_LA5PBI_LA4PBI_LA3

PBI_LA3PBI_LA4PBI_LA5PBI_LA6PBI_LA7PBI_LA8PBI_LA9PBI_LA10PBI_LA11PBI_LA12PBI_LA13PBI_LA14PBI_LA15

PBI_LA[15:3]

PBI_LA15

PBI_LA3PBI_LA4PBI_LA5PBI_LA6PBI_LA7PBI_LA8PBI_LA9PBI_LA10PBI_LA11PBI_LA12PBI_LA13PBI_LA14

PBI_LA15PBI_LA14PBI_LA13PBI_LA12PBI_LA11PBI_LA10PBI_LA9PBI_LA8

PBI_LA3PBI_LA4PBI_LA5PBI_LA6PBI_LA7PBI_LA8PBI_LA9PBI_LA10PBI_LA11PBI_LA12PBI_LA13

NVSRAM_HSB_N12/B8 NVSRAM_HSB_NNVSRAM_CE_N12/B8 NVSRAM_CE_N

PBI_OE_N4/C6,12/C8,16/C6

4/C7,12/C8,16/C6 PBI_WE_N

31

232120

22

87654

3

2

321

3025

249

16

191817151413

2728

10

29

26

1112

U8A1

C19B10

D14D12D10B15B26B17D8

D15D13D11B16B6B18D9

B8B27D17

D6D7D5D4D3B4B21B22B23B24B25

B13B14A10A1D2D1B11B12C10C9B28C1A11

B2B19

B30B20

B5B7B9

D19D18

D0C0

B32B31

B1A32

C2C3C4C5C6C7C8

A12A13A14A15A16A17A18A19A20A21A22A23A24A25A26A27A28A29A30A31

C18C17C16C15C14C13C12C11

A2A3A4A5A6A7A8A9

D16B29

B3

J9A1

R8B

5

R7A

1

R6A1

R6B2

R6B1

R7A2

C8P3C6P5

2019181716151413

10987654321

1112

U6B1

PC104_IRQ3 12/B8

PD_P

BI_A

2

PBI_

A20

PBI_A21

4/C6,12/B8,16/D5

PBI_A22PBI_A21PBI_A20PBI_A19PBI_A18PBI_A17PBI_A16

PBI_A16PBI_A17PBI_A18PBI_A19

PBI_A20

PBI_A22

PBI_A[22:16]

PBI_A20

12

R8B

4

12

R8B

6

3

1

2

Q8C1

21

R7B

22

2

1 C7B1

PD_D

IP17

PD_D

IP15

PD_P

BI_A

1

PD_P

BI_A

0

PD_P

BI_A

D0

PD_P

BI_A

D6

PD_P

BI_A

D5

PD_P

BI_A

D3

H8H2G1F7F6E6D6D5

E8

F2E2G3E4E5G5G6H7E1E3F3F4F5H5G7

C8

D8D7C5B5A5C4D3C3B3

C2

D2D1C1B1

F1G8

D4

B8H1

G2A1

A8

B4

C7

A7B7

A2

F8

G4

H3A6 E7

B2H4H6

C6B6

A4

A3

U7B1

2019181716151413

10987654321

1112

U6A1

11 17PBI FLASH INTERFACE / RESET STRAPSSTORAGE COMPONENTS DIVISION 80331 CRB 12-5-2003_8:37

21

R1L

2

12

R1L

1

21

R2L

2

12

R3L

2

21

R3L

1

12

R3L

3

PC104_CE 12/B8

PBI_ALE4/D7,12/C8,16/C6

PD_PBI_AL2

PU_FLA_STS

PD_PBI_UDPD_PBI_AL1

12/C8 FLASH_RP_N

C2D1C3C4 C5P1 C2C3 C2D6

PBI_CE0_N4/C7,16/C6

Page 12: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

1%31

.6K

1%422

+3_3V

NC

1%68

1

5%10

00

5%10

00

5%10

00

5%10

00

5%10

00

5%10

00

5%10

00

5%10

00

5%10

00

5%10

00

5%10

00

5%10

00

5%10

00

5%10

00

5%10

00

5%10

00

GND

0.1UF16V

0.1UF16V

+3_3V

0.1UF16V

0.1UF16V

+3_3V

GND

IPN=C37226-001HDSP_A1037SEG_DISPLAYD22002

SEG_F

SEG_G

SEG_E

SEG_D

CATH

SEG_B

SEG_A

SEG_C

DP

CATH_1

GND

+3_3V

+3_3V

GND GNDGND GND GND GND GND GND

GND

GND

+3_3V

GND

+3_3V

8200

5%

8200

5%

GND

GND

8200

5%

GND

IPN=C37226-001HDSP_A1037SEG_DISPLAYD22002

SEG_F

SEG_G

SEG_E

SEG_D

CATH

SEG_B

SEG_A

SEG_C

DP

CATH_1 GND

2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

GND

HAB16W

S01002

1

24

8

C1 C2

DS2430A_TSOC

GNDNC3NC2

DATANC1

NC4

DS2430A_TSOC

GNDNC3NC2

DATANC1

NC4

+3_3V

XILINXXC9572XL-10TQ100C

GND1GND2GND3GND4GND5GND6GND7GND8

IO1_1

IO1_10IO1_11/GCK2IO1_12IO1_13IO1_14/GCK3IO1_15IO1_16IO1_17IO1_18

IO1_2IO1_3IO1_4IO1_5IO1_6IO1_7IO1_8IO1_9/GCK1

IO2_1

IO2_10IO2_11/GTS2IO2_12IO2_13IO2_14IO2_15IO2_16IO2_17IO2_18

IO2_2IO2_3IO2_4IO2_5IO2_6IO2_7/GTS1IO2_8IO2_9/GSR

IO3_1

IO3_10IO3_11IO3_12IO3_13IO3_14IO3_15IO3_16IO3_17IO3_18

IO3_2IO3_3IO3_4IO3_5IO3_6IO3_7IO3_8IO3_9

IO4_1

IO4_10IO4_11IO4_12IO4_13IO4_14IO4_15IO4_16IO4_17IO4_18

IO4_2IO4_3IO4_4IO4_5IO4_6IO4_7IO4_8IO4_9

NC1NC2NC3NC4NC5NC6NC7NC8NC9

TCKTDITDO

TMS

VCCINT2VCCINT3

VCCIO1VCCIO2VCCIO3VCCIO4

VCCINT1

NC

NC

NCNCNCNCNCNCNC

NC

NC

NC

NC

NCNC

NCNCNC

+3_3V

J07014_2X7_XILINX_JTAG_HEADER

VREF

TMS

TDI

TDO

TCK

NC1

NC2

GND1

GND2

GND3

GND4

GND5

GND6

GND7

8200

5%

8200

5%

8200

5%

8200

5%

8200

5%

1%42

2

1%42

2

1%42

2

1%42

2

1%42

2

1%42

2

1%42

2

1%42

2

GR

N

GR

N

GR

N

GR

N

GR

N

GR

N

GR

N

SWAPPABLENPN_MMBT3904

NC

GND

NC

NC

GND

82005%

1%42

2

GND

+3_3V

+3_3V

NC

1UFX5R10V

GND

SWAPPABLENPN_MMBT3904

GND

8200

5%

+3_3V 5%10

00

DMT_1206_SMT_BUZZER

+

-

GR

N

SN74LVC1G14

GND

NC VCC

5%20

00

GND

Install jumper to decrease buzzer volume

Install Jumper to enable Buzzer

12

R2L

1

LED7

LED7

PC104_IRQ311/C3

11/B7 NVSRAM_HSB_N

BATT_PRESENT_N15/B5

FLASH_RP_N11/C8

4/C6,16/C6,16/C6 PBI_CE1_N

2

3

1 5

4

U9C1

1

2

LED9A11 2

J9C1

BUZZER_EN_Q

2

1E9B1

12

R9C

1

12

R1M

9

ROT_SW_8

ROT_SW_8

BUZZER_VOL

BUZZER_Q

BUZZER_N

BUZZER_P

BUZZER_OSC_FB

4

5

3Q9C1

C9C1

ESN_SLOW

BUZZER_ENABLE_N

BUZZER_ENABLE_N

12

R9C

2

1 2R9C3

ROT_SW_2

ROT_SW_2

1

2

6Q9C1

2

1

LED9A5

1

2

LED9A2

2

1

LED9A8

1

2

LED9A7

2

1

LED9A3

1

2

LED9A4

1

2

LED9A6

12

R1L

3

12

R1L

5

21

R1L

6

12

R1L

9

21

R1L

10

12

R1L

7

21

R1L

4

12

R1L

8

21

R8C

2

12

R8C

3

21

R7C

1

21

R8C

1

12

R8A

2

2

4

10

8

6

14

12

13

11

9

7

5

3

1

J7C1

LED1_DP

LED1_DP

LED

0_R

LED

1_R

LED

2_R

LED

3_R

LED

4_R

LED

5_R

LED

6_R

LED

7_R

LED1

LED1LED0

LED0

21314462

282333

2729

30

1318201415

1722

146

911

12

9491939596

9799

605261

55566458

3249503553

3742

817482

7889

90

6771726876

70

484583

47

5798

2638

16

25

36

39

87

40

3

8

10

92

41

54

63

59

65

77

66

85

86

5

79

5188

697584100

72

734643342419

80

U8B1

PBI_A[22:16]4/C6,11/D7,16/D5

PBI_A20

PBI_A18PBI_A17PBI_A16 PBI_A22

PBI_A21

PBI_A19

LED6

LED6

LED5

LED5

LED4

LED4

LED3

LED3

LED2

LED2

PC104_CE11/C3

11/B7 NVSRAM_CE_N

BATT_DISCHRG15/B4

BATT_CHRG15/B5

BATT_ENABLE_N15/B3

GBE_SMBALRT_N

4/C6,11/C6,16/C6 PBI_OE_N

LED2_SEGF

LED2_SEGFLED2_SEGE

LED2_SEGE

LED2_SEGG

LED2_SEGG

LED1_SEGG

LED1_SEGG

154

23

6U9A2

PBI_AD12

PBI_AD8

PBI_AD6PBI_AD5PBI_AD4PBI_AD3PBI_AD2PBI_AD1PBI_AD0

4/C6,11/D4,16/D8PBI_AD[15:0]

PBI_AD7

PBI_AD10PBI_AD11

PBI_AD13PBI_AD14PBI_AD15PBI_AD9

PBI_WE_N4/C7,11/C6,16/C6

PBI_ALE4/D7,11/A8,16/C6

TEMP_OS13/C1

TEMP_OS

ROT_SW_1

ROT_SW_1

154

23

6U9A1

ROT_SW_4

ROT_SW_4

LED2_DP

LED2_DP

LED2_SEGC

LED2_SEGC

LED2_SEGB

LED2_SEGB3/A6 S_CLKO_CPLD

1

43

6

2 5

S9B1

CPLD_TMS

CPLD_TCK

CPLD_TDO

CPLD_TDI

12 17CPLD AND HEX DISPLAYSTORAGE COMPONENTS DIVISION 80331 CRB 12-5-2003_8:37

2345

1910

876

DS9A2

12

R1M

10

12

R1M

8

12

R1M

7

LED1_SEGF

LED1_SEGF

LED1_SEGE

LED1_SEGE

LED1_SEGD

LED1_SEGD

LED1_SEGA

LED1_SEGA

LED1_SEGB

LED1_SEGB

LED1_SEGC

LED1_SEGC

LED2_SEGA

LED2_SEGA

678

109

1

5432

DS9A1

LED2_SEGD

LED2_SEGD

C4C7C4D4C6P3C7R2

1

2

R1L12

1

2

R1M

1

1

2

R1M

3

1

2

R1M

5

1

2

R9A1

1

2

R9A2

1

2

R9B1

1

2

R9B2

1

2

R8A3

1

2

R8B1

1

2

R8B2

1

2

R8B3

1

2

R1L11

1

2

R1M

2

1

2

R1M

4

1

2

R1M

6

12

R9C

5

1 2R9C6

12

R9C

4

21J9C2

Page 13: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

GND

GND

GND

22UFTANT5%

2000

5%20

00

8.2K 5%

8.2K 5%

NC

NC

NC

NC

GND

8200

5% 1UFX5R10V 1UF

X5R10V

GND

+3_3V

GND

1UFX5R10V1UF

X5R10V

8200

5%

8200

5%

8200

5%

8200

5%

8200

5%

8200

5%

8200

5%

+3_3V

82005%

+3_3V

GND

GNDGND

5%2000

5%2000

GND 5%2000

5%2000

5%20005%2000

+3_3V

GND GND

GND

5%2000

GND

GND

+3_3V

CONN_4P_I2C

CONN_4P_I2C

2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

C36912-001

MAX561

C1+C1-

C2+C2-

GN

D

R1INR1OUT

R2INR2OUT

R3INR3OUT

R4INR4OUT

R5INR5OUT

SHDN

T1IN T1OUT

T2IN T2OUT

T3IN T3OUT

T4IN T4OUT

V+

V-

VCC

EN_N

x5

400K

5K

+3.3V x4

3.3V to 6.6V Doubler

+6.6V to -6.6V Doubler

8.2K 5%

+3_3V

+3_3V

5%20

00

5%20

00

+3_3V

+3_3V

1

6V_0X75A

2

GND

GND

NCNC

24LC16BMSOP8

A2_XA1_XA0_X

SDASCL

VSS

WP

VCC

SO8LM75_SOP8-3

GND

VCC

O.S.

A2A1A0

SDASCL

FB

X7RCC0603

.01UF

GND GND

22UFTANT

GND

+12V

8.2K 5%

5%0

5%0

+3_3V

5%0

GND

5%0

GND

RJ11DUAL

GND

PINOUT NOT VERIFIED

Header for Active BGA Heatsink Fan

2

1J2D1

UART1_TXD

UART1_RTS_N

9

10

12345678

J1E2

21

R9P

1

12

R9R

1

1 2J1D1

UART1_RXD

UART0_TXD

UART0_RXD

UART0_RTS_N

21

R1D

4

UART1_CTS_N

12

R1D

5

UART0_CTS_N

1 8RP2D1NO_POP=TRUE

C1E2C9R1

4

8

3

567

12

U1D14

7

8

321

56

U1C1

PD_EEPROM_WP

F1C1

12

R1C

3

SCL14/D5

12

R1C

1

SCD14/D5

3 6RP2D1

4/D6 U0_TXD

U0_RTS_N4/D6

9

11

25

2

24

7

1615

1412

10

17

13

6 3

21 28

20 1

8

26 27

5 4

19 18

22 23

U1D2

13 17I2C INTERFACE / UARTSSTORAGE COMPONENTS DIVISION 80331 CRB 12-5-2003_8:37

1

2

3

4

J1C1

1

2

3

4

J1C2

1 2R1C4

1 2R1D1

1 2R1D2

1 2R1C9

1 2R1C6

1 2R1C7

1 2R1C5

4/D5,9/D4 DDR_I2C_SDA

12/B6TEMP_OS

PD_LM75A_A2PD_LM75A_A1PD_LM75A_A0

PD_EEPROM_A2PD_EEPROM_A1PD_EEPROM_A0

123456789

J2C1

1 2R1D3

123456789

J1E1

12

R2D

4

12

R2D

9

12

R2D

11

12

R2D

16

12

R2D

14

12

R2D

17

12

R2D

18

C1D2C1D1

C1E1C9P1

12

R2D

6HPI_N3/B1

UART_SHDN

4/D6 U0_RXD

4/D6 U1_RXD4/D6 U0_CTS_N

4/D6 U1_RTS_N4/D6 U1_TXD

4/D6 U1_CTS_N

UART_VN

UART_VP

UART_C1N

UART_C1P

UART_C2N

UART_C2P

4/D5,9/D4 DDR_I2C_SCL

72 RP2D1

54 RP2D1

3/B7,7/D8 S_INTA_N

3/B7,7/D4 S_INTB_N

3/B7,7/D8 S_INTC_N

3/A7,7/D4 S_INTD_N

21

R1C

8

21

R1C

2

C2E4

+12_FAN

Page 14: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

CONN_4P_DISK_KEY

+5V

1%53

.6

GND

150UFPOLYMER

DDR_VTT

+2_5V

+2_5V

100

GND

+3_3V

NC

GNDGND

1%42

2

GR

N

GR

N

+12V

PCI

+3_3

VPC

I

NC

1%10K

GND

GND

GND

GNDGND

GND

GND

X7R

10UFX5R

FDS6898AUSOP_10

MAX1954EUB

IN

COMP

HSD BST

DH

GND

LX

DL

PGND

FB 22UFX5R

+3_3VPCI

1%31.6K

+12VPCI

GND

GND

+5VPCINC

+3_3V

5%10

00

GND

0.1UF16V

+3_3V

GND

GNDGND

1%42

2

+12V

82005%

1%10K

47PFCOGX7R

1000PF

GND

GND

GND

GNDGND GND

GND

GND

22UFX5R

X7R

10UFX5R

5%62K

USOP_10MAX1954EUB

IN

COMP

HSD BST

DH

GND

LX

DL

PGND

FB

47PFCOGX7R

1000PF

GND

GND

GND

GND

GND

GND

1%10K

+3_3V

GND

1%8870

DDPAK5

LT1963

GN

D

SHDN ADJ

IN OUT

GND_BASE

GND

+3_3V

22UFX5R

X7R

10UFX5R

3.3UH

GND

GND

GND

GND

10UFX5R

+1_5V

+3_3V

+1_35V

GR

N

GR

N

100

GND

1%42

2

USOP_10MAX1954EUB

IN

COMP

HSD BST

DH

GND

LX

DL

PGND

FB

UXXXX2_LP2996

VTT

VSENSE

VREF

GND

PV_IN

AV_IN

VDDQ

SD_N

FDS6898A

GR

N

+1_5V

GND

5%10

00

+3_3V

2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

10UFX5R

10UFX5R

3.3UH

FDS6898A

0.1UF16V

0.1U

F16

V

0.1U

F16

V0.

1UF

16V

1%12.4K

1%8870

3.3UH

+3_3V

150UFPOLYMER

+12V

PCI

+5VP

CI

+5VP

CI

GND

GND

100

100

+2_5V

1%110K

1%44.2K

0.1U

F16

V

X7R1000PF

GND

1%0.01

1%0.01

+12V

PCI

+12V

1%0.01

+5V

22UFTANT

22UFTANT

0.1U

F16

V

47PFCOG

SWAPPABLENPN_MMBT3904

SWAPPABLENPN_MMBT3904

GR

N

GND

GND

150UFPOLYMER

150UFPOLYMER

150UFPOLYMER

150UFPOLYMER

150UFPOLYMER

+5V

MBRS340T

DDR Voltage Regulator

True Pinout Represented

HSD Req. Kelvin connection to drain

VREF MUST NOT POWER UP BEFORE 1.8V

Attach near DIMM

HSD Req. Kelvin connection to drain

6A maximum output current

HSD Req. Kelvin connection to drain

1.5A maximum

CHECK ESR > 50MOHM

6A maximum output current

3.3V Voltage Regulator for PCI Slot1.5V Voltage Regulator

1.35V Voltage Regulator

LED Indicators

MUST USE SAME POWER SUPPLY AS HOSTAUX CONNECTOR FOR SLOT POWER

DDR VTT Voltage Regulator

Locate decoupling near load rather than supply

ProtoB #6: Added diode to prevent battery power from draining into 5V rail

1 2

D5C2

1 32

D5C1

1

2

C3A1

1

2

C6E11

2

C6D2

1

2

C6C2 1

2

C6D1

V2_5_LX

1

2

LED5D1

4

5

3Q6D2

1

2

6Q6D2

C1A1

V3_3S_COMP

C5B

2

V1_5_COMP_R

V2_5_COMP_R

C1B1C2A7

21 R1A2NO_POP=TRUE

1 2R1B1NO_POP=TRUE

V3_3S_LX

21 R3A3NO_POP=TRUE

C1A2

V3_3S_FB

V3_3S_DH

C1A4

1 2R5D5

12 R1A1

21

R5P

1

12

R5L

1

1

2

C3A2

12

L2A1

V2_5_BST

V2_5_DH

V2_5_DL

V2_5_FB 1 2R5D21 2R5D1

C6C

5C

6D5

C4M

1

DDR_VREF 4/B3,9/A5

C5M1

V1_5_FB

1

3

2

4

8

7

6

5

Q6D3

12

L6D1

C5D7C5D4

14 17VOLTAGE REGULATORSSTORAGE COMPONENTS DIVISION 80331 CRB 12-5-2003_8:37

12

R6D

2

1

2

LED6D1

1

3

2

4

8

7

6

5

Q6D1

8

3

4

1

7

6

5

2

U5B1

5

2

1 10

8

4

9

6

7

3

U5D2

12

R5D

4

12

R3R

2

1

2

LED7E2

1

2

LED7E1

C5B3

1 32

D5D1

12

L6E1

C6D3

C5E2

C6D4

3

1 5

2 4

6

U5D1

1 2

R5D

7

1 2

R5D

6

C5E1 C5D10

5

2

1 10

8

4

9

6

7

3

U5C2

1 2R5C40

C6C3

C5D3

C6C4

C5D2 C5D1

1 2R5C41

1 2R5B1

12

R3R

1

C5B1

12

R6D

1

V2_5_COMP

V1_5_LX

V1_3_ADJ

V1_5_DH

V1_5_DL

V1_5_BST

V1_5_COMP

1 32

D1A1

1 2R9L2

C7L4

5

2

1 10

8

4

9

6

7

3

U1A1

1

3

2

4

8

7

6

5

Q1A1

C9L2

C1A3

1 2R9L3

V3_3S_COMP_R

V3_3S_DL

V3_3S_BST

1

2

LED5A1

1

2

LED1A1

12

R9L

1

12

R4P

1

2

1 C6B1

12

R5D

3

4

3

1

2

J1A1

Page 15: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

GND

5%1.3M

1%10

0K

+2_5V

NC

+1_5

V

1%20

0

0.1UF16V

5%39K

GNDGND

GND

22UFX5R

22PFCOG

5%10

00

10UFX5R

GNDGND

X7RCC0603

.01UF

1%10

0K

1%10

KGND

X7R1000PF

GND

X7R1000PF

0.1UF16V

10UFX5R

0.1UF16V

1%53

.6

10UFX5R

10UFX5R

GND

220UFTANT

5%43

00

5%43

00

100

GND

GND

GND

GND

1%10

K

GND

GND

4.7UFX5R

GND

GND

+12V

GND;4LM393

+12V;8

-+

GND;4LM393

+12V;8

-+5%

1000

GND

8200

5%

8200

5%

+3_3V

GND

GND

1%100K

MAX8863T

SOT23_5SET

SHDN_N

GND

IN OUT

GNDGND

GND

GND

0.1UF16V

5%1.3M

GND

+3_3V

5%39

K

GND

ADP3801SO16 A/B

ADJ

BATABATB

COMP

CS+CS-

DRV

EOC_N

GN

D

ISET

PROG

RESET_N

SD_N

VCC

VL

5%39K

1%16

.5K

1%10

0K

NC1

NC2

1%16

2K

1%11

0K

1%0.5

1%215K

NC

2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

4.7UH

SI3441

1%10

0K

LE

OE_

N

GND;10

74LVC373AD Q

LE

OE_

N

GND;10

74LVC373AD Q

8200

5%

LE

OE_

N

GND;10

74LVC373AD Q

LE

OE_

N

GND;10

74LVC373AD Q

LE

OE_

N

GND;10

74LVC373AD Q

LE

OE_

N

GND;10

74LVC373AD Q

LE

OE_

N

GND;10

74LVC373AD Q

LE

OE_

N

GND;10

74LVC373AD Q

5%1.3M

GND

NC

NC

NC

NC

NC

NC

GND

GND

NC

NC

SWAPPABLENPN_MMBT3904

SWAPPABLENPN_MMBT3904

SWAPPABLENPN_MMBT3904

SWAPPABLENPN_MMBT3904

1%10

K

5%39

K

SC70MAX6383

THRESHOLD=2.31V

RESET_NGND

VCC

Need to resolve the 12V output from comparator

A48014-001 PAD

A39481-001 CLIP

A78958-001 Battery

21

3

U7D2

BATT_REG_SET

12

R7D

2

12

R6D

3

1

2

6Q7D2

4

5

3Q7D2

1

2

6 Q7D4

3

5

4

Q7D4

BATT_SD_N

BATT_CS_NBATT_CS_P

VBATT_R

BATT_REG_RST_N

BATT_DFLOP_OE_N

V_BATT

BATT_DISCHRG 12/B8

12/B8BATT_CHRG

BATT_RST_N

BATT_BATB

1 2R8C5

11

1

17 16

V_BATT;20

U7D154

1

11

U7D1

V_BATT;20

11

1

7 6

V_BATT;20

U7D1 1514

1

11

U7D1

V_BATT;20

11

1

13 12

V_BATT;20

U7D11918

1

11

U7D1

V_BATT;20

1

2

R7D

8

98

1

11

U7D1

V_BATT;20

11

1

3 2

V_BATT;20

U7D1

12

R7D

4

5

61

4

2

3

Q7D3

12

L8E1

15 17DDR BATTERY BACKUPSTORAGE COMPONENTS DIVISION 80331 CRB 12-5-2003_8:37

12

R8D3

1 2

R8E1

12

R8D

5

12

R8D

1

2

3

14

5

J8D1

12

R8D

2

12

R7D

13

1 2

R7D12

3

12

8

1

7

5

6

15

112

1314

10

4

16

9

U7D4

12

R7D

1

1 2R7D10

C7C4

4

2

3

1

5

U7D3

1 2R7D7NO_POP=TRUE

12

R8C

4

12

R7C

26

1 2R7E4 5

67

U8C1

3

21

U8C1

C2P1

12

R7D

14

1 2

R7D

11

12

R7D

6

12

R7E

2

C8E1

2 1D7D1

C7E3

C7D5

12

R7E

3

C7D8C7D7

C7E2

21

D7D

2

C7E1 C7D3

12

R7E

1

12

R8D

6

C7C3

C7D6

12

R7D

9

C7D4 C7D2

1 2R8D4

C7D1

12

R7D

3

3

1

2

Q7D1

BATT_PRESENT_N 12/C8

BATT

_EN

ABLE

_RC

VBATT_D_Q

BATT_OFF_Q

BATT_ENABLE_N12/C8

VBAT

T_C

OM

P_L

BATT_QB

VBATT_DVBATT_IND

BATT

_DR

V

BATT_ADJ

BATT

_CO

MP_

R

BATT_COMP

BATT_ISET

BATT_OFF

21

R7D

5

21R7C25

VBAT

T_C

OM

P_H

VBATT_COMP

PWR_GD_Q

4/B8,9/A8,9/D2 PWR_OK

Page 16: 80331 DDR DIMM Customer Reference Board - Intel · 80331 ddr dimm customer reference board storage components division 80331 crb block diagram 12-5-2003_8:37 217 ddr 333 gpios ddr

GND

0.1UF16V

0.1UF16V

NC

NC

NC

GN

D

2.01

C

8 7 6 5

D

B

A A

B

D

8 7 6 5

2 1

2

3

3

4

4

C

REVISION:SHEET

DATE MODIFIED:DESIGN NAME:

SHEET TITLE:

OFDESIGN ENGINEER:

ProtoBCopyright 2003, Intel Corporation

GND

NC

NC

+5V

J05001

CLK_E/CLK:0GND+5V

SDASCL

D15_E/A3:7D14_E/A3:6D13_E/A3:5D12_E/A3:4D11_E/A3:3D10_E/A3:2

D8_E/A3:0D7_E/A2:7D6_E/A2:6D5_E/A2:5D4_E/A2:4D3_E/A2:3D2_E/A2:2D1_E/A2:1D0_E/A2:0 G

ND

3

CLK:1/CLK_OA1:7/D15_OA1:6/D14_OA1:5/D13_OA1:4/D12_OA1:3/D11_OA1:2/D10_O

A1:1/D9_OA1:0/D8_OA0:7/D7_OA0:6/D6_OA0:5/D5_OA0:4/D4_OA0:3/D3_OA0:2/D2_OA0:1/D1_OA0:0/D0_OG

ND

2

D9_E/A3:1

GN

D0

GN

D1

GN

D4

MICTOR A

321

3738

456789

111213141516171819

G4

3635343332313029282726252423222120

G3

10

G1

G2

G5

M1

J8B1NO_POP=TRUE

S_CLKO_MICTOR3/A6

PBI_A2

PBI_A1

PBI_A0

4/C6,11/D7PBI_A[2:0]

PBI_AD[15:0]4/C6,11/D4,12/C8

PBI_AD6

PBI_AD7

PBI_AD9

PBI_AD10

PBI_AD11

PBI_AD12

PBI_AD13

PBI_AD14

PBI_AD15

PBI_AD8

PBI_AD5

PBI_AD4

PBI_AD3

PBI_AD0

PBI_AD1

PBI_AD2

4/C6,12/C8,16/C6PBI_CE1_N

PBI_CE0_N 4/C7,11/C8PBI_ALE 4/D7,11/A8,12/C8PBI_OE_N 4/C6,11/C6,12/C8PBI_WE_N 4/C7,11/C6,12/C8

4/C6,11/D7,12/B8PBI_A[22:16]

PBI_A16

PBI_A17

PBI_A18

PBI_A19

PBI_A20

PBI_A21

PBI_A22

PBI_CE1_N 4/C6,12/C8,16/C6

16 17DEBUG - MICTOR CONNECTORSSTORAGE COMPONENTS DIVISION 80331 CRB 12-5-2003_8:37

C3C7C7N5

1 +5VD C (3)3 G ND (3)5 CLKe7 D15e9 D14e11 D13e13 D12e15 D11e17 D10e19 D9e21 D8e23 D7e25 D6e27 D5e29 D4e31 D3e33 D2e35 D1e37 D0e

2 SC L (2)4 SD A (2)6 CLKo8 D15o10 D14o12 D13o14 D12o16 D11o18 D10o20 D9o22 D8o24 D7o26 D6o28 D5o30 D4o32 D3o34 D2o36 D1o38 D0o

1 G N D (1)2 G N D (1)3 CLK4 X 3:75 X 3:66 X 3:57 X 3:48 X 3:39 X 3:210 X 3:111 X 3:012 X 2:713 X 2:614 X 2:515 X 2:416 X 2:317 X 2:218 X 2:119 X 2:0

38 G ND (1)37 G ND (1)36 CLK35 X 1:734 X 1:633 X 1:532 X 1:431 X 1:330 X 1:229 X 1:128 X 1:027 X 0:726 X 0:625 X 0:524 X 0:423 X 0:322 X 0:221 X 0:120 X 0:0

M ictor Connector Pin outA gilent’s vs. Tektronix

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(1) Tektronix doesn't use pins 1,2,37,38 but recom m ends that they are grounded.(2) Pins 2 & 4 are not to be used they are outputs from the logic analyzer used to program em ulation or analysis probes.(3) Pins 1 & 3 are not to be used they should be left as no connects. They are pow er pins for analysis/em ulation probes.

Tek A gilent A gilent Tek

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8 7 6 5

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ProtoBCopyright 2003, Intel Corporation

Revision History

Rev 2.0 - ProtoB 12/5/2003

17 17REVISION HISTORY - 80331 CRBSTORAGE COMPONENTS DIVISION FP333 12-5-2003_8:37