Consistency Models of Consistency Models of Distributed Shared Memory Distributed Shared Memory

SystemsSystems Jerzy Brzeziński

Poznan University of TechnologyInstitute of Computing Science

Distributed Shared Memory Distributed Shared Memory SystemSystem

Distributed systems equipped with a software component on top of message-passing communication environment to provide a shared-memory abstraction to the programmers.

Data access conceptData access conceptss

remote access

relocation

replication

ReplicationReplication

network

processorprocessor processorprocessor

localcache

localcache

processorprocessor

ho

st

host

host

DSMmanager

ReplicationReplication

network

processorprocessor processorprocessor

localcache

localcache

processorprocessor

ho

st

host

host

DSMmanager

ReplicationReplication

network

processorprocessor processorprocessor

localcache

localcache

processorprocessor

ho

st

host

host

DSMmanager

DSM System DSM System — formal definition — formal definition

DSM System a set of sequential processes P = { p1, p2, ..., pn }, interacting via a set X = {x1, x2, ... }, of shared memory locations shared memory locations read/write objects each process has its own replica of the whole set X

Consistency modelConsistency model

Consistency models are defined by imposing some constraints on the serialisation of the set Oi OW for each process pi. The constraints are given as conditions that the serialisations must satisfy. The conditions usually restrict the set of all possible serialisations.

Consistency model propertiesConsistency model properties

Adequacy

Restrictiveness

Classes of consistency modelsClasses of consistency models

General access

Synchronization access

General accessGeneral access consistency consistency modelsmodels

atomicsequentialcausalprocessorPRAMcoherence

Sequential consistency Sequential consistency — definition— definition

2121

..12,1

oooo ijnjOWOoo i

1221

..1..12,1

wwww ini

iniOWww

Sequential consistency Sequential consistency — example— example

w2(x)1p2

p1

w2(x)2

r1(x)1

w2(x)1 1 w2(x)21 r1(x)1

w2(x)1 2 w2(x)2hv2:

hv1:

Atomic consistency Atomic consistency — definition— definition

2121

..12,1

oooo iRTnjOWOoo i

1221

..1..12,1

wwww ini

iniOWww

o 1RT o 2 o1 is finished before o2 starts

Atomic consistency Atomic consistency — example— example

w2(x)1p2

p1

w2(x)2

r1(x)1 r1(x)2

Causal consistency Causal consistency — definition— definition

21212,1

oooo iOWOoo i

Causal consistency Causal consistency — example— example

w2(x)1p2

p1

r2(y)1

r1(x)1w1(x)2 w1(y)1

r2(x)2

w1(x)2 1 w2(x)11 w1(y)1

w2(x)1 2 w1(x)2hv2:

hv1: 1 r1(x)1

2 r2(y)12 w1(y)1 2 r2(x)2

PRAMPRAM consistency consistency — definition— definition

2121

..12,1

oooo ijnjOWOoo i

PRAMPRAM consistency consistency — — exampleexample

p2

p1

r2(y)1

w1(x)1 w1(y)1

w2(x)2

p3

r3(x)2 r3(x)1

Coherence Coherence — definition— definition

1221

..1..1|2,1

wwww ini

inixOOWwwXx

Coherence Coherence — example— example

w2(x)1p2

p1

r2(y)1

r1(x)1 w1(x)2 w1(y)1

r2(x)1

r1(x)2

r2(x)2

Processor consistency Processor consistency — definition— definition

2121

..12,1

oooo ijnjOWOoo i

1221

..1..1|2,1

wwww ini

inixOOWwwXx

Processor consistency Processor consistency — example— example

w2(x)1p2

p1

r2(y)1

r1(x)1w1(x)2 w1(y)1

r2(x)1

Relationships between general Relationships between general access consistency modelsaccess consistency models

2121

..12,1

oooo ijnjOWOoo i

1221

..1..1|2,1

wwww ini

inixOOWwwXx

21212,1

oooo iOWOoo i

2121

..12,1

oooo iRTnjOWOoo i

1221

..1..12,1

wwww ini

iniOWww

PRAM

causal

coherence

pro

cessor

sequential

atomic

Synchronization accessSynchronization access consistency modelsconsistency models

weak

release

scope

entry

WWeak consistencyeak consistency

Access to shared locations:

access operations to global data

access operations to synchronising variables

WWeak consistencyeak consistency— definition— definition

soso ijnjOSsOWOoni i

..1,..1

osos ijnjOSsOWOoni i

..1,..1

21212,1..1

ssss iRTOSssni

1221..1..12,1

ssss ini

iniOSss

Weak consistency Weak consistency — example— example

w2(x)1p2

p1

synch2(s)

r1(x)1w1(x)2 synch1(s)

r2(x)1

r1(x)2

Release consistencyRelease consistency

Two forms of synchronisation:

mutual exclusion acquire release

synchronisation at a barrier barrier

Release consistency Release consistency — example— example

r2(x)0p2

p1

acq1(lock)

w1(x)1 rel1(lock)

r2(x)1

acq1(lock)w1(y)1

r2(y)0 r2(y)1

Scope consistencyScope consistency

Synchronisation connected with scope:mutual exclusion acquire — open scope release — close scope

synchronisation at a barrier barrier — close global scope then reopen

explicit scope operations open scope close scope

Scope consistencyScope consistency— example— example

r2(x)0p2

p1

acq1(lock)

w1(x)1 rel1(lock)

r2(x)1

acq1(lock)w1(y)1

r2(y)0 r2(y)0

the same scope

Entry consistencyEntry consistency

Shared variables are explicitely associated with synchronisation objectsTwo kinds of locks are distinguished shared lock exclusive lock

Entry consistency Entry consistency — example— example

p2

p1

acq1(lock, EX)

r1(x)1 rel1(lock)

w2(x)1

acq1(lock, SH)

p3

r1(x)1

rel1(lock)acq1(lock, SH)

rel1(lock)

ConclusionsConclusions

DSM systems potentially combine advantages of both shared and distributed memory systems they make easier the development of parallel programs in a distributed environmentachieving these advantages raises new problems, e.g. consistency maintenance