3943

7/27/2019 3943

1/49

PROJECT REPORTon

DIGITAL ENERGY METER USING GSM

Subm itted in p a rt ia l fu l fil lm ent for the a wa rd of the d eg ree

of

BACHELOR OF TECHNOLOGY

in

ELECTRONICS AND COMMUNICATION ENGINEERING

by

S. MOHAMED HAJIALI MARAICAYAR 10404429

G. MOHAMED RIYAZ 10404430

P. MOHAN 10404431

under the guidance of

Mrs. NEELAVENI AMMAL, M.E.,(Senior Lecturer, School of Electronics and Communication Engineering)

FACULTY OF ENGINEERING

AND TECHNOLOGY

SRM UNIVERSITY

(Under section 3 of UGC Act, 1956)

SRM Nagar, Kattankulathur 603 203

Kancheepuram Dist.Tamil Nadu

MAY 2008

7/27/2019 3943

2/49

BONAFIDE CERTIFICATE

Certified that this project report DIGITAL ENERGY METER USING

GSM is the bonafide work of S. MOHAMED HAJIALI MARAICAYAR

(10404429), G. MOHAMED RIYAZ (10404430), P. MOHAN (10404431) who

carried out the project work under my supervision.

Date:

HEAD OF THE DEPARTMENT INTERNAL GUIDE

Date:

INTERNAL EXAMINER EXTERNAL

EXAMINER

7/27/2019 3943

3/49

ACKNOWLEDGEMENT

We take sincere efforts to acknowledge the guidance and the advice of all the

people who have helped us in completing this project successfully.

We express our gratitude to Dr. C. Muthamizhchelvan, Associate Director (E&T),

S.R.M University and Dr. T.P. Ganesan, Pro Vice chancellor, S.R.M University for

aiding us in our endeavor to complete the project.

We are greatly obliged to Dr. S. Malarvizhi, Professor and Head, Department of

Electronics and Communication Engineering.

We express our sincere gratitude to our guide Mrs. Neelaveni Ammal, M.E.,

Senior Lecturer, Electronics and Communication Engineering.

We express our gratitude to our project coordinatorMr.Anniyappan kumaran,

Senior Lecturer, Electronics and Communication Engineering..

We would like to thank our loving parents for their constant support and

encouragement.

3

7/27/2019 3943

4/49

ABSTRACT

It has become a trend to integrate automatic industries via wireless applications

over network. Along with the advancement of technology Development, research on

wireless applications and remote control has become significant and popular today. Thus,

we have designed and implemented a GSM based Energy meter. The integration of the

embedded Microcontroller (Energy measurement System) and GSM Short Message

Service (SMS) provides the meter reading system with some automatic functions that are

predefined. From this project we can have the meter reading status from anywhere of the

global as well as we can control. These mobile numbers are all should be

predefined.Energy meter systems can be incorporated with embedded controllers such as

GSM modem to transmit the data over the mobile network. Such data can be then fed and

integrated into existing Energy Management Systems located at power companies and

organizations. The problem of efficiently collecting data from a large number of

distributed GSM Modems in the energy meters is still a challenging problem. GSM

modem should needs the terminal to control that part. Our Embedded controller

interfaced with energy meter reading systems and GSM modem to control both.

4

7/27/2019 3943

5/49

TABLE OF CONTENTS

CHAPTER TITLE PAGE NO

ACKNOWLEDGEMENT i

ABSTRACT ii

LIST OF FIGURES v

LIST OF TABLES vi

1 INTRODUCTION 1

1.1BLOCK DIAGRAM 2

2 GSM MODEM 3

2.1INTRODUCTION 3

2.2GSM INTERFACES 4

2.3SPECIFICATIONS 4

2.4FEATURES 4

2.5COMMANDS 5

2.6GSM INSTALLATION 6

3 PIC16F87X 7

3.1PIN DIAGRAM 7

3.2FEATURES 8

3.3ARCHITECTURE 10

3.4MEMORY ORGANIZATION 11

3.5I/O PORTS 12

3.6USART 19

3.7WATCH DOG TIMER 22

3.8A/D CONVERTER 23

4 LCD 28

4.1FEATURES 28

4.2SPECIFICATIONS 29

4.3PIN CONFIGURATION 30

5

7/27/2019 3943

6/49

5 MAX -232 31

5.1PIN DIAGRAM 31

5.2CIRCUIT OPERATION 31

5.3DESCRIPTION 32

5.4APPLICATION 33

5.5FUNCTION TABLE 34

6 CIRCUIT DIAGRAM 35

6.1 POWER SUPPLY 36

6.2 STEP DOWN TRANFORMER 37

6.3 RECTIFIER UNIT 37

6.4 FILTERING UNIT 38

6.5 VOLTAGE REGULATOR 38

7 BENEFITS OF EMS 39

7.1 FEATURES 39

7.2 CUSTOMER BENEFITS 39

8 CONCLUSION 40

REFERENCE 41

6

7/27/2019 3943

7/49

LIST OF FIGURES

FIG NO. TITLE PAGE NO

1.1 BLOCK DIGRAM 2

3.1 PIC PIN DIAGRAM 7

3.2 PIC ARCHITECTURE 10

3.3 PIC MEMORY ORGANIZATION 11

3.4 A/D BLOCK DIAGRAM 24

4.1 LCD 28

5.1 MAX232 PIN DIAGRAM 31

5.2 MAX232 CIRCUIT DIAGRAM 31

6.1 CIRCUIT DIAGRAM 35

7

7/27/2019 3943

8/49

LIST OF TABLE

TABLE NO. LIST OF TABLES PAGENO

3.1 PIC PORT A FUNCTION 13

3.2 PIC PORT B FUNCTION 14

3.3 PIC PORT C FUNCTION 15

3.4 PIC PORT D FUNCTION 16

3.5 PIC PORT E FUNCTION 17

3.6 PIC PINOUT DESCRIPTION 25

3.7 PIC.REGISTER FILE MAP 27

4.1 LCD SPECIFICATION 29

4.2 LCD PIN CONFIGURATION 30

5.1 MAX 232 PIN LAYOUT 32

8

7/27/2019 3943

9/49

CHAPTER 1

INTRODUCTION

1. INTRODUCTION

Energy meter systems can be incorporated with embedded controllers such as

GSM modem to transmit the data over the mobile network. Such data can be then fed and

integrated into existing Energy Management Systems located at power companies and

organizations. The problem of efficiently collecting data from a large number of

distributed GSM Modems in the energy meters is still a challenging problem. GSM

modem should needs the terminal to control that part. Our Embedded controller

interfaced with energy meter reading systems and GSM modem to control both.

The Energy Monitoring System is appropriate for Industries, manufacturing

plants, commercial Buildings or any situation where an electrical system is used. The

system provides the centralized Power Monitoring and Control. The Energy Management

System leads to savings in the overall cost. These savings may be from better utilization

of manpower, savings in the energy consumption, non breakdowns in the system et This

project is divided into modules for better understanding of the circuit. The modules

include

PIC Microcontroller

GSM Modem

Liquid Crystal Display

MAX 232

9

7/27/2019 3943

10/49

1.1 Block diagram

Power Supply Transformer

LCD

Mobile

+5v Power

supply

GSM Modem

MAX 232

Load

PIC Controller

Fig 1.1 Block digram

10

7/27/2019 3943

11/49

CHAPTER 2

GSM MODEM

2.1 Introduction

A GSM modem is a wireless modem that works with a GSM wireless network. A

wireless modem behaves like a dial-up modem. The main difference between them is that

a dial-up modem sends and receives data through a fixed telephone line while a wireless

modem sends and receives data through radio waves

A GSM modem can be an external device or a PC Card / PCMCIA Card.

Typically, an external GSM modem is connected to a computer through a serial cable or a

USB cable. A GSM modem in the form of a PC Card / PCMCIA Card is designed for use

with a laptop computer. It should be inserted into one of the PC Card / PCMCIA Cardslots of a laptop computer.

Like a GSM mobile phone, a GSM modem requires a SIM card from a wireless

carrier in order to operate.

As mentioned in earlier sections of this SMS tutorial, computers use AT

commands to control modems. Both GSM modems and dial-up modems support a

common set of standard AT commands. You can use a GSM modem just like a dial-up

modem.

In addition to the standard AT commands, GSM modems support an extended set

of AT commands. These extended AT commands are defined in the GSM standards.

With the extended AT commands, you can do things like:

Reading, writing and deleting SMS messages.

Sending SMS messages.

Monitoring the signal strength.

Monitoring the charging status and charge level of the battery.

Reading, writing and searching phone book entries.

The number of SMS messages that can be processed by a GSM modem per

minute is very low -- only about six to ten SMS messages per minute.

11

7/27/2019 3943

12/49

2.1.1 GSM Interfaces

Serial port, [3.3V TTL Voltage level /RS232 Voltage level optional,

115200bps[8]1[N]No hardware flow control]

Power supply[DC 7.5V[500mA]

Antenna interface

Status lights[Red light indicate power status]

SIM Card Holder

2.1.2 Specifications

Operation temperature -25 - +60)

Storage temperature(-35 - +80)

Humidity (0 95)non-condense

Receive Sensitivity -102dBm

Maximum Transmit Power-1W

Dynamic range 62dB

Frequency tolerance 0.1ppm

Power supply 5V,7.5V,12V optional (customized by requirement)

Current standby 50mA-work 300mA

Weight 250g

2.1.3 Features

Supporting both Chinese/English SMS data communication

Supporting 850/900/1800/1900 MHz GSM Quad band, better signal quality.

Status lights indication.

Supporting AT Command Set.

Standard RS-232 serial port, easy to use.

Industrial standard design and quality guarantee

12

7/27/2019 3943

13/49

2.2 Commands

SMS functions

Setting up SMS Center number

AT+CSCA=+8613800XXXXXX

TEXT parameter

AT+CSMP=17 168 0 0

AT=*MESSAGE*

E.g. AT=*power cut tomorrow*

Display in LCD

Send SMS

AT+CMGS

AT=

Power display in LCD

Read single SMS

AT+CMGR=1

AT=Trip ON

AT=

Trip OFF

List multiple SMS

AT+CMGF=1

AT+CMGF=4

Delete SMS

AT+CMGD

13

7/27/2019 3943

14/49

2.3 GSM Installation

a) Open the SIM card holder, insert in a valid SIM Card provided by GSM network

operator or service provider.

b) Install the GSM Modem to your location and connect the antenna to the SMA

connector

c) Fix the serial cable to the GSM modem, the supplied cable will connect the Unit

to a PC. For other devices you may need a crossover cable.

d) Connect the GSM Modem power supply interface with the power adapters output

jack, and then connect the adapter to its power supply source.

14

7/27/2019 3943

15/49

CHAPTER 3

PIC CONTROLLER

3.1 PIC16F87X

This series micro controller certainly contains many advantageous when compares

to normal one. so it is abruptly used. Devices includes

PIC16F873

PIC16F874

PIC16F876

PIC16F877

3.1.1 PIN DIAGRAM

Fig 3.1Pin diagram

15

7/27/2019 3943

16/49

3.1.2 Microcontroller Core Features:

High performance RISC CPU

Only 35 single word instructions to learn

All single cycle instructions except for program

branches which are two cycle

Operating speed: DC - 20 MHz clock input

DC - 200 ns instruction cycle

Up to 8K x 14 words of FLASH Program Memory,

Up to 368 x 8 bytes of Data Memory (RAM)

Up to 256 x 8 bytes of EEPROM Data Memory

Pinout compatible to the PIC16C73B/74B/76/77

Eight level deep hardware stack

Direct, indirect and relative addressing modes

Power-on Reset (POR)

Power-up Timer (PWRT) and

Oscillator Start-up Timer (OST)

Watchdog Timer (WDT) with its own on-chip RC

oscillator for reliable operation

Programmable code protection

Power saving SLEEP mode

Low power, high speed CMOS FLASH/EEPROM technology

Processor read/write access to program memory

Wide operating voltage range: 2.0V to 5.5V

High Sink/Source Current: 25 mA

Commercial, Industrial and Extended temperature ranges

Low-power consumption:

- < 0.6 mA typical @ 3V, 4 MHz

- 20 A typical @ 3V, 32 kHz

- < 1 A typical standby current

16

7/27/2019 3943

17/49

3.1.3Peripheral Features:

Timer0: 8-bit timer/counter with 8-bit prescaler

Timer1: 16-bit timer/counter with prescaler, Can be incremented during SLEEP

via external Crystal/clock

Timer2: 8-bit timer/counter with 8-bit period Register, prescaler and postscaler

Two Capture, Compare, PWM modules - Capture is 16-bit, max. resolution is

12.5 ns - Compare is 16-bit, max. resolution is 200 ns - PWM max. resolution is

10-bit 10-bit multi-channel Analog-to-Digital converter

Synchronous Serial Port (SSP) with SPI (Master mode) and I2C

(Master/Slave)

Universal Synchronous Asynchronous Receiver Transmitter (USART/SCI) with

9-bit address detection

Parallel Slave Port (PSP) 8-bits wide, with external RD, WR and CS controls

(40/44-pin only)

17

7/27/2019 3943

18/49

3.2 PIC16F877 ARCHITECTURE

Fig 3.2 PIC16F87X Architecture

18

7/27/2019 3943

19/49

3.3 MEMORY ORGANIZATION

There are three memory blocks in each of the PIC16F87X MCUs. The Program

Memory and Data Memory have separate buses so that concurrent access can occur and

is detailed in this section.

3.3.1 Program Memory Organization

The PIC16F87X devices have a 13-bit program counter capable of addressing an

8K x 14 program memory space. The PIC16F877/876 devices have 8K x 14words of

FLASH program memory, and thePIC16F873/874 devices have 4K x 14. Accessing

allocation above the physically implemented address will cause a wraparound. The

RESET vector is at 0000h and the interrupt vectors at 0004h.

Fig 3.3 Program memory organization

19

7/27/2019 3943

20/49

3.3.2 Data EEPROM and Flash Memory

The Data EEPROM and FLASH Program Memory are readable and writable

during normal operation over the entire VDD range. These operations take place on a

single byte for Data EEPROM memory and a single word for Program memory. A write

operation causes an erase-then-write operation to take place on the specified byte or

word. A bulk erase operation may not be issued from user code (which includes

removing code protection).

The EEPROM Data memory is rated for high erase/ writes cycles (specification

D120). The FLASH program memory is rated much lower (specification D130), because

EEPROM data memory can be used to store frequently updated values. An on-chip timer

controls the write time and it will vary with voltage and temperature, as well as from chip

to chip.

The FLASH program memory allows non-intrusive read access, but writes

operations cause the device to stop executing instructions, until the write completes.

When interfacing to the program memory, the EEADRH: EEADR registers form a two-

byte word, which holds the 13-bit address of the memory location being accessed. The

register combination of EEDATH: EEDATA holds the 14-bit data for writes, or reflects

the value of program memory after a read operation. Just as in EEPROM data memory

accesses, the value of the EEADRH: EEADR registers must be within the valid range of

program memory, depending on the device: 0000h to 1FFFh for the PIC16F873/874, or

0000h to 3FFFh for the PIC16F876/877. Addresses outside of this range do not wrap

around to 0000h (i.e., 4000h does not map to 0000h on the PIC16F877)

.

3.4 I/O ports

Some pins for these I/O ports are multiplexed with an alternate function for the

peripheral features on the device. In general, when a peripheral is enabled, that pin may

not be used as a general purpose I/O pin.

20

7/27/2019 3943

21/49

3.4.1 PORTA and the TRISA Register

PORTA is a 6-bit wide, bi-directional port. The corresponding data direction

register is TRISA. Setting a TRISA bit (= 1) will make the corresponding PORTA pin an

input (i.e., put the corresponding output driver in a Hi-Impedance mode). Clearing a

TRISA bit (= 0) will make the corresponding PORTA pin an output (i.e., put the contents

of the output latch on the selected pin).

Reading the PORTA register reads the status of the pins, whereas writing to it will

write to the port latch. All write operations are read-modify-write operations. Therefore, a

write to a port implies that the port pins are read, the value is modified and then written to

the port data latch.

PORTA FUNCTIONS

Name Bit# Buffer Function

RA0/AN0 bit0 TTL Input/output or analog input.



RA3/AN3/VREF bit3 TTL Input/output or analog input or VREF

RA4/T0CKI bit4 ST Input/output or external clock input for Timer0.Output is open drain type.

RA5/SS/AN4 bit5 TTL Input/output or slave select input for synchronous

serial port or analog input.

Table 3.1 Port A functions

3.4.2 PORTB and the TRISB Register

PORTB is an 8-bit wide, bi-directional port. The corresponding data direction

register is TRISB. Setting a TRISB bit (= 1) will make the corresponding PORTB pin an

input (i.e., put the corresponding output driver in a Hi-Impedance mode). Clearing a

TRISB bit (= 0) will make the corresponding PORTB pin an output (i.e., put the contents

of the output latch on the selected pin).

21

7/27/2019 3943

22/49

Three pins of PORTB are multiplexed with the Low Voltage Programming

function: RB3/PGM, RB6/PGC and RB7/PGD. The alternate functions of these pins are

described in the Special Features Section.

PORTB FUNCTIONS


RB0/INT bit0 TTL/ST Input/output pin or external interrupt input. Internal

software programmable weak pull-up.

RB1 bit1 TTL Input/output pin. Internal software programmable

weak pull-up.

RB2 bit2 TTL Input/output pin. Internal software programmable

weak pull-up.

RB3 bit3 TTL Input/output pin or programming pin in LVP mode.

Internal software programmable weak pull-up.

RB4 bit4 TTL Input/output pin (with interrupt-on-change). Internal

software programmable weak pull-up.

RB5 bit5 TTL Input/output pin (with interrupt-on-change). Internalsoftware programmable weak pull-up.

RB6/PGC bit6 TTL/ST Input/output pin (with interrupt-on-change) or In-

Circuit Debugger pin. Internal software programmable

weak pull-up. Serial programming clock.

RB7/PGD bit7 TTL/ST Input/output pin (with interrupt-on-change) or In-

Circuit Debugger pin. Internal software programmable

weak pull-up. Serial programming clock.

Table 3.2 Port B function

22

7/27/2019 3943

23/49

3.4.3PORTC and the TRISC Register

PORTC is an 8-bit wide, bi-directional port. The corresponding data

direction register is TRISC. Setting a TRISC bit (= 1) will make the corresponding

PORTC pin an input (i.e., put the corresponding output driver in a Hi-Impedance mode).

Clearing a TRISC bit (= 0) will make the corresponding PORTC pin an output (i.e., put

the contents of the output latch on the selected pin).

PORTC is multiplexed with several peripheral functions (Table 3-5).

PORTC pins have Schmitt Trigger input buffers.

PORTC FUNCTIONS


RC0/T1OSO/T1CKI bit0 ST Input/output port pin or Timer1 oscillator

output/Timer1 clock input.

RC1/T1OSI/CCP2 bit1 ST Input/output port pin or Timer1 oscillator input

or Capture2 input/ Compare2 output/PWM2

output.

RC2/CCP1 bit2 ST Input/output port pin or Capture1

input/Compare1 output/ PWM1 output.

RC3/SCK/SCL bit3 ST RC3 can also be the synchronous serial clock

for both SPI and I2C modes.

RC4/SDI/SDA bit4 ST RC4 can also be the SPI Data In (SPI mode) or

data I/O (I2C mode).

RC5/SDO bit5 ST Input/output port pin or Synchronous Serial

Port data output.

RC6/TX/CK bit6 ST Input/output port pin or USART Asynchronous

Transmit or Synchronous Clock.

RC7/RX/DT bit7 ST Input/output port pin or USART Asynchronous

Receive or Synchronous Data.

Table 3.3 Port C function

23

7/27/2019 3943

24/49

3.4.4 PORTD and TRISD Register

PORTD and TRISD are not implemented on the PIC16F873 or PIC16F876.

PORTD is an 8-bit port with Schmitt Trigger input buffers. Each pin is individually

configurable as an input or output.

PORTD can be configured as an 8-bit wide microprocessor port (parallel slave

port) by setting control bit PSPMODE (TRISE). In this mode, the input buffers are

TTL.

PORTD FUNCTIONS


RD0/PSP0 bit0 ST/TTL(1) Input/output port pin or parallel slave port

bit0.


bit1.


bit2.


bit3.


bit4.


bit5.


bit6.


bit7.

Table 3.4 Port D function

24

7/27/2019 3943

25/49

3.4.5 PORTE and TRISE Register

PORTE has three pins (RE0/RD/AN5, RE1/WR/AN6, and RE2/CS/AN7) which

are individually configurable as inputs or outputs. These pins have Schmitt Trigger input

buffers

The PORTE pins become the I/O control inputs for the microprocessor port when

bit PSPMODE (TRISE) is set. In this mode, the user must make certain that the

TRISE bits are set, and that the pins are configured as digital inputs. Also ensure

that ADCON1 is configured for digital I/O. In this mode, the input buffers are TTL.

PORT E FUNCTIONS


RE0/RD/AN5 bit0 ST/TTL(1) I/O port pin or read control input in Parallel

Slave Port mode or analog input:RD

1 = Idle

0 = Read operation. Contents of PORTD

register are output to PORTD

I/O pins (if chip selected)

RE1/WR/AN6 bit1 ST/TTL(1) I/O port pin or write control input in ParallelSlave Port mode or analog input:WR

1 = Idle

0 = Write operation. Value of PORTD I/O pins

is latched into PORTD

register (if chip selected)

RE2/CS/AN7 bit2 ST/TTL(1) I/O port pin or chip select control input in

Parallel Slave Port mode or analog input: CS

1 = Device is not selected

0 = Device is selected

Table 3.5 Port E function

25

7/27/2019 3943

26/49

3.4.6 Parallel Slave Port

PORTD operates as an 8-bit wide Parallel Slave Port or microprocessor port,

when control bit PSPMODE (TRISE) is set. In Slave mode, it is asynchronously

readable and writable by the external world through RD control input pin RE0/RD and

WR control input pinRE1/WR.

The PSP can directly interface to an 8-bit micro process or data bus. The external

microprocessor can read or write the PORTD latch as an 8-bit latch. Setting bit

PSPMODE enables port pin RE0/RD to be the RD input, RE1/WR to be the WR input

and RE2/CS to be the CS (chip select) input. For this functionality, the corresponding

data direction bits of the TRISE register (TRISE) must be configured as inputs

(set). The A/D port configuration bits PCFG3:PCFG0 (ADCON1) must be set to

configure pins RE2:RE0 as digital I/

A write to the PSP occurs when both the CS and WR lines are first detected low.

When either the CS or WR lines become high (level triggered), the Input Buffer

Full(IBF) status flag bit (TRISE) is set on the Q4 clock cycle, following the next Q2

cycle, to signal the write is complete (Figure 3-10). The interrupt flag bit PSPIF

(PIR1) is also set on the same Q4 clock cycle. IBF can only be cleared by reading the

PORTD input latch.

A read from the PSP occurs when both the CS and RD lines are first detected low.

The Output Buffer Full(OBF) status flag bit (TRISE) is cleared immediately(Figure

3-11), indicating that the PORTD latch is waiting to be read by the external bus.

3.5 Addressable Universal Synchronous Asynchronous ReceiverTransmitter

[USART]

The Universal Synchronous Asynchronous Receiver Transmitter (USART)

module is one of the two serial I/O modules. (USART is also known as a Serial

Communications Interface or SCI.) The USART can be configured as a full duplex

asynchronous system that can communicate with peripheral devices such as CRT

26

7/27/2019 3943

27/49

terminals and personal computers, or it can be configured as a half duplex synchronous

system that can communicate with peripheral devices such as A/D or D/A integrated

circuits, serial EEPROMs etc. The USART can be configured in the following modes:

i. Asynchronous (full duplex)

ii. Synchronous - Master (half duplex)

iii. Synchronous - Slave (half duplex)

Bit SPEN (RCSTA) and bits TRISC have to be set in order

to configure pins RC6/TX/CK and RC7/RX/DT as the Universal Synchronous

Asynchronous Receiver Transmitter. The USART module also has a multi-processor

communication capability using 9-bit address detection.

3.5.1USART Asynchronous Mode:

In this mode, the USART uses standard non-return-to zero (NRZ) format (one

START bit, eight or nine data bits, and one STOP bit). The most common data format is

8-bits. An on-chip, dedicated, 8-bit baud rate generator can be used to derive standard

baud rate frequencies from the oscillator. The USART transmits and receives the LSB

first. The transmitter and receiver are functionally independent, but use the same data

format and baud rate. The baud rate generator produces a clock, either x16 or x64 of the

bit shift rate, depending on bit BRGH (TXSTA). Parity is not supported by the

hardware, but can be implemented in software (and stored as the ninth data bit).

Asynchronous mode is stopped during SLEEP. Asynchronous mode is selected by

clearing bit SYNC (TXSTA).

The USART Asynchronous module consists of the following important elements:

i. Baud Rate Generator

ii. Sampling Circuit

iii. Asynchronous Transmitter

iv. Asynchronous Receiver

27

7/27/2019 3943

28/49

3.5.2 USART Baud Rate Generator (BRG):

The BRG supports both the Asynchronous and Synchronous modes of the

USART. It is a dedicated 8-bit baud rate generator. The SPBRG register controls the

period of a free running 8-bit timer. In Asynchronous mode, bit BRGH (TXSTA)

also controls the baud rate. Given the desired baud rate and FOSC, the nearest integer

value for the SPBRG register can be calculated using the formula. From this, the error in

baud rate can be determined. It may be advantageous to use the high baud rate (BRGH =

1), even for slower baud clocks. This is because the FOSC/ (16(X + 1)) equation can

reduce the baud rate error in some cases. Writing a new value to the SPBRG register

causes the BRG timer to be reset (or cleared). This ensures the BRG does not wait for a

timer.

3.5.3 USART Asynchronous Transmitter:

The heart of the transmitter is transmitting (serial) shift register (TSR). The shift

register obtains its data from the read/write transmit buffer, TXREG. The TXREG

register is loaded with data in software. The TSR register is not loaded until the STOP bit

has been transmitted from the previous load. As soon as the STOP bit is transmitted, the

TSR is loaded with new data from the TXREG register (if available). Once the TXREG

register transfers the data to the TSR register (occurs in one TCY), the TXREG register is

empty and flag bit TXIF (PIR1) is set. This interrupt can be enabled/disabled by

setting/clearing enable bit TXIE (PIE1). Flag bit TXIF will be set, regardless of the

state of enable bit TXIE and cannot be cleared in software. It will reset only when new

data is loaded into the TXREG register. While flag bit TXIF indicates the status of the

TXREG register, another bit TRMT (TXSTA) shows the status of the TSR register.

Status bit TRMT is a read only bit, which is set when the TSR register is

empty. No interrupt logic is tied to this bit, so the user has to poll this bit in order to

determine if the TSR register is empty. Transmission is enabled by setting enable bit

TXEN (TXSTA). The actual transmission will not occur until the TXREG register

has been loaded with data and the baud rate generator (BRG) has produced a shift clock.

28

7/27/2019 3943

29/49

The transmission can also be started by first loading the TXREG register and then

setting enable bit TXEN. Normally, when transmission is first started, the TSR register

is empty. At that point, transfer to the TXREG register will result in an immediate

transfer to TSR, resulting in an empty TXREG. A back-to-back transfer is thus possible

Clearing enable bit TXEN during a transmission will cause the transmission to be

aborted and will reset the transmitter.

As a result, the RC6/TX/CK pin will revert to hi-impedance. In order to

select 9-bit transmission, transmit bit TX9 (TXSTA) should be set and the ninth bit

should be written to TX9D (TXSTA). The ninth bit must be written before writing

the 8-bit data to the TXREG register. This is because a data write to the TXREG register

can result in an immediate transfer of the data to the TSR register (if the TSR is empty).

In such a case, an incorrect ninth data bit may be loaded in the TSR register.

3.5.4 USART Asynchronous Receiver:

The data is received on the RC7/RX/DT pin and drives the data recovery block.

The data recovery block is actually a high speed shifter, operating at x16 times the baud

rate; whereas, the main receive serial shifter operates at the bit rate or at FOSC. Once

Asynchronous mode is selected, reception is enabled by setting bit CREN (RCSTA).

The heart of the receiver is the receive (serial) shift register (RSR). After sampling the

STOP bit, the received data in the RSR is transferred to the RCREG register (if it is

empty). If the transfer is complete, flag bit RCIF (PIR1) is set. The actual interrupt

can be enabled/disabled by setting/clearing enable bit RCIE (PIE1). Flag bit RCIF is

a read only bit, which is cleared by the hardware. It is cleared when the RCREG register

has been read and is empty.

If the RCREG register is still full, the overrun error bit OERR (RCSTA) will

be set. The word in the RSR will be lost. The RCREG register can be read twice to

retrieve the two bytes in the FIFO. Overrun bit OERR has to be cleared in software. This

is done by resetting the receive logic (CREN is cleared and then set). If bit OERR is set,

transfers from the RSR register to the RCREG register are inhibited, and no further data

29

7/27/2019 3943

30/49

will be received. It is therefore, essential to clear error bit OERR if it is set. Framing error

bit FERR (RCSTA) is set if a STOP bit is detected as clear. Bit FERR and the 9th

receive bit are buffered the same way as the receive data. Reading the RCREG will load

bits RX9D and FERR with new values, therefore, it is essential for the user to read the

RCSTA register before.

3.6 WATCHDOG TIMER (WDT)

The Watchdog Timer is as a free running on-chip RC oscillator which does not

require any external components. This RC oscillator is separate from the RC oscillator of

the OSC1/CLKIN pin. That means that the WDT will run, even if the clock on the

OSC1/CLKIN and OSC2/CLKOUT pins of the device has been stopped, for example, by

execution of a SLEEP instruction. During normal operation, a WDT time-out generates a

device RESET (Watchdog Timer Reset).

If the device is in SLEEP mode, a WDT time-out causes the device to

wake-up and continue with normal operation (Watchdog Timer Wake-up). The TO bit in

the STATUS register will be cleared upon a Watchdog Timer time-out.

The WDT can be permanently disabled by clearing configuration bit

WDTE. WDT time-out period values may be found in the Electrical Specifications

section under parameter #31. Values or the WDT prescaler (actually a postscaler, but

shared with the Timer0 prescaler) may be assigned using the OPTION_REG register.

3.7 Analog to Digital Converter

The analog input charges a sample and hold capacitor. The output of the

sample and hold capacitor is the input into the converter. The converter then generates a

digital result of this analog level via successive approximation. The A/D conversion of

the analog input signal results in a corresponding 10-bit digital number.

The A/D module has four registers. These registers are:

A/D Result High Register (ADRESH)

A/D Result Low Register (ADRESL)

30

7/27/2019 3943

31/49

A/D Control Register 0(ADCON0)

A/D Control Register 1(ADCON1)

3.7.1 Analog to digital Conversion steps

These steps should be followed for doing an A/D Conversion:

1. Configure the A/D module:

Configure analog pins/voltage reference and

digital I/O (ADCON1)

Select A/D input channel (ADCON0)

Select A/D conversion clock (ADCON0)

Turn on A/D module (ADCON0)

2. Configure A/D interrupt (if desired):

Clear ADIF bit

Set ADIE bit

Set PEIE bit

Set GIE bit

3. Wait the required acquisition time.

4. Start conversion:

Set GO/DONE bit (ADCON0)

5. Wait for A/D conversion to complete, by either:

( with interrupts enabled); OR

Waiting for the A/D interrupt

6. Read A/D result register pair

(ADRESH: ADRESL), clear bit ADIF if required.

7. For the next conversion, go to step 1 or step 2, as required.

31

7/27/2019 3943

32/49

3.7.2 A/D BLOCK DIAGRAM

Fig 3.7 A/D converter

32

7/27/2019 3943

33/49

PIC16F877 PINOUT DESCRIPTION

Table 3.6 PINOUT description

33

7/27/2019 3943

34/49

Table 3.6 PINOUT description

34

7/27/2019 3943

35/49

REGISTER FILE MAP

Table 3.7 Register file map

35

7/27/2019 3943

36/49

CHAPTER 4

LCD

4.1 LCD

16 x 2 Character LCD

Fig 4.1 LCD

4.2 FEATURES

5 x 8 dots with cursor

Built-in controller (KS 0066 or Equivalent)

+ 5V power supply (Also available for + 3V)

1/16 duty cycle

B/L to be driven by pin 1, pin 2 or pin 15, pin 16 or A.K (LED)

N.V. optional for + 3V power supply

36

7/27/2019 3943

37/49

4.3 Specifications

Table 4.1. electrical specifications

.4 LCD Pin Configurations4

37

7/27/2019 3943

38/49

Table 4.2 LCD Pin configurations

38

7/27/2019 3943

39/49

CHAPTER 5

MAX 232

5.1 PIN DIAGRAM

5.2 CIRCUIT OPERATION DIAGRAM

39

7/27/2019 3943

40/49

5.3 MAX232(A) DIP Package Pin Layout

Nbr Name Purpose Signal Voltage

Capacitor

Value

MAX232

Capacitor

Value

MAX232A

1 C1++ connector for

capacitor C1

capacitor should

stand at least 16V1F 100nF

2 V+output of

voltage pump

+10V, capacitor

should stand at

least 16V

1F to VCC 100nF to VCC

3 C1- - connector for

capacitor C1

capacitor should


4 C2++ connector for

capacitor C2

capacitor should


5 C2-- connector for

capacitor C2

capacitor should


6 GND Ground 0V 1F to VCC 100nF to VCC

Table 5.1 MAX232 DIP Package Pin Layout

5.4 DESCRIPTION

The MAX232 is a dual driver/receiver that includes a capacitive voltage generator

to supply EIA-232 voltage levels from a single 5-V supply. Each receiver converts EIA-232 inputs to 5-V TTL/CMOS levels. These receivers have a typical threshold of 1.3 V

and a typical hysteresis of 0.5 V, and can accept 30-V inputs. Each driver converts

TTL/CMOS input levels into EIA-232 levels.

40

7/27/2019 3943

41/49

The driver, receiver, and voltage-generator functions are available as cells in the

Texas Instruments LinASIC. Library Meet or Exceed TIA/EIA-232-F and ITU MAX232

. . . D, DW, N, OR NS PACKAGE Recommendation V.28 MAX232I . . . D, DW, OR N

PACKAGE. Operate With Single 5-V Power Supply Operate Up to 120 kbit/S C1+ 1

16VCC .Two Drivers and Two Receivers VS+ 2 15GND C1 3 14 T1OUT.30-V Input

Levels C2+ 4 13 R1IN .Low Supply Current 8 mA Typical C2 5 12 R1OUT .Designed

to be Interchangeable With VS 6 11 T1IN Maxim MAX232 T2OUT 7 10 T2IN.ESD

Protection Exceeds JESD 22 R2IN 8 9 R2OUT 2000-V Human-Body Model (A114-A)

The MAX232 from Maxim was the first IC which in one package contains the

necessary drivers (two) and receivers (also two), to adapt the RS-232 signal voltage

levels to TTL logic. It became popular, because it just needs one voltage (+5V) and

generates the necessary RS-232 voltage levels (approx. -10V and +10V) internally. This

greatly simplified the design of circuitry. Circuitry designers no longer need to design

and build a power supply with three voltages (e.g. -12V, +5V, and +12V), but could just

provide one +5V power supply, e.g. with the help of a simple 78x05 voltage co

5.5 APPLICATIONS

TIA/EIA-232-F

Battery-Powered Systems

Terminals

Modems

Computers

41

7/27/2019 3943

42/49

5.6 FUNCTION TABLE

42

7/27/2019 3943

43/49

CHAPTER 6

CIRCIUT DIAGRAM

6.1 Circuit Diagram

6.2 Power Supply

Circuit diagram

6.2.1 Power supply unit

As we all know any invention of latest technology cannot be activated

without the source of power. So it this fast moving world we deliberately need a proper

power source which will be apt for a particular requirement. All the electronic

components starting from diode to Intel ICs only work with a DC supply ranging from

5v to 12v. We are utilizing for the same, the cheapest and commonly available energy

source of 230v-50Hz and stepping down, rectifying, filtering and regulating the voltage.

This will be dealt briefly in the forth-coming sections.

LCD

43

7/27/2019 3943

44/49

6.2 Power Supply

Circuit diagram

6.2.1 Power supply unit

As we all know any invention of latest technology cannot be activated

without the source of power. So it this fast moving world we deliberately need a proper

power source which will be apt for a particular requirement. All the electronic

components starting from diode to Intel ICs only work with a DC supply ranging from

5v to 12v. We are utilizing for the same, the cheapest and commonly available energysource of 230v-50Hz and stepping down, rectifying, filtering and regulating the voltage.

This will be dealt briefly in the forth-coming sections.

44

7/27/2019 3943

45/49

6.2.2 Step down transformer

When AC is applied to the primary winding of the power transformer it

can either be stepped down or up depending on the value of DC needed. In our circuit the

transformer of 230v/15-0-15v is used to perform the step down operation where a 230V

AC appears as 15V AC across the secondary winding. One alteration of input causes the

top of the transformer to be positive and the bottom negative. The next alteration will

temporarily cause the reverse. The current rating of the transformer used in our project is

2A. Apart from stepping down AC voltages, it gives isolation between the power source

and power supply circuitries.

6.2.3 Rectifier unit

In the power supply unit, rectification is normally achieved using a solid state

diode. Diode has the property that will let the electron flow easily in one direction at

proper biasing condition. As AC is applied to the diode, electrons only flow when the

anode and cathode is negative. Reversing the polarity of voltage will not permit electron

flow.

A commonly used circuit for supplying large amounts of DC power is the bridge

rectifier. A bridge rectifier of four diodes (4*IN4007) are used to achieve full wave

rectification. Two diodes will conduct during the negative cycle and the other two will

conduct during the positive half cycle. The DC voltage appearing across the output

terminals of the bridge rectifier will be somewhat lass than 90% of the applied rms value.

Normally one alteration of the input voltage will reverse the polarities. Opposite ends of

the transformer will therefore always be 180 deg out of phase with each other.

For a positive cycle, two diodes are connected to the positive voltage at the top

winding and only one diode conducts. At the same time one of the other two diodes

conducts for the negative voltage that is applied from the bottom winding due to the

forward bias for that diode. In this circuit due to positive half cycleD1 & D2 will conduct

to give 10.8v pulsating DC. The DC output has a ripple frequency of 100Hz. Since each

altercation produces a resulting output pulse, frequency = 2*50 Hz. The output obtained

is not a pure DC and therefore filtration has to be done.

45

7/27/2019 3943

46/49

6.2.4 Filtering unit

Filter circuits which are usually capacitors acting as a surge arrester always

follow the rectifier unit. This capacitor is also called as a decoupling capacitor or a

bypassing capacitor, is used not only to short the ripple with frequency of 120Hz to

ground but also to leave the frequency of the DC to appear at the output. A load resistor

R1 is connected so that a reference to the ground is maintained. C1R1 is for bypassing

ripples. C2R2 is used as a low pass filter, i.e. it passes only low frequency signals and

bypasses high frequency signals. The load resistor should be 1% to 2.5% of the load.

1000f/25v : for the reduction of ripples from the pulsating.

10f/25v : for maintaining the stability of the voltage at the load side.

O, 1f : for bypassing the high frequency disturbances.

6.2.5 Voltage Regulators

The voltage regulators play an important role in any power supply unit. The

primary purpose of a regulator is to aid the rectifier and filter circuit in providing a

constant DC voltage to the device. Power supplies without regulators have an inherent

problem of changing DC voltage values due to variations in the load or due tofluctuations in the AC liner voltage. With a regulator connected to the DC output, the

voltage can be maintained within a close tolerant region of the desired output. IC7812

and 7912 is used in this project for providing +12v and 12v DC supply.

46

7/27/2019 3943

47/49

CHAPTER 7

FEATURES AND BENEFITS

7.1 Benefits of EMS.

Improves data accuracy and no human error in the data collection

Enables analyze the Maintenance schedules for the equipment

Monitoring power to determine usage and demand profiles

Enables to record the daily sequences of events and Power quality

Identify the Electrical equipment that is not efficient

Determine root causes of electrical problems

Analyze the capacity utilization of the entire electrical distribution system

Analyze the Poor power quality problems, like voltage sags and swells

Accurate demand prediction and Load Shifting is possible

Reduces the trouble shooting, switching errors and maintenance work

Because of centralized Power analysis, better utilization of manpower and cost

reduction

7.2Features

Remotely connect / dis-connect power supply through meter. Monitor power at each premise to know the power consumption.

Consistent and granular data for improved accuracy.

Digital display of information.

7.3 Customer Benefits:

Smart automated process instead of manual work.

Accurate information from the network load to optimize maintenance and

investments.

Customized rates and billing dates

Streamlined high bill investigations.

Automatic outage information and faster recovery.

Better and faster customer service.

47

7/27/2019 3943

48/49

CHAPTER 8

CONCLUSION

Conclusion

Through this project we can remotely connect and disconnect the power

supply through mobile as well we can have the status of the meter from anywhere of the

globe. It is a smart automated process instead of manual work which provides accurate

information from the network load.

We can monitor power at each premise to know the power consumption.

Certain modifications provide Outage information and Revenue protection in industriallevel.

By doing this project, we have gained invaluable knowledge on wireless

communication (GSM) and PIC microcontroller.

48

7/27/2019 3943

49/49

REFERENCE

1. www.microchip.com, PIC16F877 datasheet.

2. JOHN B.PEATMAN, Design with PIC Microcontrollers,Pearson Education.

3. www.wikipedia.com, GSM modem.

Documents

3943