14-AssemblyII

CMSC 216

Introduction to Computer Systems

Assembly II

CMSC 216 - Slides developed by Wood, Sussman, Herman, Plane, and other

UMCP CS faculty.

Announcements

• Start reading Bryant and O’Hallaron Chapter

3 (IA-32 instruction set architecture) and 4.1

(Y86 subset)

2

Y86 integer instructions Instruction Effect Description Example

addl S,D Reg[D] ← Reg[D] + Reg[S] Addition addl %eax,%ebx

subl S,D Reg[D] ← Reg[D] - Reg[S] Subtract subl %eax,%ebx

andl S,D Reg[D] ← Reg[D] & Reg[S] Bitwise AND andl %eax,%ebx

xorl S,D Reg[D] ← Reg[D] ^ Reg[S] Bitwise XOR xor %eax,%ebx

multl S,D Reg[D] ← Reg[D] * Reg[S] Multiplication* multl %eax,%ebx

divl S,D Reg[D] ← Reg[D] / Reg[S] Integer division* divl %eax,%ebx

modl S,D Reg[D] ← Reg[D] % Reg[S] Remainder* modl %eax,%ebx

3

• All these instructions operate on two integers, and set the condition code flags appropriately

• Example:

irmovl $2,%eax

irmovl $8,%ebx

divl %eax, %ebx # %ebx will have 4

• Notice that only registers are used

• Instructions marked with an asterisk (*) are extensions to Y86 we've added to the ones in

the book

Integer instruction example • Example: divl.ys

• Assembler output:

0x000: 308002000000 | irmovl $2,%eax # a = 2

0x006: 308308000000 | irmovl $8,%ebx # b = 8

0x00c: 6503 | divl %eax,%ebx # b = b / a

0x00e: f308 | wrint %eax # printing a

0x010: 308120000000 | irmovl $32,%ecx # 32 == ' '

0x016: f118 | wrch %ecx # printing space

0x018: f338 | wrint %ebx # printing b

0x01a: 30810a000000 | irmovl $10,%ecx # 10 == '\n'

0x020: f118 | wrch %ecx

0x022: 10 | halt

• Simulator run:

2 4

...

• Notice these instructions are destructive; they overwrite the second operand

– Need to make copies if you need old values

4

Condition codes

• Performing integer operations causes various flags

to be set, describing the attributes of the result of the

operation

• These are used by other, subsequent instructions to

perform conditional branching

• The three we are concerned with are:

– OF: overflow flag; did the operation overflow?

– SF: sign flag; is the result negative?

– ZF: zero flag; is the result zero?

5

Branch instructions • These are used to perform the effect of if statements, loops,

and switches

• When encountered, if a certain condition is true, control flow will then go to the address specified, rather than advancing to the next instruction

– The address of the next instruction to be executed is held in the program counter; in many architectures, this is held in an accessible register (not so with Y86).

• Labels

– We use labels (name followed by colon) to represent target addresses

– When the assembler encounters a label (e.g., Loop:), the address of the labeled instruction is used by the assembler to replace all references to that label in the program

– Labels do not need to be declared before use

6

Y86 branch instructions Instruction Branch if... Description

jmp Label 1 Unconditional jump

jle Label (SF ^ OF) | ZF Jump if less than or equal to zero

jl Label SF ^ OF Jump if less than zero

je Label ZF Jump if equal to zero

jne Label ~ZF Jump if not equal to zero

jge Label ~(SF ^ OF) Jump if greater than or equal to zero

jg Label ~(SF ^ OF) & ~ZF Jump if greater than zero

7

• Each instruction relies on the condition codes set by

the most recent integer instruction

• Since assembly has no else statements, we need to use

branching + code reorganization to get if/else

• Consider the following C code:

if (a == b)

printf(“Y");

else

printf(“N");

printf("\n");

8

if (a == b)

goto Equal;

printf(“N");

goto EndIf;

Equal:

printf(“Y");

EndIf:

printf("\n");

Translating branches

Translating branches, cont.

• We can then take the labeled C code and translate it in a

fairly straightforward fashion:

• Example: If.ys

• Assembler Output

0x000: f208 | rdint %eax # reading a

0x002: f238 | rdint %ebx # reading b

0x004: 6130 | subl %ebx, %eax # we are overwriting %eax

0x006: 7318000000 | je Equal

0x00b: 30814e000000 | irmovl $78, %ecx # else block, 78 --> N

0x011: f118 | wrch %ecx

0x013: 7020000000 | jmp EndIf

0x018: 308159000000 | Equal: irmovl $89, %ecx # true block case, 89 --> Y

0x01e: f118 | wrch %ecx

0x020: 30820a000000 | EndIf: irmovl $10, %edx # 10 --> newline

0x026: f128 | wrch %edx

0x028: 10 | halt

9

Branch Example

• Example: If2.ys

– if (a >= b) print a else print b

• Assembler output: 0x000: f208 | rdint %eax # reading a

0x002: f238 | rdint %ebx # reading b

0x004: 2001 | rrmovl %eax, %ecx # making copy of %eax

0x006: 6131 | subl %ebx, %ecx # no longer overwriting %eax

0x008: 7514000000 | jge Equal

0x00d: f338 | wrint %ebx # else block

0x00f: 7016000000 | jmp EndIf

0x014: f308 | Equal: wrint %eax # true block

0x016: 30820a000000 | EndIf: irmovl $10, %edx # newline

0x01c: f128 | wrch %edx

0x01e: 10 | halt

• Simulator output: 4

3

4

Stopped in 9 steps at PC = 0x1f. Exception 'HLT', CC Z=0 S=0 O=0

10

Translating C to Y86

• This process is not always straightforward

• Even simple statements like “c = a * b;" can require

several instructions:

mrmovl A, %eax

mrmovl B, %ebx

multl %eax, %ebx

rmmovl %ebx, C

11

Register spilling

• We only have a limited number of registers

• What happens if we need to keep more than 8

values around at once?

• If we run out of registers to store our data, we need

to use memory to store values

• We can use the stack or define static arrays (as we'll

see later)

12

Translating loops

• What about C code like this?

do {

...

} while (condition);

• This can be translated simply:

Loop: # begin loop body

# evaluate condition

jumpCondition Loop # jump back if true

• Note that you can use whatever jumpCondition (e.g., jle, je,

etc.) instruction/condition is appropriate

• Example: doWhile.ys

13

do While Example • Example: doWhile.ys


0x000: f208 | rdint %eax # loop limit

0x002: 308301000000 | irmovl $1, %ebx # iteration variable

0x008: 308101000000 | irmovl $1, %ecx # increment

|

0x00e: f338 | Loop: wrint %ebx # writing value

0x010: 308220000000 | irmovl $32, %edx # printing blank character

0x016: f128 | wrch %edx

|

0x018: 6013 | addl %ecx, %ebx # incrementing by 1

0x01a: 2032 | rrmovl %ebx, %edx # making copy

0x01c: 6102 | subl %eax, %edx

0x01e: 710e000000 | jle Loop # jump back

|

0x023: 30820a000000 | EndLoop: irmovl $10, %edx # newline character

0x029: f128 | wrch %edx

0x02b: 10 | halt


1 2 3 4 5

Stopped in 41 steps at PC = 0x2c. Exception 'HLT', CC Z=0 S=0 O=0

…

14

Translating while loops • while loops are a bit different; but these can be written as do-while loops, with a little modification

while (cond) {

task();

}

if (cond) {

do {

task();

} while(condition);

}

if (!cond) {

jump EndLoop

}

do {

task()

} while(cond):

EndLoop:

15

eval cond

jump EndLoop if !cond

Loop:

task()

eval cond

jump to Loop if cond

EndLoop:

while Example • Example: while.ys


0x000: f208 | rdint %eax # loop limit

0x002: 308301000000 | irmovl $1, %ebx # iteration variable

0x008: 308101000000 | irmovl $1, %ecx # increment variable

|

0x00e: 2032 | rrmovl %ebx, %edx

0x010: 6102 | subl %eax, %edx

0x012: 762c000000 | jg EndLoop

|

0x017: f338 | Loop: wrint %ebx # writing value

0x019: 308620000000 | irmovl $32, %esi # printing blank character

0x01f: f168 | wrch %esi

|

0x021: 6013 | addl %ecx, %ebx # incrementing by 1

0x023: 2032 | rrmovl %ebx, %edx

0x025: 6102 | subl %eax, %edx

0x027: 7117000000 | jle Loop

|

0x02c: 30810a000000 | EndLoop: irmovl $10, %ecx # newline character

0x032: f118 | wrch %ecx

0x034: 10 | halt


1 2 3

Stopped in 30 steps at PC = 0x35. Exception 'HLT', CC Z=0 S=0 O=0

…

16

Translating for loops

• For loops are very similar to while loops; we can use this fact to convert a for loop into a form we know how to work with

• How do we convert this into a while loop?

for (init; cond; incr)

body;

init;

while (cond) {

body;

incr;

}

17

Examples

• Example: sum.ys

• Example: arraySum.ys

18

Factorial example

• Consider the following program: #include <stdio.h>

int main() {

int i, f, n;

scanf("%d", &n);

f = 1;

i = 1;

while (i <= n)

f *= i++;

printf("%d\n", f);

return 0;

}

• How would we convert this to a Y86 program?

19

Translating our factorial example

• Because we only have three variables, we can get

away with doing all our work in registers, rather than

storing things in memory

• The scanf() and printf() calls can be easily replaced

by rdint and wrint/wrch instructions

• The main work involved here is just translating the

while loop to the do-while format we need to convert

to assembly

20

Translated into goto-code #include <stdio.h>

int main() {

int i, f, n;

scanf("%d", &n);

f = 1;

i = 1;

if (i > n)

goto EndWhile;

Loop:

f *= i++;

if (i <= n)

goto Loop;

EndWhile:

printf("%d\n", f);

return 0;

}

21

Breaking apart compound statements #include <stdio.h>

int main() {

int i, f, n;

scanf("%d", &n);

f = 1;

i = 1;

if (i > n)

goto EndWhile;

Loop:

f *= i++;

if (i <= n)

goto Loop;

EndWhile:

printf("%d\n", f);

return 0;

}

22


int main() {

int i, f, n;

scanf("%d", &n);

f = 1;

i = 1;

if (i > n)

goto EndWhile;

Loop:

f = f * i++;

if (i <= n)

goto Loop;

EndWhile:

printf("%d\n", f);

return 0;

}

23


int main() {

int i, f, n;

scanf("%d", &n);

f = 1;

i = 1;

if (i > n)

goto EndWhile;

Loop:

f = f * i;

i = i + 1;

if (i <= n)

goto Loop;

EndWhile:

printf("%d\n", f);

return 0;

}

24

Beginning "compilation"

• We'll map registers to variables: %eax for i, %ebx

for f, and %ecx for n

– Remember why we can do this here?

• Now, let's translate all the non-branches into the

assembly code we know.

25

Starting compilation #include <stdio.h>

int main() {

int i, f, n;

scanf("%d", &n);

f = 1;

i = 1;

if (i > n)

goto EndWhile;

Loop:

f = f * i;

i = i + 1;

if (i <= n)

goto Loop;

EndWhile:

printf("%d\n", f);

return 0;

}

rdint %ecx

irmovl $1,%ebx

irmovl $1,%eax

if (%eax > %ecx)

goto EndWhile;

Loop: multl %eax,%ebx

irmovl $1,%edi

addl %edi,%eax

if (%eax <= %ecx)

goto Loop;

EndWhile: wrint %ebx

irmovl $10,%edi

wrch %edi

halt

26

Writing branches

• To change the conditional jumps, we'll have to

remember a few things:

– we'll need to operate on copies of our data;

this means we'll need to use an extra

register

– we'll need to perform an arithmetic

operation before the jump

– we need to select the correct jump

instruction to operate correctly

27

Starting compilation rdint %ecx

irmovl $1,%ebx

irmovl $1,%eax

if (%eax > %ecx)

goto EndWhile;


irmovl $1,%edi

addl %edi,%eax

if (%eax <= %ecx)

goto Loop;


irmovl $10,%edi

wrch %edi

halt

rdint %ecx

irmovl $1,%ebx

irmovl $1,%eax

rrmovl %eax,%edi

subl %ecx,%edi

jg EndWhile


irmovl $1,%edi

addl %edi,%eax

if (%eax <= %ecx)

goto Loop;


irmovl $10,%edi

wrch %edi

halt

28

Starting compilation rdint %ecx

irmovl $1,%ebx

irmovl $1,%eax

if (%eax > %ecx)

goto EndWhile;


irmovl $1,%edi

addl %edi,%eax

if (%eax <= %ecx)

goto Loop;


irmovl $10,%edi

wrch %edi

halt

rdint %ecx

irmovl $1,%ebx

irmovl $1,%eax

rrmovl %eax,%edi

subl %ecx,%edi

jg EndWhile


irmovl $1,%edi

addl %edi,%eax

rrmovl %eax,%edi

subl %ecx,%edi

jle Loop


irmovl $10,%edi

wrch %edi

halt

29

A working Y86 program (factorial.ys) rdint %ecx # scanf("%d", &n);

irmovl $1,%ebx # f = 1;

irmovl $1,%eax # i = 1;

rrmovl %eax,%edi # tmp = i;

subl %ecx,%edi # tmp -= n;

jg EndWhile # if (tmp > 0) goto EndWhile;

Loop: multl %eax,%ebx # f *= i;

irmovl $1,%edi # tmp = 1;

addl %edi,%eax # i += tmp;

rrmovl %eax,%edi # tmp = i;

subl %ecx,%edi # tmp -= n;

jle Loop # if (tmp <= 0) goto Loop;

EndWhile: wrint %ebx # printf("%d", f);

irmovl $10,%edi # tmp = '\n';

wrch %edi # printf("%c", tmp);

halt # return 0;

30

Assembly 0x000: f218 | rdint %ecx

0x002: 308301000000 | irmovl $1,%ebx

0x008: 308001000000 | irmovl $1,%eax

0x00e: 2007 | rrmovl %eax,%edi

0x010: 6117 | subl %ecx,%edi

0x012: 762a000000 | jg EndWhile

|

0x017: 6403 | Loop: multl %eax,%ebx

0x019: 308701000000 | irmovl $1,%edi

0x01f: 6070 | addl %edi,%eax

0x021: 2007 | rrmovl %eax,%edi

0x023: 6117 | subl %ecx,%edi

0x025: 7117000000 | jle Loop

|

0x02a: f338 | EndWhile: wrint %ebx

0x02c: 30870a000000 | irmovl $10,%edi

0x032: f178 | wrch %edi

0x034: 10 | halt

31

The program in memory

0x00: f2 18 30 83 01 00 00 00

0x08: 30 80 01 00 00 00 20 07

0x10: 61 17 76 2a 00 00 00 64

0x18: 03 30 87 01 00 00 00 60

0x20: 70 20 07 61 17 71 17 00

0x28: 00 00 f3 38 30 87 0a 00

0x30: 00 00 f1 78 10 00 00 00

32

Assembly 0x000: f218 | rdint %ecx

0x002: 308301000000 | irmovl $1,%ebx

0x008: 308001000000 | irmovl $1,%eax

0x00e: 2007 | rrmovl %eax,%edi

0x010: 6117 | subl %ecx,%edi

0x012: 762a000000 | jg EndWhile

|

0x017: 6403 | Loop: multl %eax,%ebx

0x019: 308701000000 | irmovl $1,%edi

0x01f: 6070 | addl %edi,%eax

0x021: 2007 | rrmovl %eax,%edi

0x023: 6117 | subl %ecx,%edi

0x025: 7117000000 | jle Loop

|

0x02a: f338 | EndWhile: wrint %ebx

0x02c: 30870a000000 | irmovl $10,%edi

0x032: f178 | wrch %edi

0x034: 10 | halt

33

Assembly 0x000: | rdint %ecx

0x002: | irmovl $1,%ebx

0x008: | irmovl $1,%eax

0x00e: | rrmovl %eax,%edi

0x010: | subl %ecx,%edi

0x012: | jg EndWhile

|

0x017: | Loop: multl %eax,%ebx

0x019: | irmovl $1,%edi

0x01f: | addl %edi,%eax

0x021: | rrmovl %eax,%edi


0x025: | jle Loop

|

0x02a: | EndWhile: wrint %ebx

0x02c: | irmovl $10,%edi

0x032: | wrch %edi

0x034: | halt

34

Label Translation 0x000: | rdint %ecx





0x012: | jg 0x2a

|






0x025: | jle 0x17

|



0x032: | wrch %edi

0x034: | halt

35

Final Factorial Program 0x000: | rdint %ecx





0x012: | jg 0x2a

|






0x025: | jle 0x17

|



0x032: | wrch %edi

0x034: | halt

36

Execution 0x000: | rdint %ecx





0x012: | jg 0x2a

0x017: | multl %eax,%ebx





0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 0

%ecx 0

%edx 0

%ebx 0

%esp 0

%ebp 0

%esi 0

%edi 0

37

PC 0x000

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 0

%ecx 0

%edx 0

%ebx 0

%esp 0

%ebp 0

%esi 0

%edi 0

38

PC 0x002

CC: ZF 0

CC: SF 0

CC: OF 0

Input is: 4






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 0

%ecx 4

%edx 0

%ebx 0

%esp 0

%ebp 0

%esi 0

%edi 0

39

PC 0x002

CC: ZF 0

CC: SF 0

CC: OF 0

Input is: 4






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 0

%ecx 4

%edx 0

%ebx 0

%esp 0

%ebp 0

%esi 0

%edi 0

40

PC 0x008

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 0

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi 0

41

PC 0x008

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 0

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi 0

42

PC 0x00e

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 1

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi 0

43

PC 0x00e

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 1

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi 0

44

PC 0x010

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 1

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi 1

45

PC 0x010

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 1

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi 1

46

PC 0x012

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 1

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi -3

47

PC 0x012

CC: ZF 0

CC: SF 1

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 1

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi -3

48

PC 0x017

CC: ZF 0

CC: SF 1

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 1

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi -3

49

PC 0x017

CC: ZF 0

CC: SF 1

CC: OF 0

jg:

~(SF ^ OF) & ~ZF = 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 1

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi -3

50

PC 0x019

CC: ZF 0

CC: SF 1

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 1

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi -3

51

PC 0x019

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 1

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi -3

52

PC 0x01f

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 1

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi 1

53

PC 0x01f

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 1

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi 1

54

PC 0x021

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 2

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi 1

55

PC 0x021

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 2

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi 1

56

PC 0x023

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 2

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi 2

57

PC 0x023

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 2

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi 2

58

PC 0x025

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 2

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi -2

59

PC 0x025

CC: ZF 0

CC: SF 1

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 2

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi -2

60

PC 0x02a

CC: ZF 0

CC: SF 1

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 2

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi -2

61

PC 0x017

CC: ZF 0

CC: SF 1

CC: OF 0

jle:

(SF ^ OF) | ZF = 1






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 2

%ecx 4

%edx 0

%ebx 1

%esp 0

%ebp 0

%esi 0

%edi -2

62

PC 0x019

CC: ZF 0

CC: SF 1

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 2

%ecx 4

%edx 0

%ebx 2

%esp 0

%ebp 0

%esi 0

%edi -2

63

PC 0x019

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 2

%ecx 4

%edx 0

%ebx 2

%esp 0

%ebp 0

%esi 0

%edi -2

64

PC 0x01f

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 2

%ecx 4

%edx 0

%ebx 2

%esp 0

%ebp 0

%esi 0

%edi 1

65

PC 0x01f

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 2

%ecx 4

%edx 0

%ebx 2

%esp 0

%ebp 0

%esi 0

%edi 1

66

PC 0x021

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 3

%ecx 4

%edx 0

%ebx 2

%esp 0

%ebp 0

%esi 0

%edi 1

67

PC 0x021

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 3

%ecx 4

%edx 0

%ebx 2

%esp 0

%ebp 0

%esi 0

%edi 1

68

PC 0x023

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 3

%ecx 4

%edx 0

%ebx 2

%esp 0

%ebp 0

%esi 0

%edi 3

69

PC 0x023

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 3

%ecx 4

%edx 0

%ebx 2

%esp 0

%ebp 0

%esi 0

%edi 3

70

PC 0x025

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 3

%ecx 4

%edx 0

%ebx 2

%esp 0

%ebp 0

%esi 0

%edi -1

71

PC 0x025

CC: ZF 0

CC: SF 1

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 3

%ecx 4

%edx 0

%ebx 2

%esp 0

%ebp 0

%esi 0

%edi -1

72

PC 0x02a

CC: ZF 0

CC: SF 1

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 3

%ecx 4

%edx 0

%ebx 2

%esp 0

%ebp 0

%esi 0

%edi -1

73

PC 0x017

CC: ZF 0

CC: SF 1

CC: OF 0

jle:

(SF ^ OF) | ZF = 1






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 3

%ecx 4

%edx 0

%ebx 2

%esp 0

%ebp 0

%esi 0

%edi -1

74

PC 0x019

CC: ZF 0

CC: SF 1

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 3

%ecx 4

%edx 0

%ebx 6

%esp 0

%ebp 0

%esi 0

%edi -1

75

PC 0x019

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 3

%ecx 4

%edx 0

%ebx 6

%esp 0

%ebp 0

%esi 0

%edi -1

76

PC 0x01f

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 3

%ecx 4

%edx 0

%ebx 6

%esp 0

%ebp 0

%esi 0

%edi 1

77

PC 0x01f

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 3

%ecx 4

%edx 0

%ebx 6

%esp 0

%ebp 0

%esi 0

%edi 1

78

PC 0x021

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 4

%ecx 4

%edx 0

%ebx 6

%esp 0

%ebp 0

%esi 0

%edi 1

79

PC 0x021

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 4

%ecx 4

%edx 0

%ebx 6

%esp 0

%ebp 0

%esi 0

%edi 1

80

PC 0x023

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 4

%ecx 4

%edx 0

%ebx 6

%esp 0

%ebp 0

%esi 0

%edi 4

81

PC 0x023

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 4

%ecx 4

%edx 0

%ebx 6

%esp 0

%ebp 0

%esi 0

%edi 4

82

PC 0x025

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 4

%ecx 4

%edx 0

%ebx 6

%esp 0

%ebp 0

%esi 0

%edi 0

83

PC 0x025

CC: ZF 1

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 4

%ecx 4

%edx 0

%ebx 6

%esp 0

%ebp 0

%esi 0

%edi 0

84

PC 0x02a

CC: ZF 1

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 4

%ecx 4

%edx 0

%ebx 6

%esp 0

%ebp 0

%esi 0

%edi 0

85

PC 0x017

CC: ZF 1

CC: SF 0

CC: OF 0

jle:

(SF ^ OF) | ZF = 1






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 4

%ecx 4

%edx 0

%ebx 6

%esp 0

%ebp 0

%esi 0

%edi 0

86

PC 0x019

CC: ZF 0

CC: SF 1

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 4

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 0

87

PC 0x019

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 4

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 0

88

PC 0x01f

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 4

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 1

89

PC 0x01f

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 4

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 1

90

PC 0x021

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 1

91

PC 0x021

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 1

92

PC 0x023

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 5

93

PC 0x023

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 5

94

PC 0x025

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 1

95

PC 0x025

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 1

96

PC 0x02a

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 1

97

PC 0x02a

CC: ZF 0

CC: SF 0

CC: OF 0

jle:

(SF ^ OF) | ZF = 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 1

98

PC 0x02c

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 1

99

PC 0x02c

CC: ZF 0

CC: SF 0

CC: OF 0

Output is: 24






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 1

100

PC 0x032

CC: ZF 0

CC: SF 0

CC: OF 0

Output is: 24






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 10

101

PC 0x032

CC: ZF 0

CC: SF 0

CC: OF 0

Output is: 24






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 10

102

PC 0x034

CC: ZF 0

CC: SF 0

CC: OF 0

Output is: 24






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 10

103

PC 0x034

CC: ZF 0

CC: SF 0

CC: OF 0

Output is: 24






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 10

104

PC 0x035

CC: ZF 0

CC: SF 0

CC: OF 0






0x012: | jg 0x2a






0x025: | jle 0x17

0x02a: | wrint %ebx


0x032: | wrch %edi

0x034: | halt

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 10

105

PC 0x035

CC: ZF 0

CC: SF 0

CC: OF 0 Done!

Execution

• These are the final

states of the PC, CC,

and all the registers.

• Does this agree with what yis tells us?

• Remember, numbers

are printed in hex, so

1010 = a16, 2410 = 1816

Register

name Value

%eax 5

%ecx 4

%edx 0

%ebx 24

%esp 0

%ebp 0

%esi 0

%edi 10

106

PC 0x035

CC: ZF 0

CC: SF 0

CC: OF 0

Execution

• Yes: $ echo 4 | yis factorial.yo

24

Stopped in 34 steps at PC = 0x35. Exception 'HLT', CC Z=0 S=0 O=0

Changes to registers:

%eax: 0x00000000 0x00000005

%ecx: 0x00000000 0x00000004

%ebx: 0x00000000 0x00000018

%edi: 0x00000000 0x0000000a

Changes to memory:

107

Some other notes

• Exceptions

– If your code exits due to a halt instruction, the

exception will be HLT (which is fine)

– You can also stop your code prematurely by

passing a second parameter (max steps) to yis;

this will usually result in the exception AOK

– But if you manage to move to a bad address

(forget to halt?), divide by zero, or just make the

simulator otherwise unhappy, you'll get a different

exception (e.g., ADR or INS)

108

Program efficiency

• Our assembly program was not as efficient as it

could be

– we could have optimized away the need for the

variable i by simply decrementing n until n was 0

– we also could have been smarter with our

registers, and not overwritten the constant value

we used repeatedly (1)

• These things need to be taken into consideration by

compilers, and by you in the assembly code you’re

writing for the project...

109

Documents

14-AssemblyII