11/20/2015CST 352 - Operating Systems1 Operating Systems CST 352 Memory Management

04/20/23 CST 352 - Operating Systems 1

Operating Systems

CST 352

Memory Management


Topics

Introduction

Definitions

Fixed Partitions

Multiprogramming Modeling

Process Relocation

Swapping

Virtual Memory

Segmentation


Introduction

Memory management deals with handling all memory resident in a computer system.

Current systems have memory ranging from:

High speed/low volume (expensive)Low speed/high volume (cheap)


Introduction

Cost Speed

InboardRegistersCacheMain Memory

Outboard StorageMagnetic DiskCD-ROMCD-RWDVD + RW

Off-Line StorageMagnetic TapeMOWORM

Capacity

Arrow direction depicts increase


Introduction

Memory Management:What is the best policy to deal with the speed/volume/cost issues associated with memory management?

CPU DiskMain

MemoryCache

WordTransfer

BlockTransfer

BlockTransfer


Introduction

Memory Management deals in tradeoffs:How does a typical process in your system behave?Do processes need to run “simultaneously”?What is the typical size of a process?What type of constraints will be imposed on processes running in your system?What constraints have been “architected” into the system?Etc.


Definitions

Monoprogramming – one process is run at a time till completion.

Multiprogramming – more than one process is resident in the system and must share memory as a resource.

Relocation – moving a process from one physical memory address space to another.

Swapping – moving the entire state of a process (PCB, run-time stack, data segment, code segment) from physical memory to an area on disk.


Definitions

Virtual Memory – providing an address space larger than the physical address space in a system.

Page – a contiguous address space that makes up a division of a virtual address space.


Definitions

Notes:Don’t get memory management confused to programmatic use of new/malloc and delete/free.Heap management (new/malloc, free/delete) is a subset of the overall memory management problem.Heap management is relative to processes at run time.Memory management deals with process creation, relocation, and run-time behavior.


Fixed Partitions

Divide memory up into “n” partitions.Each partition has a fixed size

Not necessarily the same size.

As “processes create” requests are made, they are put in a queue.The system checks for free memory.When a memory block becomes available that will fit the first process in the queue, create the new process.


Fixed Partitions

A potential fixed partition layout for 64K of physical RAM.

0x0000

0x2000

0xFFFF

64 K RAM (65535 bytes)

0x5000

OS

12 1K Partitions

8 2K Partitions

0x9000

4 3K Partition

0xC000

4 4K Partition


Fixed Partitions

When each process is createdLoad the process into memory

Create a PCB

Create a stack

Create a data and code segment

Place the new process in the suspend state.


Fixed Partitions

Two allocation schemes:

1. Provide multiple process create queues. Processes are added to the queue that is larger than the process required physical address.

2. Provide a single process create queue. Processes are taken from the queue when a memory partition becomes available that will fit the process.


Fixed Partitions

Fixed Partitions – Multiple Queues

0x00000x0000

0x20000x2000

0xFFFF0xFFFF


0x50000x5000

OS

12 1K Partitions

8 2K Partitions

0x90000x9000

4 3K Partition0xC000

0xC000

4 4K Partition4 K Queue

3 K Queue

2 K Queue

1 K Queue

Load

Cre

ate

PC

B


Fixed Partitions

Fixed Partitions – Single Queues

0x00000x0000

0x20000x2000

0xFFFF0xFFFF


0x50000x5000

OS

12 1K Partitions

8 2K Partitions

0x90000x9000

4 3K Partition0xC000

0xC000

4 4K Partition

PCB Queue

Load

Cre

ate

PC

B


Fixed Partitions

Q:

1. What is the difference between switching and swapping (…from an Operating Systems perspective)?



CPU Utilization in a multiprogramming environment can be modeled as using a probability model.

Assume a process spends a fraction of it’s time waiting for I/O (p).



The probability that all processes are waiting for I/O is:

pn , n = number of processes in the system.

n is known as the “degree of multiprogramming.

e.g.:pn = probability CPU is idle.



Therefore, the probability the CPU is utilized is:

CPU Utilization = 1 – pn


Multiprogramming ModelingCPU Utilization = 1 – pn

If processes spend 80% (.80) of their time waiting for I/O (I/O bound) and there are 5 process in the system:

CPU Utilization = 1 – (.8)5

= 1 – 0.32768

= 0.67232

= 67%



0.000

0.200

0.400

0.600

0.800

1.000

1.200

1 2 3 4 5 6 7 8 9 10 11

Degree of Multiprogramming

CP

U U

tiliz

ati

on

10% I/O Wait

20% I/O Wait

30% I/O Wait

40% I/O Wait

50% I/O Wait

60% I/O Wait

70% I/O Wait

80% I/O Wait

90% I/O Wait

100% I/O Wait



This simple model can be used to study system tuning.

Example:I have 16 Mbytes of RAM

On Average, my system runs 8 processes.

My OS takes up 4 Mbytes of memory.



Example: (cont’d)My processes are as follows

2 processes that are 80% I/O bound and take up 2 Mbytes each.

2 processes that are 50% I/O bound and take up 4 Mbytes each.

4 processes that are 20% I/O bound and take up 2 Mbytes of memory.



Example: (cont’d)Should I purchase more memory for this system? If so, how much RAM should I purchase?



Example: Solution1. First consider the process parameters:

a. 16 Mbytes of memory – 4 Mbytes for OS = 12 Mbytes available for processes.

b. Worse Case:i. Both 50% 4 Mbyte processes are in memory.ii. Both 80% 2 Mbyte processes are in memory.CPU Utilization = 1 – (.8)2 * (.5)2

= 1 – 0.16 = 0.84 = 84%



Example: Solution1. First consider the process parameters

(cont’d):c. Best Case:

i. One 50% 4 Mbyte process is in memory.ii. Four 20% 2 Mbyte processes are in memory.CPU Utilization = 1 – (.5) * (.2)4

= 1 – 0.00064 = 0.99936 = 99.936%



Example: Solution

1. First consider the process parameters (cont’d):

d. Average Case:(99.936% + 84%) / 2 = 91.96%



Example: Solution2. Calculate Utilization for buying 8

more Mbytes of RAM to accommodate all processes.

CPU Utilization = 1 – (.5)2 * (.2)4 * (.8)2

= 1 – 0.0064

= 0.9936 = 99.36%



Example: Solution2. Cont’d

CPU Utilization Difference = 99.36% – 91.96% = 7.4%

8 Mbytes of RAM = = 7.4% CPU Utilization increase.

Depending on the price of RAM, this would probably be a good investment.



Given this scenario, is it beneficial to buy for the future in anticipation of the system being loaded with more processes?


Process Relocation

In a multiprocessing system, it is impossible to know a-priori where a process will be run.

Linking of an executable requires the linker to generate addresses that can be translated to different physical addresses.


Process Relocation

The linker will generate relative addresses.The loader will resolve the relative address to some absolute physical address.

Example:Linker creates addresses in the range:

0x0000 – 0x0F80Loader relocates to the 1K partition

starting at 0x2000.All addresses will then fall in the

range:0x2000 – 0x2F80

0x0000

0x2000

0xFFFF


0x5000

OS

12 1K Partitions

8 2K Partitions

0x9000

4 3K Partition

0xC000

4 4K Partition


Pic32 Memory Map


Process Relocation

Relocation StrategiesFind all addresses in the linker generated file and replace it with a relocated absolute address.

Use a base and limit register (hardware support) to produce absolute addresses from the linker generated file (this greatly reduces the job of the loader).

(a memory map)


Process Relocation

Relocation StrategiesI need to devise a process relocation strategy for a system design where the hardware architecture is not known. What will I do?

I know the hardware architecture. What will I do?

(a memory map)


Process Relocation

Relocation Strategies

ProcessControl Block

Code Segment

Data Segment

Stack

Base Register

Adder

ComparatorBound RegisterAbsoluteAddress

Relative Address

ProtectionFault

Base – Limit Register Implementation


Process Relocation

A word on the linker:Programmers must resolve all symbols through programmatic directives (e.g. extern, #include, etc.)Assembler must be able to resolve out all symbols (see above).Linker creates “.exe” using assembled symbols to generate relative addresses.At run time, relative addresses are resolved, dependent on what memory area the “process” is being loaded.


Process Relocation

A word on the loader:Loader translates the relative addresses generated by the linker into addresses that can be used at run-time.

Full translation may not be done until the process (e.g. .exe) is being executed in the CPU.

See “base-limit” strategy for process relocation.


Swapping

Moving a process, in it’s entirety, from physical memory to a file on the disk (swap file).

With process swapping, the system can handle more processes than can actually fit into memory.

The OS must decide when to swap processes in and out and how to allocate those processes memory blocks.


Swapping

Bitmaps based Memory Manager

Keep a bitmap where each bit corresponds to a block of memory.

A bit set to 0 represents a free memory block.

A bit set to 1 represents a used memory block.


Swapping

Bitmaps based Memory ManagerSmall memory blocks will result in:

Large bitmapsLonger to manipulation timeLess wasted memory

Large memory blocks will result in:Small bitmapsQuick manipulation timeMore unused memory due to fragmentation


Swapping

Bitmap based Memory Manager

0x0000

0x0010

0x0020

0x0050

0x0040

0x0030

0x0090

0x0080

0x0070

0x0060

0x00A0

0x00B0

1

1

1

0

0

1

1

1

0

1

0

1

Block Size – 16 BytesGray – Free SpaceWhite – Used Memory


Swapping

Bitmaps based Memory Manager

When the OS needs to allocate memory:

Walk each bitmap searching for contiguous free blocks that can accommodate the process.

Must be able to account for groups of free blocks that bridge bitmaps.


Swapping

Linked List based Memory Manager – Variation 1Keep a linked list that maps memory to processes.

The memory will initially all be on a “free list” or all descriptors will be marked as “free”.

As memory is allocated, it’s descriptor will be moved from the “free list” to an “allocated list” or the state of the block will change from “free” to “allocated”.


Swapping

Linked List based Memory Manager (Variation 2)Keep a linked list that maps memory to processes.The memory list will initially have a single descriptor block of all free memory.As memory is allocated, a descriptor will be created and put on the allocated list.When memory is freed, the allocated descriptor will be put on a free list.

Contiguous free blocks will be combined into a single free list entry.


Swapping

Linked List based Memory Manager

When the OS needs to allocate memory, it must find a contiguous set of free blocks.

To support this, the linked lists must be sorted based on address.


Swapping

Linked List based Memory ManagerAllocation Policies

First Fit – Give back the first block that will fit the process.Next Fit – Keep track of the last block that was allocated and always start searching for the first fit from there.Best Fit – Find the contiguous free block that best fits the process and use it.

This actually turns out to fragment memory the quickest.


Swapping

Linked List based Memory Manager

Allocation PoliciesWorst Fit – Find the largest available hole and use it.

The hope here is that the remaining unused memory will be large enough to be useful to other processes.

Quick Fit – Keep a pre-allocated list of the most common requests sizes.


Virtual Memory

A key characteristic to notice about the previous memory management schemes is:

All memory references within a process are logical memory references.Processes can be broken up into segments. For a process to execute, only the current segment needs to be in physical RAM.


Virtual Memory

Processes too large for physical RAM…

Deny the process run-time in the system.

Or…?


Virtual Memory

Virtual memory will allow a process to run in an address space larger than the actual physical address space.

Definition: (Webster) virtual – being such in essence or effect though not formally recognized or admitted.

Virtual memory is memory that is not really there (e.g. it has not been recognized yet).


Virtual Memory

Paging – Virtual memory systems use a scheme called paging.

When using paging, a Memory Management Unit (MMU) is used to determine if an address is really in physical RAM.At any given time, a memory page may be in memory or on disk.

Any address in a virtual memory system must be mapped to a physical address through the MMU.


Virtual Memory

The MMU is a specialized processor that does nothing but map addresses from virtual address space to physical address space.

In a virtual memory paging system, the virtual address space is divided up into chunks of address space.


Virtual Memory

Example:32 K virtual address space (15 bit address - I did this so I could draw it)

16 K physical address space.

4 K page size.

Assume Kernel is loading processes into the virtual address space. 0x0000

0x1000

0x4000

0x3000

0x2000

0x0000

0x1000

0x2000

0x3000

0x4000

0x7000

0x6000

0x5000

Physical RAM

Virtual RAM


Virtual Memory

Example:Process 1 Enters – 12K size

0x0000

0x1000

0x4000

0x3000

0x2000

0x0000

0x1000

0x2000

0x3000

0x4000

0x7000

0x6000

0x5000

Physical RAM

Virtual RAM


Virtual Memory


0x0000

0x1000

0x4000

0x3000

0x2000

0x0000

0x1000

0x2000

0x3000

0x4000

0x7000

0x6000

0x5000

Physical RAM

Virtual RAM

P1

P1

P1P1

P1

P1


Virtual Memory


0x0000

0x1000

0x4000

0x3000

0x2000

0x0000

0x1000

0x2000

0x3000

0x4000

0x7000

0x6000

0x5000

Physical RAM

Virtual RAM

P1

P1

P1P1

P1

P1


Virtual Memory


The second and third page of P2 are not currently in physical RAM.

0x0000

0x1000

0x4000

0x3000

0x2000

0x0000

0x1000

0x2000

0x3000

0x4000

0x7000

0x6000

0x5000

Physical RAM

Virtual RAM

P1

P1

P1P1

P1

P1

P2

P2

P2P2


Virtual Memory


0x0000

0x1000

0x4000

0x3000

0x2000

0x0000

0x1000

0x2000

0x3000

0x4000

0x7000

0x6000

0x5000

Physical RAM

Virtual RAM

P1

P1

P1P1

P1

P1

P2

P2

P2P2


Virtual Memory


P3 cannot enter physical RAM for execution unless a page is exchanged.

Page out 0x0000 for process 1.

0x0000

0x1000

0x4000

0x3000

0x2000

0x0000

0x1000

0x2000

0x3000

0x4000

0x7000

0x6000

0x5000

Physical RAM

Virtual RAM

P1

P1

P1P1

P1

P1

P2

P2

P2P2

P3

P3


Virtual Memory




Give 0x0000 to P3.

0x0000

0x1000

0x4000

0x3000

0x2000

0x0000

0x1000

0x2000

0x3000

0x4000

0x7000

0x6000

0x5000

Physical RAM

Virtual RAM

P1

P1

P1P1

P1

P1

P2

P2

P2P2

P3

P3


Virtual Memory




Give 0x0000 to P3.

0x0000

0x1000

0x4000

0x3000

0x2000

0x0000

0x1000

0x2000

0x3000

0x4000

0x7000

0x6000

0x5000

Physical RAM

Virtual RAM

P1

P1

P1P3

P1

P1

P2

P2

P2P2

P3

P3


Virtual Memory

Example:Process 3 addresses virtual memory segment 0x7000. This causes the MMU to throw a page fault.

Process 1 is done with physical memory segment 0x1000.

Give physical memory segment 0x1000 to Process 3. 0x0000

0x1000

0x4000

0x3000

0x2000

0x0000

0x1000

0x2000

0x3000

0x4000

0x7000

0x6000

0x5000

Physical RAM

Virtual RAM

P1

P1

P1P3

P1

P1

P2

P2

P2P2

P3

P3


Virtual Memory




0x1000

0x4000

0x3000

0x2000

0x0000

0x1000

0x2000

0x3000

0x4000

0x7000

0x6000

0x5000

Physical RAM

Virtual RAM

P1

P1

P1P3

P1

P1

P2

P2

P2P2

P3

P3


Virtual Memory




0x1000

0x4000

0x3000

0x2000

0x0000

0x1000

0x2000

0x3000

0x4000

0x7000

0x6000

0x5000

Physical RAM

Virtual RAM

P1

P1

P1P3

P3

P1

P2

P2

P2P2

P3

P3


Virtual Memory

To do the mapping, the MMU must have some table to map an address to a page.This table is called the page table.Each process has an associated page table.

This allows a single process to span the entire virtual address space.


Virtual Memory

Example:- 8 bit addresses- Byte addressable- 32 byte page size – 5 bit offset, 3 bit

page index – 8 page table entries- 128 bytes physical RAM – 4 pages

may be present.


Virtual Memory

Example:

0 0 1 0 1 0 1 0

0 1 0 0 1 0 1 0

11 0

1

1

0

0

0

0

0

1 0

0 1

1 1

1 0

0 1

0 1

1 0

0 1

Pag

e T

able

Incomming Address

Outgoing Address

Present Bit

0

0

0

0

0

0

0

0

0

Map 0x2A

To0x4A

Each process will have it’s own page table.


Virtual Memory

Example:

0 0 1 0 1 0 1 0

0 1 0 0 1 0 1 0

11 0

1

1

0

0

0

0

0

1 0

0 1

1 1

1 0

0 1

0 1

1 0

0 1

Pag

e T

able

Incomming Address

Outgoing Address

Present Bit

0

0

0

0

0

0

0

0

0

1. Top 3 bits map

to one of 8 entries in the page table.


Virtual Memory

Example:

0 0 1 0 1 0 1 0

0 1 0 0 1 0 1 0

11 0

1

1

0

0

0

0

0

1 0

0 1

1 1

1 0

0 1

0 1

1 0

0 1

Pag

e T

able

Incomming Address

Outgoing Address

Present Bit

0

0

0

0

0

0

0

0

0

2. In this case –

index 1. The present bit is set to 1 indicating the page is present in physical memory.


Virtual Memory

Example:

0 0 1 0 1 0 1 0

0 1 0 0 1 0 1 0

11 0

1

1

0

0

0

0

0

1 0

0 1

1 1

1 0

0 1

0 1

1 0

0 1

Pag

e T

able

Incomming Address

Outgoing Address

Present Bit

0

0

0

0

0

0

0

0

0

3. Use the three

bits in the page table to form the upper address for the outgoing address. This will map to one of four physical pages.


Virtual Memory

Example:

0 0 1 0 1 0 1 0

0 1 0 0 1 0 1 0

11 0

1

1

0

0

0

0

0

1 0

0 1

1 1

1 0

0 1

0 1

1 0

0 1

Pag

e T

able

Incomming Address

Outgoing Address

Present Bit

0

0

0

0

0

0

0

0

04. Lower 5 bits

get copied direct for the page offset.


Virtual Memory

Example:

0 0 1 0 1 0 1 0

0 1 0 0 1 0 1 0

11 0

1

1

0

0

0

0

0

1 0

0 1

1 1

1 0

0 1

0 1

1 0

0 1

Pag

e T

able

Incomming Address

Outgoing Address

Present Bit

0

0

0

0

0

0

0

0

0What happens if

the Present bit is “0”?


Virtual Memory

In general:

For a single level page table:


Virtual Memory

Page Tables can get very large.Example: DEC VAX Architecture

Each process can have 231 = 4 GBytes virtual address space (32 bit addressing).

Using 29 = 512 byte pages….

There are 222 page table entries per process = 4M page table entries.

Each entry will be 11 bits (page+present bit+dirty bit) ~ 8M of page table per process.


Virtual Memory

Page table address translation must be performed very fast.

Each instruction could have many address references, requiring a translation for each address.

Where then should the page table reside???In CPU Cache?In main memory?On disk?


Virtual Memory

Multilevel page tables:

Have a page table in high speed RAMReference a second set of page tables in lower speed RAM

Reference the actual memory pages.

What you are doing here is applying VM constructs to create virtual page tables.


Virtual Memory

Multilevel page tables:Top Level Page

Table

Second LevelPage Table T

o M

em

ory P

ag

es

PT1

PT2 Top level page table maps to high address space.

Second level page maps to a address as a subset of the high address space.

PT1 PT2 Offset


Virtual Memory

Multilevel page tables:

10 Bits 10 Bits 12 Bits

Virtual Address

Program Paging Mechanism Physical Memory

Frame # Offset

Root PageTable Ptr

Root Page Table Secondary PageTable

+ +

Page F

rame


Virtual MemoryMultilevel Example:

0 1 0 1 0 1 0 1 0 1 0 00 1 1 0

0 0 1 0 0 1 0 1 0 1 0 00 1 1 0

Incomming Address

Outgoing Address

-16 bit address-2 bit page directory-2 bit page table-12 bit offset

Map 0x554CTo

0x254C


Virtual MemoryMultilevel Example: x x x x x x x x x xx x x xx x

0 1 0 1 0 1 0 1 0 1 0 00 1 1 0

Pag

e D

irect

ory

Incomming Address

Outgoing Address

0x0180

0x0010

0x3000

0x1060

Map 0x554CTo

0x254C

1. Top 2 bits map to an entry in the page directory.



0 1 0 1 0 1 0 1 0 1 0 00 1 1 0

Pag

e D

irect

ory

Incomming Address

Outgoing Address

11 0

1

1

0

0 1

1 1

0 1Pag

e T

able

0

0

0

0

0

0

0

0

0

0x0180

0x0010

0x3000

0x1060

Map 0x554CTo

0x254C

2. Page directory bits correspond to the reference page table logical address.



0 1 0 1 0 1 0 1 0 1 0 00 1 1 0

Pag

e D

irect

ory

Incomming Address

Outgoing Address

11 0

1

1

0

0 1

1 1

0 1Pag

e T

able

0

1 000

0

0

0

0

0

0

0

0

0x0180

0x0010

0x3000

0x1060

Map 0x554CTo

0x254C

3. Page table bits map to the page frame number.


Virtual MemoryMultilevel Example: 0 0 x x x x x x x xx x x x1 0

0 1 0 1 0 1 0 1 0 1 0 00 1 1 0

Pag

e D

irect

ory

Incomming Address

Outgoing Address

11 0

1

1

0

0 1

1 1

0 1Pag

e T

able

0

1 000

0

0

0

0

0

0

0

0

0x0180

0x0010

0x3000

0x1060

Map 0x554CTo

0x254C

3. Page table bits map to the page frame number.


Virtual MemoryMultilevel Example: 0 0 0 1 0 1 0 1 0 00 1 1 01 0

0 1 0 1 0 1 0 1 0 1 0 00 1 1 0

Pag

e D

irect

ory

Incomming Address

Outgoing Address

11 0

1

1

0

0 1

1 1

0 1Pag

e T

able

0

1 000

0

0

0

0

0

0

0

0

0x0180

0x0010

0x3000

0x1060

Map 0x554CTo

0x254C

4. Frame offset is copied into physical address.


Virtual Memory

Win XP:

• 10 bit directory• 10 bit page table offset• 12 bit physical page


Virtual Memory

Page Table Entry Parameters:Page Frame Number – the address of the page frame.Present/Absent bit – The page is in physical RAM or not.Protection – What kind of access is permitted for this frame (read, write, read/write, etc.).


Virtual Memory

Page Table Entry Parameters:Modified (dirty bit) – Keeps track of page modification. If the page has been modified, it must be written out to disk when it is paged out, otherwise it can just be replaced.Referenced – Set when a process is using the page. The OS will use this bit to determine what page to evict.Lock – Lock a page into memory.


Virtual Memory

Page Tables:For paging, the page tables must be in memory.

Consider an instruction that is performing a register to register copy.

Without virtual memory, the only memory reference is done to fetch the instruction.

With virtual memory, additional memory references need to be made to reference the page table.

Every VM reference can cause two physical memory accesses:1. Page table fetch

2. Desired instruction fetch


Virtual Memory

To help deal with the above problem, the “principle of locality” can be used:

principle of localityProgram and data references within a

process tend to cluster in an address space.


Virtual Memory

Page Tables – Translate Lookaside Buffers (TLBs):

A TLB is typically contained in high speed CPU resident cache.

A TLB contains those page table entries that have been most recently used.


Virtual Memory

Page Tables – TLBSince the TLB holds fewer entries than the actual page table, the TLB must use associative mapping (e.g. the TLB must be searched linearly for the page number).

Page # Offset

Virtual Address

0x031A

Frame # Offset

0x031A

0x24F8

0x24F8Physical Address

Page # Offset0x0004

Virtual Address

0x031A

Frame # Offset

0x031A

0x24F8

0x24F8Physical Address

0x0027

0x0003

0x0008

0x0004

0x0004

0x00FA

0x00A0

Page Table TLB0

1

2

3

Direct Mapping: Associative Mapping:


Virtual Memory

Page Tables – TLBIn using the TLB

First access the TLB to see if the desired page entry is present (TLB hit).

If so, form the physical address.

If not (TLB miss)Access the page table.If the present bit is set

The page table is in memory – form the physical address. Update the TLB with the new page entry.

If the present bit is not set The page table is not in physical RAM Issue a “page fault” OS loads a new page


Virtual Memory

Page Tables – TLB

Check the TLB

Relative Address

Generate Physical Address

Access Page Table

Update TLB

TLB Refresh

Physical Address

Page Fault Handler

Choose Page From Disk and Page to Replace

Activate Page I/O

Page Transfer Done

Choose Page From Disk and Page to Replace

Page Present in Memory

Page Fault

Activate Page I/O

Page Transfer Done

Return to Faulted Instruction

TLB Hit

TLB Miss


Virtual Memory

Page Replacement AlgorithmsWhen the OS needs to exchange a page

in memory with a page on disk (e.g. when a page fault occurs) …

Which page should be removed from memory?

What are the ramifications of removing the “wrong” page?


Virtual Memory

Page Replacement – Optimal

Upon a page fault…Predict in how many instructions will execute before a page is referenced (the instruction count).

Page out the page with the largest instruction count.


Virtual Memory

Page Replacement – OptimalThis algorithm is impractical because there is no way to know a-priori the execution behavior of a process (logical branches and timing destroy absolute determinism)

If the execution state of a system is static, it possible to realize the prediction by keeping run-time statistics.


Virtual Memory

Page Replacement – Not Recently UsedKeep a bit in the page table to indicate when a page is referenced.Keep a bit in the page table to indicate when a page is modified.Every time the page is referenced, set the referenced bit to 1.Every time the page is modified, set the modified bit to 1.Periodically, set the referenced bit back to 0.


Virtual MemoryPage Replacement – Not Recently

UsedPages fall into the categories:

R M

Class 0 0 0

Class 1 0 1

Class 2 1 0

Class 3 1 1


Virtual MemoryPage Replacement – Not Recently

UsedRemove a random page from the lowest numbered non-empty class.

Easy to understand

Moderate implement difficulty

Adequate performance


Virtual Memory

Page Replacement – First-in, First-outKeep a queue of page table entries based on time.When the OS needs to remove a page from memory, remove the page that is the oldest.This assumes removing the oldest page will be the least obtrusive.


Virtual Memory

Page Replacement – Second ChanceKeep a queue of page table entries based on time.

Every time a page is referenced, set the R bit.

When the OS gets a page faultCheck the oldest page R bit.

If the R bit is 1Remove the oldest page from the queue.

Clear the R bit.

Re-queue the page.

Go to the next page table entry in the queue.

ElseReplace the oldest page.


Virtual Memory

Page Replacement – ClockJust a different implementation of the second chance page replacement algorithm.It uses a circular linked list rather than a queue.The behavior is the same as a queue based implementation.


Virtual Memory

Page Replacement – Least Recently Used

Based on the principle of locality.

Keep track of the amount of use a page is getting.

Evict the page that has the least amount of use.

How could this be implemented?


Virtual Memory

Page Replacement – Least Recently UsedAging Register – Example:

8 pages.

8 bit age counter.

For every tickTake the page R bit and shift it in at the left.

At a page faultEvict the page with the lowest page count.


Virtual Memory

Page Replacement – Least Recently UsedAging – Example:

R - Bits

1

0

1

0

0

0

0

0

0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

Page Age0

1

2

3

4

5

6

7

0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

0 1 2 3 4 5 6 7

LSB


Virtual Memory


R - Bits

1

0

0

0

1

0

1

0

1 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

1 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

Page Age0

1

2

3

4

5

6

7

0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

0 1 2 3 4 5 6 7

LSB


Virtual Memory


R - Bits

1

0

0

1

0

0

0

0

1 1 0 0 0 0 0 0

0 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0

0 0 0 0 0 0 0 0

1 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

Page Age0

1

2

3

4

5

6

7

1 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0

0 1 2 3 4 5 6 7

LSB


Virtual Memory


R - Bits

1

1

0

0

0

1

0

1

1 1 1 0 0 0 0 0

0 0 0 0 0 0 0 0

0 0 1 0 0 0 0 0

1 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0

0 0 0 0 0 0 0 0

Page Age0

1

2

3

4

5

6

7

0 1 0 0 0 0 0 0

0 0 0 0 0 0 0 0

0 1 2 3 4 5 6 7

LSB


Virtual Memory


Page Fault – Which page will be evicted.

R - Bits

0

1

0

0

0

0

0

0

1 1 1 1 0 0 0 0

1 0 0 0 0 0 0 0

0 0 0 1 0 0 0 0

0 1 0 0 0 0 0 0

0 0 1 0 0 0 0 0

1 0 0 0 0 0 0 0

Page Age0

1

2

3

4

5

6

7

0 0 1 0 0 0 0 0

1 0 0 0 0 0 0 0

0 1 2 3 4 5 6 7

LSB


Virtual Memory

Page Replacement – Working Set

When a process is initially started, there are no pages in memory.

As the process runs, page faults will occur until all required pages are in memory.

This is called demand paging.


Virtual Memory


Working Set – The set of pages a process is currently actively using.


Virtual Memory

Page Replacement – Working SetThe working set model involves trying to keep track of the working set of pages for a process.

During execution, the working set for a process is determined by those pages that were references during the “last” instruction execute.

When a process starts and generates a page fault, try to get all pages in the processes working set.


Virtual Memory


Time

Wo

rkin

g S

et

Pa

ge

s

Total pages required by the process


Virtual Memory

Page Replacement – Working Set ClockKeep a circular list of page frames.

A page pointer is maintained to reference the first page to be examined.

Upon a page fault:Check the R bit.

If set, the page is in the working set. Advance the page pointer and check the next.

If not, evict the page from memory.


Segmentation

A page is a contiguous memory block starting at address 0.A Page is a fixed size.A process will use a page of memory to maintain code segment, data segment, and run-time stack.This restricts a process by forcing it to be maintained within a single address space.


Segmentation

Memory segmentation will allow a process to be fragmented up into different address spaces:

Example:The run-time stack gets it’s own segment.The code space gets it’s own segment.The data space gets it’s own segment.

Each segment is a 0 based address space.


Segmentation

Use of separate segments allows each segment of be handled differently.

A stack segment can be assigned strict protection.Data segments can be set up to allow user space IPC.Code segments can be shared allowing different processes to share the same loaded code (e.g. a .dll).


Segmentation

Advanced processors support a memory segmentation with specialized hardware.

Intel has the Local Descriptor Table (LDT) and the Global Descriptor Table (GDT) to describe memory segments in use.In practice, a single paged address space is used. (OS/2 used the more advanced memory management features of the Intel architecture).

Documents

11/20/2015CST 352 - Operating Systems1 Operating Systems CST 352 Memory Management