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TRANSISTOR AMPLIFIER CONFIGURATION

-BJT Common-Emitter Amplifier-

By:Syahrul Ashikin Azmi

School of Electrical System Engineering

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Objectives

To understand and familiar with dc analysis of bipolar transistor circuits.

To study common-emitter amplifier in term of ac analysis and familiar with general characteristic of this circuit.

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Introduction 3 basic single-transistor amplifier

configuration that can be formed are: Common-emitter (C-E configuration) Common collector / emitter follower (C-C

configuration) Common base (C-B configuration)

Each configuration has its own advantages in form of: Input impedance Output impedance Current / voltage amplification

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Basic common-emitter circuit

R1

R2

RC

CC

vs

VCC

vo

Voltage divider biasing-> set Q-point

Coupling capacitor ->dc isolation between amplifier

and signal source

Emitter at ground -> common emitter

Dc voltage

-> power the amplifier

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Rules in dc analysis

Replacing all capacitors by open circuit.

Replacing all inductors by short circuit.

Replacing ac voltage source by short circuit or ground connection.

Replacing ac current source by open circuit.

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1st: Perform DC analysis The circuit can be

analyzed by forming a Thevenin equivalent circuit.

CC acts as an open circuit to dc.

RC

VCC

RTH

VTH

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Thevenin circuit analysis

We know that,

Thevenin resistance, RTH is:

Thevenin voltage, VTH is:

Apply KVL around B-E loop;

The collector current, ICQ is then:

BQCQ II BQEQ II )1(

21 RRRTH

CCTH VRR

RV

21

2

0)( onBETHBQTH VRIV

TH

onBETHBQ R

VVI )(

TH

onBETH

BQCQ

R

VV

II

)(

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Cont. Thevenin circuit analysis

Apply KVL to collector-emitter loop;

Thus, Q-point of the amplifier circuit is the coordinate between ICQ and VCEQ.

0 CEQCCQCC VRIV

CBQCC

CCQCCCEQ

RIV

RIVV

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Rules in ac analysis Replacing all capacitors by short

circuits Replacing all inductors by open

circuits Replacing dc voltage sources by

ground connections Replacing dc current sources by

open circuits

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2nd: Perform AC analysis-small-signal equivalent circuit-

Inside the transistor

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Small-signal hybrid-π parameters Small-signal input

resistance, rπ

Transconductance, gm

Small-signal output resistance, ro

Control voltage, Vπ

Output voltage, Vo

Input resistance, Ri

sS

VRrRR

rRRV

21

21

CQ

T

I

Vr

T

CQm V

Ig

CQ

Ao I

Vr

Como RrVgV

rRRRi 21

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Small-signal hybrid-π parameters

Output resistance, Ro

Voltage gain, Av

Coo RrR

Co

S

ms

ov Rr

RrRR

rRRg

V

VA

21

21

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Example 1 Given

VCC=12V,RS=0.5kΩ, R1=93.7kΩ, R2=6.3kΩ, RC=6kΩ, β=100, VBE(on)=0.7V and VA=100V.

Determine small-signal voltage gain, input resistance and output resistance of the circuit.

R1

R2

RC

CC

vs

VCC

voR1

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Solution Example 1

1st step: DC solution Find Q-point values. ICQ = 0.95mA VCEQ=6.31V.

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Cont Solution Example 1 2nd step: AC solution Small-signal hybrid-π parameters are:

VmAV

Ig

T

CQm /5.36

026.0

95.0

kI

Vr

CQ

T 74.295.0

)100)(026.0(

kI

Vr

CQ

Ao 105

95.0

100

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Cont Solution Example 1

Small-signal voltage gain is:

Input resistance, Ri is:

krRRRi 87.174.29.521

)(21

21

Co

S

ms

ov Rr

RrRR

rRRg

V

VA

163)6105(5.074.29.5

74.29.5)5.36(

vA

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Cont Solution Example 1

O/p resistance, Ro -> by setting independent source Vs = 0 -->no excitation to input portion, Vπ=0, so gmVπ=0 (open cct). kRrR Coo 68.56105

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Common-emitter circuit with emitter resistor

Why we need to add emitter resistor, RE in the circuit design?

Without RE, when β increases or decreases -> ICQ and VCEQ also vary, thus Q-point will be shifted and makes the circuit unstable.

By adding RE, there will be not much shift in Q-point is stabilized even with variation of β. Moreover, the voltage gain is less dependent on transistor current gain in ac analysis.

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Common-emitter circuit with emitter resistor

R1

R2

RC

CC

vs

VCC

vo

RE

Emitter resistor

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Thevenin circuit analysis

Apply KVL around B-E loop,

RC

VCC

RTH

VTH

RE

0)1(

0

)(

)(

EBQonBETHBQTH

EEQonBETHBQTH

RIVRIV

RIVRIV

)()1( onBETHETHBQ VVRRI

ETH

onBETHBQ RR

VVI

)1()(

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Thevenin circuit analysis We will get collector current as:

Apply KVL around C-E loop to find VCEQ,

0 EEQCEQCCQCC RIVRIV

ETH

onBETH

BQCQ

RR

VV

II

)1()(

ECBQCC

EBQCBQCC

EEQCCQCCCEQ

RRIV

RIRIV

RIRIVV

)1(

)1(

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Ac analysis-small-signal equivalent circuit-

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Small-signal hybrid-π parameters

The ac output voltage is: (if we consider equivalent circuit with current gain β)

Input voltage equation:

Input resistance looking into the base of BJT, Rib:

Input resistance to the amplifier is:

Cbo RIV )(

Ebbbin RIIrIV )(

Eb

inib Rr

I

VR )1(

ibi RRRR 21

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Small-signal hybrid-π parameters

By voltage divider, we get relate Vin and Vs:

Small-signal voltage gain is then:

If Ri>>RS and if (1+β)RE >> rπ, voltage gain is:

sSi

iin V

RR

RV

Si

i

E

C

s

ov RR

R

Rr

R

V

VA

)1(

E

C

E

C

s

ov R

R

R

R

V

VA

)1(

Exact value

Approximate value

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Example 2 Given VCC=10V, R1=56kΩ,

R2=12.2kΩ, RC=2kΩ, RE=0.4kΩ, RS=0.5kΩ, VBE(on)=0.7V, β=100 and VA=∞.

a) Sketch Thevenin equivalent circuit.

b) Determine Q-points.

c) Sketch and label small-signal equivalent hybrid-π circuit.

d) Find small-signal voltage gain, AV.

R1

R2

RC

CC

vs

VCC

vo

RE

RS

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Common-emitter circuit with positive and negative voltage biasing

Biasing with dual supplies in desirable in some applications because: Eliminate coupling capacitor Allow dc input voltages as input signals.

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Example 3 A simple transistor circuit biased with both

+ve and –ve dc voltages is shown in figure below. Given β=100 and VBE(on)=0.7V. Calculate IEQ, ICQ and VCEQ.

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Solution Example 3

For dc analysis, set vs=0 so that base terminal is at ground potential.

KVL around B-E loop,

So, emitter current:

Collector current:

VRIV EEQonBE )(0

mAR

VVI

E

onBEEQ 15.2

2

)7.05()( )(

mAII EQCQ 13.215.2101

100

1

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Cont solution example 3

Apply KVL around C-E loop yields

Rearrange the equation to find VCEQ;

VRIVRIV EECEQCCQ

V

RIRIVVV EEQCCQCEQ

15.2)2)(15.2()5.1)(13.2()55(

)(

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Example 4

Let β=120, R1=175kΩ, R2=250kΩ, RC=10kΩ, RE=20kΩ and VBE(on)=0.7V.

For the given circuit,i) Find RTH, VTH and Q-points.ii) Sketch dc load line

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Solution Example 4

1st: Sketch Thevenin equivalent circuit to find RTH and VTH. RTH = 103kΩ & VTH = 1.6V

2nd: Apply KVL around B-E loop to find equation for IBQ. Then, find ICQ and IEQ. IBQ = 3.92μA ICQ = 0.471mA & IEQ = 0.474mA

3rd: Apply KVL around C-E loop to find equation for VCEQ. VCEQ = 3.8V

4th: Sketch dc load line and indicate the Q-points. Find IC(max) at y-axis and VCE(cutoff)= VCC=V+-V-=18V at x-axis.

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C-E Amplifier with Emitter Bypass Capacitor

CE provides a short circuit to ground for

the ac signals

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Cont..

By include RE, it provide stability of Q-point. If RE is too high +++> small-signal voltage gain will

be reduced severely. (see Av equation)

Thus, RE is split to RE1 & RE2 and the second resistor is bypassed with “emitter bypass capacitor”. CE provides a short circuit to ground for ac signal.

So, only RE1 is a part of ac equivalent circuit. For dc stability: RE=RE1+RE2 For ac gain stability: RE=RE1 since CE will short RE2

to ground.

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Example 6

Given β=100, VBE=0.7V and VA=100V. Determine: (a) small-signal voltage gain (b) input resistance seen by the signal source, Rin and the output resistance looking back into the output terminal, Ro.

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AC Load Line Analysis

Dc load line -> a way of visualizing r/ship between Q-point and transistor characteristic.

When capacitor included in cct, a new effective load line ac load line exist.

Ac load line -> visualizing r/ship between small-signal response and transistor characteristic.

Ac operating region is on ac load line.

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Ac load line cont..

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Ac load line cont.. For Dc load line: Apply KVL around collector-emitter loop,

But

Substitute and rearrange both equations:

If β>>1, then we can approximate

Dc load line

equation

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Cont.. For ac analysis, apply KVL around collector-emitter loop,

Assume ic ≈ ie,

The slope is given by:

The slope of ac load differ from dc load line RE2 is not included in the equivalent circuit. Small-signal C-E voltage and collector current response are functions of resistor RC and RE1.

01 EeceCc RivRi

)( 1ECcce RRiv

1

1

EC RRSlope

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Dc and ac load lines for CE circuit

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+ VCE

0

+ IC

ICQ

VCEQ

Q

CCV

EC

CC

RR

V

i

AC load line cont..

cCQcsat iIi 2

1

)RR(iv ECc 1

CQIi 2

ceCEQce vVv v

1

1

EC RRSlope

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Maximum symmetrical swing

When symmetrical sinusoidal signal applied to i/p of amplifier, symmetrical sinusoidal signal generated at o/p.

Use ac load line to determine the maximum output symmetrical swing.

If output exceed limit, a portion of o/p signal will be clipped and signal distortion occur.