Upload
ramuluchinthamalla
View
3
Download
0
Tags:
Embed Size (px)
Citation preview
The 5th Power Electronics, Drive Systems and Technologies Conference (PEDSTC 2014), Feb 5-6, 2014, Tehran, Iran firPEDSYc-J'
High-Resolution Numeral-Based Multilevel
Inverter with Low Number of Conducting Switches
for Low-Voltage PV Applications
Ehsan Esfandiari
Department of Electrical Engineering Majlesi Branch, Islamic Azad University
Esfahan, Iran [email protected]
Abstract-a new high-resolution staircase-output multilevel
inverter for low voltage PV applications is proposed in this paper.
The proposed topology can provide high number of levels with
low number of sources and conducting switches. A 1-2-7-14-source version of this new topology can generate 49 levels with 4 sources, 30 total switches and 61 conducting switches. The
topology also can be expanded horizontally and vertically to
achieve higher resolution. In addition, a multiwinding-based
variant of the topology is proposed with lower number of switches
and one DC source. Experimental results show the feasibility of
the inverter. At last, the proposed topology was compared with
other staircase topologies considering important parameters in
low voltage PV systems.
Index Terms-staircase, numeral-based, multilevel inverter,
on-state, conducting, power dissipation, low voltage PV. In this paper, N represents the number of sources (or
windings) in the whole of the system and nm is the number of sources in the mth string of sources.
I. INTRODUCTION Multilevel inverters provide several benefits for power
electronic conversion, such as low THD, simple control techniques, compactness, dependability and the capacity to control a greater amount of power in the form of high voltages and currents [I -5], making this technology increasingly important in the last several years [6-15] . These inverters also feature a low operating cost, high dependability and highefficiency renewable sources.
The best-known multilevel inverter structures are the cascaded H-Bridge inverter [16-20], the flying capacitor inverter, and the diode clamping inverter [12, 13, 21]. Multilevel inverters can be divided into two types: symmetrical and asymmetrical inverter structures [22-29]. The former is so named due to the equality in the amplitude of the DC sources. Control over the multilevel inverters can further divide them into two major categories: the low-frequency controlled (staircase) multilevel inverters [3, 14, 23, 30] and the PWM-controlled multilevel inverters. In the lowFrequency controlled multilevel inverters, the switches are controlled by low frequency signals [31], hence generating a
1 3 bidirectional switches
978-1-4799-3479-9/14/$31.00 ©2014 IEEE
Behzad Bahraminejad
Department of Electrical Engineering Majlesi Branch, Islamic Azad University
Esfahan, Iran [email protected]
staircase output. These inverters have a special place in renewables [4, 14], due to their elimination of switching power losses and because they are able to generate a high number of levels using fewer sources with numeral-base magnitudes [22-26, 32]. These inverters are the best option for renewables with a high efficiency arising from the lower number of conducting switches. A binary-source cascaded H-Bridge generates 2N+1 - 1 levels with 2N number of conducting switches and 4N total switches2• In the inverter proposed in [22], the number of levels is limited to 2N+1 - 1 with 2N + 2 conducting and 4N + 4 total switches. In the topology proposed in [23], the number of levels is calculated by n�l(ni(ni + 1) + 1) with 4m conducting and I�1(2ni + 2) total switches. Reference [27] presents a configuration with 2N+1 - 1 levels, N + 2 conducting and 2N + 4 total switches. The system proposed in [33] can generate 2 n�l(ni + 1) - 1 levels with (2m + 2) conducting switches and I�l (2ni + 2)+4 total switches. The design proposed in [14] generates 2N + 1 levels with only 4 conducting and 2N + 6 total switches.
The most recent configurations in [28, 29] introduce staircase-output multilevel inverters with a reduced number of components for high voltage applications but a high number of conducting switches due to the presence of several H-Bridge blocks in the strings.
II. BACKGROUND
Low voltage, small and medium scale Photovoltaic Power Generators (PPGs) are the fastest developing industry in the world. The presence of modem, high breakdown-voltage switches with low on-state resistance and voltage drop makes cascading the switches unnecessary in the low voltage PPGs. For widespread application, medium and small scale PPGs a parallel battery bank is preferred to reach to greater reliability, higher efficiency and easier one-stage Maximum Power Point Tracking (MPPT). Multiple battery banks (connected in series or in discrete mode) increase the caballing volume, thus decreasing the efficiency and even the reliability. The number of conducting switches also affects the efficiency of these
2 Each switch consists of a p-n junction switch or a MOSFET and its antiparallel diode.
550
VDC H-Bridge
-
Fig. 1 The configuration proposed in [3, 14].
systems with high initial costs. In addition, based on available standards, isolation is necessary in the PV converters. Furthermore, reliability is an important issue in renewable power generators. Particularly in remote areas, in the fu�u�e, various individual homes will employ only PVs for electnclty generation. As a matter of fact, higher numbers of conducting switches decrease the reliability and efficiency.
III. SWITCH-LADDER MULTILEVEL INVERTER (FIG. 1, FIG. 3)
The feasibility of multi-winding, transformer-based multilevel inverters was investigated in [22] and [14]. Fig. 1 shows the model proposed in the latter study. Operating this inverter at 5 kW and 47 levels resulted in greater than 97% efficiency and a THD below 5%. The most important advantage of this inverter is that only 4 switches are conducting at low frequency during each interval. Another advantage is that this inverter can tolerate fault conditions using a special switching pattern, due to the symmetrical and parallel nature of the system. The high number of switches
S7
L-________ .. + YOU! - .... _______ -----'
Fig. 3 The proposed new configuration with a reduced number of sources and conducting switches (49 levels).
551
HBridge
Fig. 2 The reconfigured topology of Fig. 1 and [33], optimized for low voltage PV application with fewer windings and switches.
(2N + 6 switches) is a drawback of this inverter. Fig. 2 shows the reconfigured topology of Fig. 1 and [33], optimized for low voltage PV application with fewer windings and switches.
IV. A NEW CONFIGURATION WITH REDUCED NUMBER OF DC SOURCES (FIG. 3)
The new configuration proposed in Fig. 3 exhibits fewer conducting switches (25% less) compared with [23]. It also has a lower number of sources compared with the design proposed in [33]. This system uses (3N - 2) * 3 total switches and N + 2 conducting switches which N is the total sources. Extending the design horizontally with ni = 2, can lead to n�1(3ni + 1) levels with m strings (each string contains ni sources). This means that the proposed design with 4 DC sources (m = 2, ni = 2) can generate 49 levels with 30 total switches and 6 conducting switches. Table 1 illustrates the switching pattern for Fig. 3.
TABLE I SWITCHING PATTERN FOR CIRCUIT PROPOSED IN FIG. 3.
level Conducting switches output
0 S,SSS2 0 1 S,SsSj IVDc 2 SSSDS2 2VDC 3 SgSDS[ 3VDC 4 S,S4SJ 4VDC
24 S9SZS[ 24VDC -24 S7SySJ -24VDC
-4 S7SDS[ -4VDC -3 S7S4SJ -3VDC -2 S,SsSJ -2VDC -I S7S4S2 -IVDc
+ VOU! -
Fig. 4 Horizontally extended version of the configuration in Fig. 3 (343 levels).
A. Extended version of the proposed inverter
Fig. 4 is the horizontally extended version of the proposed configuration with ni = 2 and m = 3. This system can generate 343 levels with 48 total and 8 conducting switches using 6 DC sources. This topology can provide highest number of levels with lower number of conducting switches.
V. MULTI-WINDING EDITION OF THE PROPOSED MULTI-LEVEL
So
14(t)
S,
7(t)
II II
+ V - II '--________ .. oul err-----==---=
"q31 s",tgJ Fig. 5 Reconfigured version of Fig. 3 to be adopted for low voltage PV application requirements.
INVERTER WITH ONE DC SOURCE (FIG. 5) The configuration proposed in Fig. 3 uses separated DC
sources and does not provide isolation. Fig. 5 presents a proposed reconfigured edition of this topology that uses a multi-winding transformer, provides isolation and can generate 49 levels from 4 windings with 8 conducting switches and 22 total switches. The total number of switches was reduced compared with Fig. 3. However, due to the presence of the lower number of windings and the special array of switches, this inverter is vulnerable against both short and open-circuits and has a lower reliability compared with that in Fig. 1. The principle of the operation is similar to configurations of Fig. 1 and Fig. 2. This topology also comply the low voltage PV
7VDC=84V
S7
+ V L-________ .... oul
Fig. 6 The proposed new configuration with a reduced number of sources and conducting switches (21 levels).
552
. , V
6215
4,662
3,108
\ , 554
0.0
-1554
-3.108
-4.662
-6,215
-7 , 7� O. 1 5,028 \0.03 15.02 mlms <l
20,02 25.02 30,0\ 35.01 40,0 1
II
45, 0
.� 50,0 mV
32,46
21,64
10,82
00
-10.82
·21.64
·32.46
-4329 ·50.0
50.0
Fig. 7 Output voltage and current of the proposed inverter (Fig. 3) under a 40n resistive load
Fig. 8 Total Harmonic Distortion of the current and voltage under a 40n resistive load.
application requirements.
VI. EXPERIMENTAL RESULT (FIG. 6)
To show the feasibility of the proposed inverter, a 1-2-7 source sample of the proposed inverter was constructed. The configuration is shown in Fig. 6 and can generate 21 levels with 6 conducting switches. IRFP4242 MOSFETs from IR Company with 39mfl on-state resistance were used in the form of bidirectional switches. Firing signals were generated using an ATMEGA128 microcontroller board. The amplitude of the sources are approximately 12V, 24V and 84V respectively and were produced using multiple DC power supplies in the lab.
553
Fig. 7 shows the output voltage and current of the proposed inverter under a 40fl resistive load. Fig. 8 shows the Total Harmonic Distortion (THO) of the voltage and current under a 40fl resistive load. The registered THO for voltage and current was near 1.5%. The switching angles were calculated using the following equation,
O(n= sin-1 (n-po.s) (1) Which P is the number of voltage levels in a quarter (in the
experimental case, P = 10).
TABLE 2 BRIEF COMPARISON OF THE STAIRCASE MULTILEVEL INVERTERS OPTIMIZED FOR LOW VOLTAGE PV APPLICATIONS
Conf. in [23] Confin Conf in Conf in [33] nj-4, Conf in [22] Conf in [14] (Fig. 1 )
No. of DC sources No. of output
windings No. of switches
Provision of isolation No. of levels
No. of condo switches Composition of
voltage drop with pn junction switches
Composition of voltage drop with Mosfet switches
Reliability in faults
nj=2,m=2
4
24 No 49 8
4Vs+4Vo
4Ros(on)+4Vo
Low
Fig. 3 Fig. 5
nj=2,m=2 4
4
30 26 No Yes
49 6
3Vs+3Vo
3Ros(on)+3Vo
Low
VII. MAKING A DECISION
Several parameters must be considered when selecting between configurations, including total investment cost, type of available switches, input voltage, power rate, expected level of reliability, output quality and the efficiency of the system. The configuration in [14] (Fig. I) exhibits a lower number of conducting switches with more total switches and windings and has a higher reliability. The topology in Fig. 2 features a lower number of windings and fewer total switches with more conducting switches compared with [14] (Fig. I). Finally, the configuration in Fig. 5 has fewer windings and total switches and more conducting switches compared with both [14] (Fig. 1) and Fig. 2. Aside from the efficiency of the transformer, the number and type of conducting switches are the most important parameters that affect the efficiency of the staircaseoutput multilevel inverters in high initial-cost PV generators. Table 2 shows a brief comparison of the staircase multilevel inverters optimized for low voltage PV applications. Some
REFERENCES [1] F. Chan, et a1., "Reliability: A new approach in design of inverters for
PV systems," in 10th IEEE International Power Electronics
Congress, 2006, pp. 1-6. [2] A. Chen, et a1., "A novel type of combined multilevel converter
topologies," in IECON 2004. 30th Annual Conference of IEEE
2004,pp.2290-2294 [3] E. Esfandiari and N. Mariun, "Experimental Results of 47-level
Switch-Ladder Multilevel Inverter," accepted for publication in Industrial Electronics, IEEE Transactions on, 2012.
[4] S. Daher, et al., "Design and Implementation of an Asymmetrical Multilevel Inverter for Renewable Energy Systems," 2005, pp. 199-204.
[5] C. Dai, et a1., "Cost and Performance Comparison of Cascaded Multilevel Converters for Residential Renewable Energy Conversion," in Power System Technology, 2006. PowerCon
2006. International Conference on, 2006, pp. 1-8. [6] 1. Rodriguez, et al., "Multilevel inverters: a survey of topologies,
controls, and applications," Industrial Electronics, IEEE
Transactions on, vol. 49, pp. 724- 738, 2002. [7] L. M. Tolbert, et a1., "Multilevel converters for large electric drives,"
Industry Applications, IEEE Transactions on, vol. 35, pp. 36-44, 2002.
n2=5 N=23
N=5 N=4 9
5 4 23
26 24 20 52 No Yes Yes Yes 59 63 31 47 6 12 10 4
4Vs+2Vo 7Vs+5Vo 6Vs+4Vo 3Vs+IVo
4Ros(on)+2Vo 7Ros(on)+ 6Ros(on)+4
3Ros(on)+IVo 5Vo Vo
High Low Very high
important parameters like: No. of DC sources, No. of output windings, No. of switches, provision of isolation, No. of levels, No. of conducting switches, composition of voltage drop with p-n junction switches, composition of voltage drop with MOSFET switches and reliability in faults were considered.
CONCLUSION This paper presented a new staircase multilevel inverter
topology optimized for low-voltage PV generators. A horizontally extended version of the proposed inverter can generate n�1(3ni + 1) levels with m strings and ni = 2 sources in each string. The feasibility of the proposed inverter was validated using experimental results. A 21-level prototype could generate output with 1.5% THD. At last, to facilitate a wise selection between topologies based on the available technology and facilities, the staircase-output topologies were briefly compared in Table 2.
[8] 1. Huang and K. A. Corzine, "Extended operation of flying capacitor multilevel inverters," IEEE Trans. Power Electron, vol. 21, pp. 140--147,2006.
[9] M. Malinowski, et a1., "A Survey on Cascaded Multilevel Inverters," Industrial Electronics, IEEE Transactions on, vol. 57, pp. 2197-2206,2010.
[10]0. Patel, et a1., "A review of various carrier based PWM methods for multilevel inverter," in Power Electronics (IICPE), 2010 India International Conference on, 2010, pp. 1-6.
[11] B. 1. Toolkit, et a1., "Novel Vector Control Method for Three-Stage Hybrid Cascaded Multilevel Inverter," IEEE Transactions on Industrial Electronics, pp. 1339-1349, 20 II.
[12]N. S. Choi, et a1., "A general circuit topology of multilevel inverter," in Power Electronics SpeCialists Conference, 1991. PESC '91
Record., 22nd Annual IEEE, 1991, pp. 96-103,24-27 [13] A. Nabae, et a1., "A new neutral-point-clamped PWM inverter," IEEE
Transactions on Industry Applications, pp. 518-523, 1981. [14] E. Esfandiari, et aI., "Switch-ladder: reliable and efficient multilevel
inverter," Electronics Letters, vol. 46, pp. 646-647, April 2010. [15] E. Esfandiari and N. Mariun, "Increasing the reliability in switch
ladder multilevel inverter against short circuit faults," in IEEE
Symposium on Industrial Electronics & Applications (ISIEA 2011), Langkawi, Malaysia, 2011.
[16] S. Khomfoi, et al., "Cascaded H-bridge Multilevel Inverter Drives Operating under Faulty Condition with AI-Based Fault Diagnosis and Reconfiguration," in Electric Machines & Drives
554
Conference, 2007. IEMDC '07. IEEE International, 2007, pp. 1649-1656.
[17] L. Jingsheng, et al., "Cascaded H-bridge Multilevel Inverters -A Reexamination," in Vehicle Power and Propulsion Conference, 2007. VPPC 2007. IEEE, 2007, pp. 203-207.
[18] K. Corzine and Y. Familiant, "A new cascaded multilevel H-bridge drive," IEEE Transactions on power electroniCS, vol. 17, pp. 125-131,2002.
[19]M. Marchesoni, "M. Mazzucchelli-Multilevel converters for high power ac drives: a review," presented at the Proc. of ISlE 1993, 1993.
[20] M. Marchesoni, et at., "A nonconventional power converter for plasma stabilization," IEEE TRANS. POWER ELECTRON., vol. 5, pp. 212-219, 1990.
[21] M. Carpita, et at., "A novel multilevel structure for voltage source inverter," in EUROPEAN CONFERENCE ON POWER
ELECTRONICS AND APPLICATIONS, 1991, pp. 90-94. [22] S. Daher, et at., "Multilevel Inverter Topologies for Stand-Alone PV
Systems," IEEE Transactions on Industrial Electronics, vol. 55, pp. 2703-2712,2008.
[23] E. Babaei, et al., "Reduction of dc voltage sources and switches in asymmetrical multilevel converters using a novel topology," Electric Power Systems Research, vo!' 77, pp. 1073-1085,2007.
[24] M. Glinka and R. Marquardt, "A new ACIAC multilevel converter family," IEEE Transactions on Industrial ElectroniCS, vol. 52, pp. 662-669,2005.
[25] A. Rufer, et at., "Asymmetric multilevel converter for high resolution voltage phasor generation," in European Conference on Power Electronics and Applications, Lausanne, Switzerland, 1999.
[26] H. Ert!. et at., "A Novel Multicell DC-AC Converter for Applications in Renewable Energy Systems," IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, vol. 49, 2002.
[27] 1. Schmid and R. Schatzle, "Inverter for converting a direct voltage into an alternating voltage," 1988.
[28] E. Babaei and J. Ebrahimi, "A New Topology of Cascaded Multilevel Converters with Reduced Number of Components for HighVoltage Applications," Power ElectroniCS, IEEE Transactions on, vol. PP, pp. 1-1,2012.
[29] 1. Ebrahimi, et at., "A New Multilevel Converter Topology with Reduced Number of Power Electronic Components," Industrial ElectroniCS, IEEE Transactions on, vol. PP, pp. 1-1,2012.
[30] S. Daher, "Analysis, design and implementation of a high efliciency multilevel converter for renewable energy systems," PhD, kassel university, 2006.
[31] S. Khomfoi and L. M. Tolbert, "Multilevel Power Converters," ed: University of Tennessee, 2005, pp. 31-1 31-50.
[32] E. Esfandiari and N. Bin Mariun, "Multi-winding transformer based diode-clamped multi-level inverter," in Industrial Electronics & Applications (ISIEA), 2010 IEEE Symposium on, Malaysia, 2010, pp. 15 5-158.
[33] E. Babaei, "A Cascade Multilevel Converter Topology With Reduced Number of Switches," Power ElectroniCS, IEEE Transactions on, vol. 23, pp. 2657-2664, 2008.
555