BJT Fixed Bias ENGI 242ELEC 222

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BJT Biasing 1For Fixed Bias Configuration:Draw Equivalent Input circuitDraw Equivalent Output circuitWrite necessary KVL and KCL EquationsDetermine the Quiescent Operating PointGraphical Solution using LoadlinesComputational AnalysisDesign and test design using a computer simulation

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Complete CE Amplifier with Fixed Bias

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Fixed Bias and Equivalent DC Circuit

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Fixed-Bias Circuit

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DC Equivalent Circuit

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Base-Emitter (Input) LoopUsing Kirchoffs voltage law: VCC + IBRB + VBE = 0

Solving for IB:

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Collector-Emitter (Output) LoopSince: IC = IBUsing Kirchoffs voltage law: VCC + IC RC + VCE = 0Because: VCE = VC VESince VE = 0V, then: VC = VCEAnd VCE = VCC - IC RC Also: VBE = VB - VEwith VE = 0V, then: VB = VBE

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BJT Saturation Regions

When the transistor is operating in the Saturation Region, the transistor is conducting at maximum collector current (based on the resistances in the output circuit, not the spec sheet value) such that:

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Determining Icsat

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Determining ICSAT for the fixed-bias configuration

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Load Line Analysis

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Load Line AnalysisThe end points of the line are : ICsat and VCEcutoffFor load line analysis, use VCE = 0 for ICSAT, and IC = 0 for VCEcutoff

ICsat:

VCEcutoff:

Where IB intersects with the load line we have the Q pointQ-point is the particular operating point: Value of RBSets the value of IBWhere IB and Load Line intersectSets the values of VCE and IC.

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Circuit values effect Q-point

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Circuit values effect Q-point (continued)

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Circuit values effect Q-point (continued)

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Load-line analysis

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DC Fixed Bias Circuit Example

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Loadline Example Family of Curves

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Emitter Stabilized BiasENGI 242ELEC 222

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BJT Emitter BiasFor the Emitter Stabilized Bias Configuration:Draw Equivalent Input circuitDraw Equivalent Output circuitWrite necessary KVL and KCL EquationsDetermine the Quiescent Operating PointGraphical Solution using LoadlinesComputational AnalysisDesign and test design using a computer simulation

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Improved Bias StabilityThe addition of RE to the Emitter circuit improves the stability of a transistor outputStability refers to a bias circuit in which the currents and voltages will remain fairly constant over a wide range of temperatures and transistor forward current gain ()The temperature (TA or ambient temperature) surrounding the transistor circuit is not always constantTherefore, the transistor is not a constant value

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Emitter-Stabilized Bias CircuitAdding an emitter resistor to the circuit between the emitter lead and ground stabilizes the bias circuit over Fixed Bias

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Base-Emitter Loop

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Equivalent Network

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Reflected Input impedance of RE

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Base-Emitter LoopApplying Kirchoffs voltage law:- VCC + IB RB + VBE +IE RE = 0 Since: IE = ( + 1) IB We can write: - VCC + IB RB + VBE + ( + 1) IB RE = 0 Grouping terms and solving for IB:

Or we could solve for IE with:

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Collector-Emitter Loop

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Collector-Emitter LoopApplying Kirchoffs voltage law: - VCC + IC RC + VCE + IE RE = 0Assuming that IE IC and solving for VCE: VCE = VCC IC (RC + RE) If we can not use IE IC the IC = IE and:VCE = VCC IC (RC + RE)Solve for VE: VE = IE RESolve for VC: VC = VCC - IC RC or VC = VCE + IE RESolve for VB: VB = VCC - IB RB or VB = VBE + IE RE

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Transistor SaturationAt saturation, VCE is at a minimumWe will find the value VCEsat = 0.2VFor load line analysis, we use VCE = 0To solve for ICSAT, use the output KVL equation:

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Load Line AnalysisThe load line end points can be calculated:

At cutoff:

At saturation:

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Emitter Stabilized Bias Circuit Example

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Design of an Emitter Bias CE Amplifier

Where .1VCC VE .2VCCAnd .4VCC VC .6VCC

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Emitter Bias with Dual Supply

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Emitter Bias with Dual SupplyInput Output

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ENGI 242/ELEC 222Fixed BiasENGI 242/ELEC 222Fixed BiasENGI 242/ELEC 222Fixed Bias