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EXTENSION OFRESURFPRINCIPLETODIELECIWCALLYISOLATEDPOWERDEVI~Y.S.Huang and B.J. Baliga

Electrical & Computer Engineering Department,North Carolina State University,Raleigh, N.C. 27695-7911

AbstractThe RESURF principle has been extended to

dielectrically isolated power devices including the effect of theformation of an inversion layer under the isolating oxide. Twodevice structures that allow high voltage operation have beeninvestigated. Extensive two-dimensional simulations have beenperformed to relate the breakdown voltage to the doping and lengthof the drift region, the thicknesses of the silicon layer and isolatingoxide. It has been shown that lateral devices with breakdownvoltages up to 600 volts can be obtained.

IntroductionThe Reduced Surface Field (RESURF) rinciple hasbeen a very useful method for obtaining high voltage lateral power

devices in junction isolated(JI) silicon [l-31. This concept utilizesthe coupling of the charge in the drift region to the substrate inorder to obtain an improved lateral electric field distribution.Using this technique, lateral power MOSFETs with breakdownvoltages as high as 1200 volts have been demonstrated in JItechnology.

Dielectrically isolated @I) silicon technology is ofinterest for the fabrication of power integrated circuits because itprovides superior isolation with low leakage current. Many of theparasitics associated with JI are also eliminated with DI, allowingthe use of bipolar power devices which operate at higher powerdensity than power MOSFETs. In this paper, it is demonstratedthat the RESURF principlecan be applied to dielectrically isolatedpower devices. In this case, he charge in the drift region of thelateral power device is coupled to the substrate through theintervening oxide layer. It has been found that lateral devices withbreakdown voltages up to600 volts can be obtained.

The RESURF concept cannot be applied to a DItechnology directly by inserting a dielectric layer between theepitaxial layer and the substrate of the JI silicon because aninversion layer forms below the isolating oxideas n the case of anMOS capacitor structure. This prevents the spreading of th eelectric field into the substrate and reduces the charge couplingeffect.

A modified device structure (structure I), as shown inFig. 1, has been investigatedto eliminate the formation of theinversion layer under the buried isolation oxide (box)[4]. The keyfeature of this structure is that the cathode is connected to an N+region which is formed in the substrate. When a positive voltageis applied to the cathode, any electrons attracted to the surfaceunder the isolation oxide are removed by the adjacentN + egion.

CATHODEANODEP+

I / / / / Y / / / I/ / / / / A

P- SUBSTRATE

Fig. 1. DI device structure I.Consequently, inversion can no longer occur under the oxide andthe depletion layer spreads into the psubstrate. This allows theformation of DI devices with RESURF. However, compared withthe JI device, which can have the breakdown voltageequal to thetheoretical value of a parallel-plane unction when thepeak electricfield occurs at the horizontal p-n junction, this DI device hassmaller breakdown voltage due to the effect of curvature of thejunction between the N+ diffusion and the psubstrate when thebreakdown occurs in the substrate. Another drawback of structureI is that the additional p-n junction leadsto large substrate currentflow (due to the large depletion volume in the substrate) which isabout two orders of magnitude larger than the leakage current inthe drift region. A further disadvantage is that extra processingsteps, which may not be compatible with basic DI technology,arerequired to form the N+ diffusion into the substrate and to makea contact to this region.

As an alternative, a high voltage DI device structure(structure 11) can be obtained by carefully selected structuralparameters even when the substrate doping is large. This structureis shown in Fig. 2. The silicon layer is lightly doped andcan beeither p-type or n-type. Taking n-type silicon as an example,when a positive voltage is applied to the cathode, two depletionregions are formed: one is around the p-type anode diffusion andthe other above the isolating oxide. An inversion layer may evenexist above the oxide, so that the depletion layer is limited to afew microns. However, when the voltage is increased, the twodepletion regions overlap. Further voltage increase produces anelectric field that sweeps the holes away from the inversion layerallowing deep depletion to occur. During high voltage operation,the drift region is completely depleted and some of the voltage isthen transfered across the isolation oxide.

An appropriate implantationcan be applied into thefront silicon surface to adjust the total chargein the drift region asreported previously for JI devices [3]. An optimum dose must beused to obtain a high breakdown voltage with uniform electric fielddistribution along the silicon surface. If the implant dose is too

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ANODE ~ I

P- (or N-) DRIFT REGIONDIELECTRIC MYE R

N+ SUBSTRATE

Fig. 2. DI device structure 11.high, a high electric field occurs at the edge of the junction (anodeside). If too low a dose is used, the breakdown voltage is againlow due to the formation of a high electric field at the cathodeside.

Structure IThe breakdown voltage of structure I depends upon the

depth of the N+ diffusion in the substrate, the isolating oxidethickness, the drift region doping and thickness, the substratedoping, and th e drift-region length of the device. Fig. 3 providesthe relationship between the breakdown voltage and the drift regiondoping for the case of different isolating oxide thicknesses and fordifferent depths of the N+ diffusion. The drift region thicknessis 5 microns, the substrate doping is 1E14 cm-3, and the drift-region length is 30um in this case. For high drift region doping,the breakdown occurs at the silicon surface near the edge of theanode field plate due to incomplete depletion of the drift region.When the doping concentration is decreased, the breakdownvoltage increases, similar to the JI RESURF effect. At lower driftregion doping, the breakdown moves from the drift region into thesubstrate. This is in contrast with the JI RESURF devices wherethe breakdown shifts to the interface between the N+ cathode andthe N- drift region at low doping levels. Note that a high electricfield does not develop at the interface between the N+ cathodeand the N- drift region in the DI structure I. At an optimumdoping, breakdown occurs simultaneously n both the drift regionand the substrate.

Fig. 4 shows the breakdown voltage versus theisolating oxide thickness with differentN+ iffusion depths in thesubstrate. Here, the drift region doping is fixed at 1E15 cm-3. Itcan be Seen that devices with thin isolating oxide layers can sustainhigher voltages than devices with thick isolating oxide layers. Thebreakdown occurs in the substrate for smaller N+ diffusion depthsand in the drift region for larger diffusion depths. This can beexplained as follows: for smaller N+ diffusion depths, thebreakdown occurs at the p-n junction in the substrate at lowervoltages due to the junction curvature effect [5 ] . However, th e topsilicon layer (drift region) acts as a resistive field plate for theplanar junction under the isolation oxide. Therefore, thinner oxidethicknesses produce higher breakdown voltages. For larger N+diffusion depths, the junction in the substrate has a highbreakdown voltage, so the RESURFed junction in the drift regiondetermines the breakdown voltage. In this case, the doping in thedrift region can be decreased to improve the breakdown voltage.

The drift-region length and the substrate doping alsohave strong effect on the breakdown voltage. With a 60 micron

WP -1

0 0 2 0 4 0 6 08 1 1 2 1 4 1 6 18 2DRIFTREGION DOPING CONCENTRATION (1Oi5/CM3 ,

Fig. 3. Impact of drift-region doping on breakdown voltagefor structure I.

P -

stNCtue IN SI= IE ld cm 3NSlh = lE14 cm-3TS I =S m

. . . . . . . . . . . . . . . . . . . . . .0 2 4 6 8 10 12 14 16 18 20ISOLATING OXIDE THICKNESS Tbox (kA)

Fig. 4. Impact of buried isolating oxide thickness onbreakdown voltage for structure I.

drift-region length, breakdown voltages in excess of 600volts canbe achieved by choosing5000A solating oxide thickness, 7um N+diffusion depth under the isolating oxide and 1E14 cm-3 substratedoping concentration.Structure I1

In the D1 structure 11, the breakdown voltage is mainlydependent upon the drift region thickness, the isolation oxidethickness, the surface implant dose, and the drift-region length ofthe device. Fig. 5illustrates the effects of different implant doseson the electric field distribution along the silicon surface from theresults of PISCES I1 simulation. Note that the peak electric fieldoccurs at the anode side for high implant doses and at the cathodeside at low implant doses, indicating hat proper RESURF behavioris occumng in this DI structure. The breakdown voltage as afunction of implant dose in the drift region is shown in Fig. 6inth e case of a p-type drift region. An optimum implant dose mustbe selected to achieve maximum breakdown voltage, againindicating that the RESURF phenomenon is occumng. With adrift-region length of 60 microns, a breakdown voltage of nearly600volts canbe obtained with 25 micron drift layer thickness and4 micron isolating oxide thickness,

The breakdown voltage is also a function of the drift-region length and isolating oxide thickness as shown in Figs. 7and

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n n .sbumn 1NSI-i E l 4 m 3TSi=zUnl t a = 4 u nn=umh N d - Z P 4 2 c m 2

0 20 40POSITION (urn)Fig. 5. Electric field distribution along the silicon surface in

structure II.

U i m -mo ! , , , , , , , , , , , , I ,

i i I 20 25IMPLANT DOSE ( 102 IONS/CM2)

Fig. 6. Impact of implant dose in p-type drift region onbreakdown voltage for structure 11.

23e s a -!iP 300-W0U - -

TSi=Eum. Tbox=3umNSI=iEi4 m 3-=

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he im-

larger at the siliconlisolating oxide interface for the n-type silicon,as shown in Fig. 9 , than for the p-type silicon. Since the electricfield inside the oxide is three times that at the interface, thebreakdown voltage for the n-type drift region is (qN,T ,Ta/e ,higher than that for the p-type drift region. It can be seen fromFig. 10, which shows the dependence of the breakdown voltage onthe implant dose, that 2 micron isolating oxide thickness is enoughfor the n-type silicon drift region to get a breakdown voltage of600 volts, while 4 micron oxide thickness is requiredin the caseof p-type drift region(seeFig. 6). In the application to the lateralMOSFETs, the n-type drift region also provides a lower on-resistance due to the higher mobility for electrons as comparedwith holes.

sbubn IIN W a R *

In Fig. 10, the surface (top) RESURF implantapproach described above is compared with an implant at theinterface between the drift region and the isolating oxide (bottom)as discussed by A. Nakagawa, ef al. [6]. It can be seen thatdevices with RESURF implant on the top surface have a higherbreakdown voltage. An important observation is that thebreakdown voltage changes quite smoothly in some ranges of theimplant dose near the optimum point. This will provide goodprocess control during device fabrication.

3 i m -m0

Conclusioq

, , , , , , , , , , , I

In order to develop techniques for obtaining highvoltage integrable dielectrically isolated power devices, theRESURF principlehasbeen successfully applied to these devices.The formation of an inversion layer under the isolating oxide in DIRESURF structure has been eliminated by two proposed devicestructures. It has been found from extensive simulations that thedesign parameters for both of these structures can be adjusted toobtain breakdown voltagesin excess of 600 volts.

AcknowledgementThe authors would like to acknowledge the financialsupport for this work received from Texas Instruments, and thank

Dr. S . Malhi of Texas Instruments for his continuous interest andhelp.

Referenee[l] J.A. Appels and H.M.J. Vaes, "High-Voltage ThinLayer Devices(RESURF DEVICES)," 1979 EEE Int.

Electron Devices Meeting Digest, Abst. 10.1, pp.238-241, 1979.

[2] Z. Parpia and C.A.T. Salama, "Optimization ofRESURF LDMOS Transistors: An AnalyticalApproach," IEEE Trans. Electron Devices, vol. ED-37, pp. 789-796, 1990.

[3] M.F. Chang, G. Pifer, H. Yilmaz, E.J. Wildi, R.G.Hodgins,K. Owyang, and M.S. Adler, "Lateral HVICwith 1200-V Bipolar and Field-Effect Devices," IEEETrans. Electron Devices, vol. ED-33, pp. 1992-2001,1986.

[4] P. Ratnam, "Novel Silicon-on-Insulator MOSFET forHigh-Voltage Integrated Circuits," Electronics Letter,vol. 25, pp. 536-537, 1989.

[5] B.J. Baliga, Modem Power Devices. New York, NY:John Wiley, 1987.[6] A. Nakagawa, N.Yasuhara and Y. Baba, "New 500VOutput Device Structures for Thin Silicon Layer on

Silicon Dioxide Film," in 2ndInt. Symp. on PowerSemiconductor Devices and ICs, 1990, pp.97-101.