PPT on OSCILLATION TEST METHODOLOGY FOR MOSFET CIRCUITS

A

MAJOR PROJECT PRESENTATION ON

MENTORS: SUBMITTED BY: AKANKSHA GUPTA , ECE-2 (14413202810)Dr. JASDEEP KAUR ISHITA GUPTA, ECE-2 (14813202810)Ms. MANINDER KAUR R ASHOK KUMAR, ECE-2 (25013202810) ARUN KUMAR, ECE-2 (01313207311)

OSCILLATION TEST METHODOLOGY FOR MOSFET

CIRCUITS

OBJECTIVE

TO IMPLEMENT A PRACTICAL & LOW COST APPROCH FOR MOSFET CIRCUITS BASED ON OSCILLATION-TEST METHODOLOGY FOR THEIR TESTING.

ABSTRACT

• The oscillation-test strategy is a low cost and robust test method for mixed-signal integrated circuits.

• This project describes the design for testability (DFT) of MOSFET circuits based on oscillation-test methodology.

• The tolerance band of the oscillation frequency is determined by a Monte Carlo analysis taking into account the nominal tolerance of all circuit under test components which ensures high fault coverage and requires a negligible area overhead.

INTRODUCTION• Due to broad specifications of MOSFET circuits, the result is

long testing times, poor fault coverage and the necessity for dedicated test equipment.

• Oscillation-test strategy, based on transformation of the CUT to an oscillator has been recently introduced. We present a practical and low-cost test approach for CMOS circuits based on oscillation-test methodology.

SIMULATION TOOL

• SPICE A/D 9.2 :• SPICE stands for Simulation Program with Integrated Circuit

Emphasis.

• Helps the user simulate the circuit design graphically on the computer before building a physical circuit.

• Allows one to check the operability of the circuit model in real life simulations to validate its viability.

• Other softwares used:SPICE capture liteMicrosoft Excel

FLOW CHART

TWO STAGE CMOS AMPLIFIER

A Two stage op amp (block diagram)

MOS level diagram

CIRCUIT DESCRIPTION• Consists of ten MOSFET’s.

• Comprises of active load differential amplifier current mirror output buffer stage

• Current source provides biasing needed: M5 and M8 are used to reduce the fluctuations in current to give constant

current for driving. M3 and M4 (current mirror) provides necessary current to output stage or

to bias the output stage.

M6 and M7 increase the gain of the circuit.

OUTPUT WAVEFORMS OF AMPLIFIER

AMPLIFIER OUTPUT WITH NON INVERTING SINE WAVE INPUT

AMPLIFIEROUTPUT WITH INVERTING SINE WAVE INPUT

0 0.0005 0.001 0.0015 0.002 0.0025 0.003 0.0035

-0.04

-0.03

-0.02

-0.01

0.00

0.01

0.02

0.03

0.04 OUTPUT VOLTAGE

V(4)

TIME

0 0.0005 0.001 0.0015 0.002 0.0025 0.003 0.0035

-0.04

-0.03

-0.02

-0.01

0.00

0.01

0.02

0.03

0.04OUTPUT VOLTAGE

V(4)TIME

OSCILLATION TEST METHODOLOGY DESCRIPTION

• Based on partitioning a complex circuits into functional building blocks, such as amplifier, operational amplifier (OA), comparator.

• During test mode, each building block is converted to a circuit which oscillates and oscillation frequency is evaluated.

• The tolerance band for each CUT is determined based on a Monte Carlo analysis of the converted CUT.

• Used for simulations with a given error on different components.

• Useful for visualizing how the circuit will run with imperfect components as compared to ideal circuit

• Types of error distribution : Gauss - randomly pick values in the range of error specified

but with the majority of the values near the resistor value. Uniform - randomly selects values within the range specified

oblivious of what the actual value of the resistor is.

MONTE CARLO ANALYSIS

• fnom , nominal frequency range of the CUT is determined

• Fosc , oscillation frequency of the oscillatory operational amplifier is measured

• comparison between the two frequencies of the fault free circuit. fnom ̴ fosc

• If the oscillation frequency lies close to the nominal frequency range, then circuit is within the tolerance band.

MECHANISM OF MONTE CARLO ANALYSIS

TWO STAGE CMOS OP-AMP OSCILLATOR

Description: The circuit elements R1, R2,R &C are used for providing feedback form output to input making the circuit as Two Stage Cmos Op-amp Oscillator.

OUTPUT WAVEFORMS

OUTPUT WAVEFORM OF OSCILLATOR

FREQUENCY RESPONSE OF OSCILLATOR

0 0.0005 0.001 0.0015 0.002 0.0025 0.003 0.0035

-0.04

-0.03

-0.02

-0.01

0.00

0.01

0.02

0.03

0.04OUTPUT VOLTAGE

V(4)TIME

0.00 5000.00 10000.00 15000.00 20000.00 25000.000

0.005

0.01

0.015

0.02

0.025

V(4)@1 V(4)@2 V(4)@3 V(4)@4 V(4)@5

OUTPUT WAVEFORM OF OSCILLATOR WITH MONTE CARLO ANALYSIS

FREQUENCY RESPONSE OF OSCILLATOR WITH MONTE CARLO ANALYSIS

OUTPUT WITH MONTE CARLO

0.00 0.00 0.00

-0.04

-0.02

0.00

0.02

0.04

V(4)@1 V(4)@2 V(4)@3 V(4)@4 V(4)@5

0 5000 10000 15000 20000 250000.00

0.01

0.02

0.03

V(4)@1 V(4)@2 V(4)@3 V(4)@4 V(4)@5

FAULT MODELLING

• Involves techniques for inducing faults in systems to measure their response to those faults

• Types of faults: Parametric fault Catastrophic fault

• Basic fault models: Stuck-at fault model Bridging fault model Transistor fault model Open fault model Delay fault model

FAULT ANALYSISIn this work, seven bridging

faults, • M10 drain-source short

(defect 1-M10DSS),• M5 gate-drain short (defect

2-M5GDS),• M5 drain-source short

(defect 3-M5DSS),• M11 drain-source short

(defect 4-M11DSS),• M4 gate-drain short (defect

5-CCS), • compensation capacitor

short (defect 6-M6GDS),• M7 gate-drain short (defect

7-M7GDS) and• M11 gate VBIAS connected

to VSS (defect 8-M11G-VSS) simulating an open fault.

OUTPUT FIT-1

0 0.0005 0.001 0.0015 0.002 0.0025 0.003 0.0035

-0.04

-0.03

-0.02

-0.01

0.00

0.01

0.02

0.03

0.04

OUTPUT VOLTAGE VS TIME

V(4)

TIME

0 5000 10000 15000 20000 250000

0.005

0.01

0.015

0.02

0.025

O/P VOLTAGE Vs FREQUENCY

V(4)@1 V(4)@2 V(4)@3 V(4)@4 V(4)@5

FUTURE SCOPEMIXED ANALOG-TO-DIGITAL CIRCUITS

• Enhanced by performing Oscillation Test Methodology on digital & mixed analog-to-digital circuits.

• The applications includes:– Telecommunications,– Military– Medical,– Automative– Industrial Control & Supervision,– Consumer Products.

BUILT IN SELF TEST (BIST)• Mechanism that permits the machine to test itself to provide high

reliability, lower repair cycles times & limited technician accessibility and cost of testing during manufacturing.

FAULT COMPARISONFAULT TRANSISTOR TYPE OF FAULT FAULT

DETECTION

M10DSS DRAIN SOURCE SHORT YES

M5GDS GATE DRAIN SHORT NO

M5DSSDRAIN SOURCE SHORT

NO

M11DSSDRAIN SOURCE SHORT

NO

CCS GATE DRAIN SHORT

YES

M6GDSGATE DRAIN SHORT

YES

M7GDSGATE DRAIN SHORT

YES

8-M11G-VSS OPEN NO