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Dual Switch Flyback Solution
Solution for High Efficiency & Low Standby Power to meet 2013 EuP
Computing Product LinePower Conversion TaiwanFairchild Semiconductor
www.fairchildsemi.com2
Dual Switch QR Solution
VDD
RES
AGNDGND
LPC
VOUT
Lm
IDS ISR
R1
R2 R4
R3
n:1
GATE
8
3 5
7
64
Q2
Q1
IDS
Q1
FAN7382FAN6920
FAN6204
Enabled by FAN6920 : CRM PFC + QR Controller Combo IC FAN7382 : HVIC FAN6204 : Syn. Rectifier IC
www.fairchildsemi.com3
Basic Operation of Dual Switch Flyback
Vo
+
-Vin
+
-
Vin+
-
Vin
+
-
i Lm
Vo
+
-Vin
+
-
iLmnVo
-
+
+Vds-low
-
+Vds-high
-
Phase 2
vin
nvo
vin+nvo
Vds1 , Vds2
Q1 , Q2 gate
iLm
22
2
vin
id1, id2
Phase 1 Phase 3 Phase 4
Phase 1: Q1&Q2 On
Phase 2: Q1&Q2 Off, D1, D2 on
Phase 3&4: Q1&Q2 off, D1&D2 off
Vo
+
-Vin
+
-
iLk
iLmnVo
-
+
+Vds-low
-
+Vds-high
-
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Benefit of Dual Switch Flyback (1)Snubber and Leakage Inductance Loss Improved
Vo
VIN
Np:Ns
R C
ID
IDS
VDS
Vo
+
-Vin
+
-
iLk
iLmnVo
-
+
+Vds-low
-
+Vds-high
-
No snubber loss and heat problem
Single Flyback
Dual Flyback
Leakage inductance is recycled into bulk capacitor
iLK
iDS
Up to 70% of leakage inductance can be recycled
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Benefit of Dual Switch Flyback (2)Low MOSFET Vds and Near ZVS switching
VIN
Vo×
Vds
Vo× n
n
VIN /2Vo /
2
×
)( nVIN
Vo×
Vds
2n
/
)(
Vds of Single Flyback Vds of Dual Flyback
Vds = Vin + n*Vo + Spike Vds= Vin/2Spike is clamped by two recycle diodes, stress shared by two MOS
Low MOSFET Drain Source Voltage Good reliability
Allow large n design Near ZVS Switching Low switching loss
Larger switching loss
Near ZVS Switching
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Benefit of Dual Switch Flyback (3)Low VDS of SR MOS for secondary conduction loss
VO U T
VDS
VIN /n
VDD
RES
AGNDGND
LPC
VOUT
Lm
ISR
R1
R2 R4
R3
n:1
GATE
8
3 5
7
64
Q2
FAN6204
Benefit of high turn ration n to SR MOSFET
Example: Vin = 420V, Vo = 12V, n= 12
VDS = 420V/12 + 12V = 47V
Could choose 60V or 75V SR MOSFET
VI N
/ n + VO U T
VDS of SR MOS is : Vin/n + Vout
Large n Lower VDS Lower MOS Ron in lower price cost & efficiency
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Benefit of Dual Switch Flyback (4)Built in two level PFC output for low line efficiency
• Two Level PFC output to improve low line efficiency
150VRMS VAC
300V
390V
180VRMS
PFC Vo
3
COINV
PFC Vo
R1
R2RANGE
Debounce100ms
1
13
2.45V/2.1V
VIN
R3
AC line
Multi-vector Error Amplifier
R4
R5CVIN
2.5V
1.2V/1V Debounce100ms
Brownout
M1
When AC > 180V M1 off PFC Vo = 2.5V x (R1+R2)/R2When AC < 150V M1 on R2//R3 PFC Vo= 2.5V x (R1+R2//R3))/(R2//R3)
FAN6920 Block Diagram
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Benefit of Dual Switch Flyback (5)Deep extended valley switch for light load efficiency
• Deep extended valley switch ( up to 12th valley) to allow low operating frequency in light load Improved light load efficiency
Switching frequency (Hz)
VFB
1.2V 2.1V
fs,min
fs,max
20k
fs,g
VFB,max
2k
First valley detect
5th valley detect
12th valley detect
QR Operation without extended valley switch Other IC: QR Operation with extended valley ( up to 4th valley)
Load ↓ Freq↑ Poor light load efficiency
FAN6920 Deep extended valley switch
Freq. nearly constant
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Benefit of Dual Switch Flyback (6)Power Saving
• Dual Switch Flyback Could Meet < 0.5W @ 0.25W ( 2013 EuP) • PFC Stage:
• High line/light load Turn off PFC• Low line/light load burst mode
• QR Stage: • enter into burst mode when light load
• No snubber loss • SR Stage:
• Turn off SR when light load
Power Saving Load
VAC Po = 0 W Po= 0.25W
115V 0.186W 0.482W
230V 0.195W 0.486W
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Target Application
• For Power Range from 75W ~200W• All in One PC Power • LED TV • Notebook Adapter • Game Console • LED Lighting
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Dual-switch Flyback Schematic
+
-
VO
VAC
NTC
NBOOST
NCZD
RCZD
RVIN1
RVIN2
CVIN
CDD
CINF1
CINF2
RG1
RCS1
RPFC1
RPFC2
CCOMP
CO.PFC
RHV
RDET1
RDET2
RO1
RO2
RF CF
KA431
RBIAS
RRT
CRT
CFB
NP
NS
NA
RCS2
BCM Boost PFC Dual-Switch Quasi Resonant Flyback
VCC1
2
3
4
8
7
6
5
HIN
LIN
COM
VB
HO
VS
LO
FAN7382
RANGE1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
COMP
INV
CSPFC
CSPWM
OPFC
VDD
OPWM
HV
NC
ZCD
VIN
RT
FB
DET
GND
FAN6920
NB
VDD
RES
AGNDGND
LPCFAN6204
GATE
8
3 5
7
64
www.fairchildsemi.com12
Solution Comparison
Dual Switch QR Flyback LLC Note
Efficiency
D2D stage : Nearly ZVS switching
D2D stage: ZVS switching
PFC stage: Better low line efficiency by two level PFC output
PFC stage: Poor low line efficiency due to high PFC output
LLC could allow only narrow input voltage range
Light load (~20%) : Higher efficiency due to slow freq. to reduce switching loss
Light load (~20%) : Low efficiency due to high frequency.
FAN6920 could do up to 12th valley detection for slow frequency
Dynamic
Good line transient response Poor line transient response Inherent characteristic of topology
Good load transient response
Poor load transient response Inherent characteristic of topology
Power Saving <0.3W, <0.5W, LLC couldn’t allow PFC turn off at light load.
Design Easiness
Easy Difficult Resonant L & C control to prevent ZVS fail
Manufacture Easiness
Easy Difficult Resonant L & C control to prevent ZVS fail
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Key Parts Comparison
MOSFET 3 (PFC and dual switch) 3 (PFC and LLC)
Transformer1 for PFC1 for D2D
1 for PFC 1 for D2D 1 for resonant L & C
IC FAN6920MR+FAN7382 (HVIC)
CRM PFC+ LLC controller
SRIC FAN6204 2 SR controller
MOSFET 1 2 MOSFETs
Cost
-Lower transformer cost-Lower MOSFET cost-One SR MOSFET needed
-Higher transformer cost-Might need additional resonant T’mer-Two SR MOSFET needed-Might need additional std by stage for power saving
Power Range 75W~200W 100W~500W
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Slim Type 19V/ 90W Dual Switch FlybackEfficiency Test Result
22.5W 45W 67.5W 90W
115VAC 89.48% 90.54% 90.40% 89.61%
230VAC 91.24% 90.04% 90.86% 90.88%
Efficiency (18 AWG 1.2m wire include):
60mm95mm16.5mm
No Load Power Consumption:
VAC
(RM S) PI N
(W )
90 0.190
115 0.186
230 0.195
264 0.210Input Power @ 0.25WVAC (RMS) PIN(W)
115 0.482
230 0.486
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130W/19V AIO power
Spec: PIN<0.5W 2013 EUP
Input Power @ 0.25W
Efficiency 20%26W
50%65W
100%130W
3 pointAVG.
115Vac/60Hz 89.29% 92.15% 92.32% 91.25%
230Vac /50Hz 91.65% 92.15% 93.59% 92.56%
100mm 145mm
VAC (RMS) PIN(W)
115 0.478
230 0.482
VAC (RMS) PIN(W)
90 0.19
115 0.186
230 0.195
264 0.21
Input Power @ no load
AIO 130W
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200W/19V AIO Power
Efficiency 20%40W
50%100W
100%200W
3 pointAVG.
115Vac/60Hz 90.01% 91.62% 90.76% 90.79%
230Vac /50Hz 92.16% 91.76% 92.60% 92.17%
Output Power @ 0.5W
VAC (RMS) PIN(W)
115 0.762
230 0.781
VAC (RMS) PIN(W)
90 0.168
115 0.183
230 0.206
264 0.223
Output Power @ no load Output Power @ 0.25W
VAC (RMS) PIN(W)
115 0.484
230 0.487
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Example Circuit (19V/90W)
C40.33μ /450V
C50.33μ /450V
+C7
47μ/450V
1
23
Q4FQI13N50C
2 1
D1ES3J
D14LL4148
R46 51
1
23
Q2FQI13N50C
YC/102P/250V
R104.7M±1%
D13LL4148
R47 51
1
23
Q1FQI13N50C
21
D4ES1H
21
D2ES1JH
R114.7M±1%
R124.7M±1%
VSPFC VSPWM
R30154K±1%
R2278.7K±1%
R94.7M±1%
AC
AC -
+
BD1DF08S PFC_VO
D10RS1D
C27224P
C21NC
C25105P
R24220
C24221P
C20102P
RANGE1
COMP2
INV3
CSPFC4
CSPWM5
OPFC6
VDD7
OPWM8
FB 11
RT 12
VIN 13
ZCD 14
N.C. 15
HV 16
GND 9
DET 10
U2
FAN6920
C29102P
R2647.5K
C23471P
R23220
VSPFC
R27 560
C26473P
OPFC
VSPWM
VS 6
LO 5
LIN3
HIN2
VB 8VCC1
COM4
HO 7
U3FAN7382
C30225P
VB
C31104P
PFC_VO
TR1NTC/100K
R313.6K
R747K
R847K
+ C1533μ /50V
21
D9RS1D
R298.2K±1%
R2847.5K±1%
C28NC
12
CN1
CN/2pin AC inlet
MO
V1
MO
V/U
07 470
C1XC/0.47u/250VL
F1
F/4A/250V
R2
1.5M/1206
R1
1.5M/1206
+
C8820μ /25V
VO+
VO+1
VO-1
R160R15 R17
0R27
L2
DET1
U4LTV357A
C33103P
R51330
R521.5K
R5068K, 1%
R5310K, 1%
R4910K
AK
RU5KA431SAMF2TF
VO+
VO
2 1
D15ES1JH
HG
HG
VBO
LG
LGOPWM
OPWMAUX
D7S1M
D6S1M
PFCZCD
PFCZCD
FBPWM
FBPWM
VDD
VS
VS
VBO
AUX
R5 100R4 100R3 100
C17102P/100V
R219.1K±1%
R20220K±1%
R4811.3K±1%
R1847K±1%
C32NC
VO
C19104P
VDD
C18104P/50V
R6249K
R25 NC
C22474P
12
56
411
TX1
+C6
47μ/450V
GATE3
PGND 4AGND 6
LPC 8
VDD5
RP/RES7
U1FAN6204/5
1
2 3
Q5FDB031N08
21
D11NC
R19R/0R
SRDET
SRDET
VO1
VDD
C10
YC/102P/250V
+
C9820μ /25V
+ C1633uF/50V
VDD
C11YC/102P/250V
C3NC
C2NC
AC
AC -
+
BD2DF08S
VBO1
L4
S047
VO
21
ZD118V/0.5W
21
ZD218V/0.5W
VLD
OPWMR45NC
OPFC
2 1
D8LL4148
R1351
2
13
Q32N2907
R14
100
R15NC
PFC_GATE
D12LL4148
84
35
6 1
7
2
11
TX2
2 1
L3A220μ /DR127
2 1D5
SS16
PFC_GATE
L1
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