WAFER-BOND MICRO-VOID PHYSICAL ANALYSIS...32 Conclusions •Micro-void origin –Micro-voids are...

WAFER-BOND MICRO-VOID

PHYSICAL ANALYSIS

C. Cassidy1, H. Plank2, T. Ganner2, L.G.W. Tvedt3, C. Gspan2, M.

Dienstleder2, J. Wagner2, M. Krause4, C. Patzig4, S. Brand4, B. Böttge4,

J. Siegert1

1austriamicrosystems AG 2FELMI-ZFE (Graz, Austria)

3SINTEF ICT, Microsystems and Nanotechnology (Oslo, Norway) 4Fraunhofer-IWM (Halle, Germany)

2

Purpose

• Share a 3D-integration

analysis problem

• Highlight real-life practical

problems & difficulties

• Get feedback & ideas…

3

Outline

1. Introduction to bonding & “micro-voids”

2. PFA Successes

3. PFA challenges & problems

4. Summary, current status

5. Workshop question

Technology overview

4

Solder balls

TSVs

- CMOS processing

- Wafer bonding

- TSV (unfilled “via last”)

- Finish CMOS/bumping

Wafer bond

interface

Wachmann et al., ICMAT 2011

Wafer Bonding

• Bond process: – Plasma-activation

– Direct bonding (Si/SiO2)

– Low temperature anneal

– CSAM

• Bond surfaces – 1) Polished Si wafer

– 2) Deposited oxide layer, CMP finish (lower)

5

Pre-bonding

Post-bonding

Kraft et al., ECTC 2011

EVG

Gemini

toolset

What is a “micro-void”?

6

Wafer-level CSAM detects circular features in the bond

interface.

Specific size distribution (diameter ~100µm)

Micro-void TSVs

Wafer-level Scanning

acoustic microscopy

CSAM

“upper

wafer”

Bond oxide

“lower”

wafer

“Micro-void”

TSV

Bond

Interface

Micro-void questions

7

– What is the root cause?

– Reliability risk or cosmetic defect?

– Do they move or grow?

– Interrupted TSV connection?

– Fracture/delam initiation point?

Fig. B

Fig. A

Fig. C

TSVs

CSAM

Micro-void physical analysis

8

Physical analysis

9

Accessing the bond interface

Bond

interface

The interface is

not easy to

access

Sample preparation approach

10

1. Si Etch removal, oxide

underside as etch stop

“upper

wafer”

Bond

interface

Optical

microscopy

Lower wafer

selectively

etched away

Lower Si removed using

wet/dry etch

Bond oxide

PRO: Defect is visible and

accessible to PFA techniques

CON: Defect might be

changed by etch/release

process

Optical microscopy (after Si etch

removal)

11

Delamination/ voids/

bond defects

“upper

wafer”

Optical

microscopy

Bond oxide

11

1 2 3

Optical microscopy; 3 distinct

zones can be discerned

CSAM

Cross-section & in situ

optical microscopy

12 12

1. Defect is undisturbed

2. Outer delaminated

region is disturbed.

Trapped gas escapes,

unbonded oxide at the

polishing front fractures

off, following the

contour of the ring

3. As 2. Polishing front

is now right “in” the ring

region, but has not

compromised it yet.

4. The ring is “opened”

by the polishing front,

allowing the gas inside

to escape.

5. None of the oxide at

the polishing front in

the vicinity of the defect

is now bonded, and

fractures and rips off

easily during polishing

1. 2. 3. 4. 5.

Defects appear to consist of…

- A. outer debonded area

- B. sealing ring (bonded/ contaminant)

- C. internal debonded area A

B C

13

Defect 1

Is there a foreign contaminant?

- ToF-SIMS depth profile (F-IWM), through bond interface

- No foreign elements/compounds could be detected

Before ToF

depth profile

After ToF

depth profile

Void collapse example (OM)

14

Pre-collapse Post-collapse

- Voids collapse after e.g. ultrasonic cleaning, mechanical,

pressure, vacuum exposure (SEM/FIB), time…

- Complicates PFA attempts

What topograpy is associated with

the defect?

15

Post-collapse (defocus) 8nm ridge

10nm recess

AFM on the oxide surface (ZFE), after collapse

Ultrasonic

agitation to

collapse the

void

TEM & analysis (bond oxide still in place)

16

Successful micro-

void TEM lamella

preparation

What are the recess and

ridge composed of?

Si substrate

Bond oxide

TEM

17

5 n m 5 n m

Reference

area

Defect area

EFTEM shows Pt

EFTEM shows Si and O

EFTEM shows Si and O

2.8 nm

5 n m5 n m Si

Si Si

Bond oxide Bond oxide

Sample prep Pt

Thick (5-8nm)

oxide layer?

Typically 1-2nm native oxide expected.

e.g. Suni et al, J. ECS, 2002

Sample preparation approach

18

2. (Assisted) Debonding

PRO: Bond interface

is exposed for surface

analysis

CON: Unreliable

debonding, possible

material transfer,

defect navigation,

contamination

A

B

C

White light interferometry

(debonded Si surface)

19

WLI (Sintef) identified a slight recess (~-10nm, blue in the

image below), with an enclosing raised ring (~+15nm, red in

the image below).

AFM (debonded surfaces, ZFE)

Polished backside Si surface Polished oxide surface AFM

artifact

Problem stems from

topography on polished

Si surface.

Topographical surface analysis on both surfaces…

No significant

topography

Polished oxide

surface is OK!

Summary of useful PFA results

• Micro-voids are caused by existing surface topography.

• This topography is uniquely associated with the polished Si wafer.

• ToF-SIMS indicates that no foreign species are present.

• TEM identifies a suspiciously thick oxide layer (5-8nm) in the defect region

21

Pending

• Further defect TEMs

• Reference, pre-bonding TEMs (surface

polishing, cleans, plasma activation)

– Characterization of surface, particularly

oxidation

• Elemental analysis on debonded defects

22

PFA Problems

23

1. Targeting/navigation

24

- Buried, featureless surfaces, disappearing voids

Optical Laser

marks

2. FIB/SEM problems

• Cross-sections: Nothing at the interface

– A) Void collapsed?

– B) Insufficient resolution/lack of contrast

mechanism

25

Deposite

d FIB

markers

Micro-void

Si

Oxide

Bond interface

3.TEM problems

26

1

µm

- Lamella fracture,

owing to

unbonded/weakly

bonded surfaces

Si

Oxide

Bond

interface Fracture at

micro-void

area

3.TEM problems

27 1 µ m1 µ m

Bright Field

2 0 n m2 0 n m

after 19 seconds (in the electron beam)

“reweld”

4. ToF-SIMS problems

28

• Spikes (+ve, -ve) in ToF depth profiles

• Assumption is instability of defect,

opening of void, “explosions” of trapped

gas

Time (s)200 400 600 800

010

110

210

310

410

510

Inte

nsity (

co

un

ts)

100

101

102

103

104

105

Inte

nsity (

co

un

ts)

C-C-C-C-C-C-C-C-C-

OH-OH-OH-OH-OH-OH-OH-OH-OH-

F-F-F-F-F-F-F-F-F-

Si-Si-Si-Si-Si-Si-Si-Si-Si-

O2-O2-O2-O2-O2-O2-O2-O2-O2-

Cl-Cl-Cl-Cl-Cl-Cl-Cl-Cl-Cl-

SiO-SiO-SiO-SiO-SiO-SiO-SiO-SiO-SiO-

Br-Br-Br-Br-Br-Br-Br-Br-Br-

+ve spikes

All counts fall to zero as

bond interface is exposed

Process improvement/reliability

assessment

29

Strategy 1: Elimination

• No progress to date

– Physical root cause

– Identification of processing step(s)

– Process improvement

30

Strategy 2: Reliability

assessment

• Accelerated stresses

– Micro-voids are stable (A)

• Micro-manipulation

– Trapped bubbles can’t be

“micro-maneuvered” beyond

their original boundaries (B)

• Bond strength tests

– Micro-void presence has no

detectable effect on fracture

mode or fracture stress values

(C) 31

(A)

(B)

(C)

32

Conclusions • Micro-void origin

– Micro-voids are caused by nm-scale local topography on the

backside of the polished bond surface, perhaps caused by local

oxide thickness variations.

– The root cause not yet found.

– Reliability data: Do not pose a reliability risk

• PFA of wafer-bond interface defects is challenging – Buried defects, navigation/targeting

– Instability of defects during FA (trapped bubbles)

– Aspect ratio (defect, defect to enclosing material)

– High bond strength

Thank you for your attention

Workshop question…

33

Workshop question

Until now, we always

had to bond the wafers

to find the defect in

CSAM.

How could we find the

flaws on the surface

prior to bonding?

34

Backup

35

What topograpy is associated with

the defect?

36

Micro-void 40nm air

bubble

AFM on the oxide surface (ZFE)

AFM (oxide surface)

37

Pre-collapse

Post-collapse (defocus)

40nm air

bubble

8nm ridge

10nm recess

Strategies

38

1. Prove that

there is no

reliability risk

a) Understand the

mechanism

b) Gather reliability

data

c) Convince customers

2. Eliminate micro-

voids

a) Understand the

mechanism

b) Process improvement

Both approaches require physical analysis to determine the root cause.

Exposed oxide:

micro-manipulation

• Defect oxide cap is very elastic – Voids disappear with

gentle pressure

– Re-appear when pressure removed

• Collapse – With extensive force and

scratching, voids can be permanently collapsed

• Movement – The debonded

area/bubble cannot be moved, manipulated or increased beyond its original area

39

Probe

needle

Probe

needle

TSV

4. ToF-SIMS problems

• Si etch process (sample prep) shows some non-

uniformity and consumption of oxide (A)

• Large sputter volume, thin defect layer

- 0.9-2.2µm oxide sputter, 15nm defect

• Interpretation of depth profiles was difficult (B)

40

ILD0

Bond oxide

Sputtering

direction

(A) (B)

1. Targeting/navigation

• If debonding the surfaces, no surface

defect can be seen afterwards.

• No navigation guides.

41 Debonded surface, oxide side

Intact

oxide

Oxide etched

(HF)

Debonded surface, Si side

The defect

cannot be

seen

1. Targeting/navigation

• Invisible in electron/ion microscopy.

• Laser marking is possible, but often void disappears

42

Laser

marks Void has

disappeared

5. White light interferometry

• Excellent for Si surface

• Not possible for transparent BO surface

=> Large area AFM a better option

43

WLI: Si surface