Oscilloscope Watch Teardown

Oscilloscope WatchTeardown

Agenda

• History and General overview• Hardware design:

– Block diagram and general overview– Choice of the microcontroller– Design of the analog frontend– Design of the waveform generator– Design of the power stage

• Firmware design:– Maximize use of the peripherals– High speed sampling using the DMA– Low power techniques to maximize the battery life– Using the XMEGA event system to offload the CPU

• Questions and answers

Oscilloscope Watch history

Xprotolab: World’s Smallest Oscilloscope Concept image

Xprotolab Watch?

Oscilloscope Watch Features

• Mixed Signal Oscilloscope: 2 analog and 8 digital channels• Advanced Trigger• Meter Mode: Average, Peak to peak and Frequency• XY Mode• FFT Mode (Spectrum Analyzer)• Horizontal and Vertical Cursors• Arbitrary Waveform Generator with Sweep• Curve tracer function

General Overview

Block diagram and general overview

Choice of the microcontroller

8bit vs 32bit ?

Choice of the microcontroller

• Critical parameters:– The speed of the ADC– DAC included– The size of the package

• Advantages of keeping the 8bit AVR:– Proven design– No porting of code

• Disadvantages:– Limited RAM– Expansion limited

Design of the Front End

Analog Frontend

𝑉 𝑜𝑢𝑡=𝑉 𝑖𝑛

10+1.024𝑉

Additional gain is done in the micro’s ADC

Design of the Front End

Front end bandwidthApproximately 320kHz, but the micro’s capacitance and

ADC characteristics lowers it to about 200kHz

Design of the waveform generator

AWG Amplifier

𝑉 𝑂𝑈𝑇=−4 ∙𝑉 𝐷𝐴𝐶+4.096𝑉

Design of the waveform generator

AWG Bandwidth

Bandwith is 50kHz, determined by the RC feedback

Design of the power stage

Load sharing

AN1149 description of the circuit

Battery supplies system load when power source is absent

Design of the power stage

Digital Power

Battery Monitor

- Very low quiescent current- Switch to 1.8V when display is off

- Battery monitor can be disabled, so it doesn’t draw current

- Output impedance of 10kΩ

Design of the power stage

Analog Power

- This section generates +5V and -5V from the input voltage- The analog power section is disabled when in watch mode

Maximize use of the peripherals

Architecture block diagram

High speed sampling using the DMA

- “High Speed” for an 8bit microcontroller running at 32MHz…- Instead of polling or using interrupt handlers to read and

process the result registers, the XMEGA’s DMA is used to move data from the result registers to memory buffers.

- This moving of data is done without CPU intervention.

Low Power techniques

Microcontroller's Power Budget

- Maximize the time spent in Sleep mode- Use the highest CPU clock speed, unless the task requires a specific amount of time (e.g. serial communication), in which case, avoid using a higher CPU speed than needed- Turn off unused peripherals

Low Power techniques

• Use the RTC with the 1024Hz from the 32768Hz external crystal• Set I/Os at a known state• Disable the digital input buffer on pins that are connected to

analog sources• Disable the BOD - or better, disable it while in sleep - to reduce

power consumption. Use sampled mode if only slow changes in operating voltage are likely.

• Disable the On Chip Debugging and the JTAG interface• Enable power reduction mode for EEPROM and Flash to reduce

power consumption in ACTIVE mode• Use page-wise writing to EEPROM rather than byte-wise

Low Power techniques - LCD

• The DMA is used to send data to the SPI.• Redundant transfers are removed in the SPI.• The next frame is rendered during the SPI transfer, this is

performed using the DMA’s double buffering.• Graphics are pre-rendered and stored in RAM.

XMEGA event system to offload the CPU

- CH0: TCE0 overflow used for ADC- CH1: ADCA CH0 conversion complete- CH2: EXT Trigger or logic pin for freq. measuring- CH3: TCD1 overflow used for DAC- CH4: TCC0 overflow used for freq. measuring- CH5: TCC1 overflow used for freq. measuring- CH6: CLKPER / 32768 -> every 1.024ms- CH7: TCD0L underflow: 40.96mS period - 24.4140625 Hz

Questions?