Evaluation of Pressureless Silver Sintered High Power...

Evaluation of Pressureless Silver Sintered High Power Semiconductor Devices by Measurement of Thermal

Impedance

Martin Beierlein, Michael Kaloudis

University of Applied Sciences Aschaffenburg Faculty of Engineering

Packaging and Interconnection Laboratory

Advanced Packaging Conference Dresden 08.10.2013

08.10.2013 Martin Beierlein

Agenda

Motivation Sintering of power semiconductors Measurement of thermal impedance Results of the measurements Summary

08.10.2013 Martin Beierlein

Motivation

Miniaturization of semiconductors Semiconductor devices based on SiC Reliability of solder alloys RoHS compliance Fast, non-destructive quality assurance

08.10.2013 Martin Beierlein

Conventional assembly and example of application

Internal view of a Conventional power module assembly 1 Heat sink, 2 Solder, 3 Copper, 4 Ceramic, 5 Die, 6 Bond wire

Ref. [1]

08.10.2013 Martin Beierlein

What is silver sintering?

Silver sintering is the process of compacting a paste of silver particles and organics by the use of thermal energy.

08.10.2013 Martin Beierlein

Pressureless sintering process

Dispensing/ Printing

Positioning

Heating

08.10.2013 Martin Beierlein

Typical power cycling test of soldered and sintered diodes

Number of power cycles Ref. [2]

Cum

mul

ativ

e fa

ilure

Typical power cycling test between +45 and +175 °C

08.10.2013 Martin Beierlein

Thermal impedance Zth

Resistances and capacitances represents the different materials.

08.10.2013 Martin Beierlein

Test object & conducting

3cm

3cm

Substrate Layout Conducting 1 Thermocouple, 2 Heat sink, 3 DCB-substrate, 4 Sinterlayer, 5 Die, 6 Spring contacts

08.10.2013 Martin Beierlein

Typical linear calibration curve of diodes

Ref. [4]

08.10.2013 Martin Beierlein

Measurement setup for Zth

Heating current IH= 25 A for 20 s Measuring current IM = 50 mA Measuring of VF for 100 s

08.10.2013 Martin Beierlein

Test matrix I

Varied parameter: sintering time Wet layer thickness of about 75 µm

08.10.2013 Martin Beierlein

Computer tomography of test objects

A B C

08.10.2013 Martin Beierlein

Results of Zth Measurements

-A -B -C

08.10.2013 Martin Beierlein

Test matrix II

Varied parameter: sintering time Wet layer thickness of about 100 µm

08.10.2013 Martin Beierlein

Computer tomography of test objects

A B C

08.10.2013 Martin Beierlein

Results of Zth Measurements

-A -B -C

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Discussion of Zth Measurements

A: Good die attach with high density silver layer

B: Higher micro porosity causes higher thermal impedance

C: Partially connected die leads to higher thermal impedance

08.10.2013 Martin Beierlein

Summary

Correlation between porosity and Zth

Measurement method allows a non-destructive evaluation of the die attach quality

Outlook: Optimization of the experimental setup Quantitative correlation between porosity and Zth

08.10.2013 Martin Beierlein

References

[1] Perpina, X. and Jorda, X. and Vellvehi, M. and Rebollo, J. and Mermet Guyennet, M. Long-Term Reliability of Railway Power Inverters Cooled by Heat-Pipe-BasedSystems. 58(7):2662-2672, 2011. Available under: http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=5601771

[2] Knoerr, M.; Kraft, S.; Schletz, A.: Reliability assessment of sintered nano-silver die attachment for power semiconductors, S. 56–61. Available under: http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=5702605

[3] Dr. Thomas Schütze. Thermische Ersatzschaltbilder: An 2008-03 application note v1.0 Infi neon Technologies AG, 16.06.2008..

[4] Department of Defense. Test Method Standard Test Methods for Semiconductor Devices, chapter Thermal Impedance Response Testing of Diodes. METHOD 3101.3. in MILSTD-750D. 30.07.2013.