EECS 522 RF Power Amplifier with Cartesian Feedback

EECS 522 RF Power Amplifier with Cartesian Feedback

Alexandra Holbel, Fu‐Pang Hsu, and Chunyang ZhaiApril 18th, 2011

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Outline• Motivation• Power Amplifier Design• Mixer Design• Cartesian Feedback• System Results

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Motivation• RF transmitter for communication

– 2.4GHz

• Improve linearization with feedback

3

Power Amplifier Overview• Tradeoffs in PA design:

– Efficiency– Linearity

• Run PA close to saturation for efficiency, then use feedback to improve linearization

• RF PAs have a mixer to up convert the signal from baseband to RF

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PA Schematic• Straightforward design

• Power efficient• Differential to reject RF coupling to power supplies

‐ vinVbias

Vbias Vbias

Vbias

+ vin

‐ vout+

Vbias

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PA Simulation Results

Specification Results

PAE 48 %

1dB Compression (input referred)

‐1.89 dBm

Max Output Power 12 dBm

-30 -20 -10 0 10 20-20

-10

0

10

20

30

40PA 1dB Compression

Input Power (dBm)

Out

put P

ower

(dB

m)

1dB Compression Point

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Mixer Schematic

IF+IF‐

LO+ LO+

LO‐RF+

RF‐

• Better isolation• LO and RF 

rejection at IF output

• Higher linearity• Good 

suppression of even order spurious product

• Less source voltage noise

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Mixer Simulation Results

Specification Results

1dB Compression (input referred)

‐8.02 dBm

IIP3 1.57 dBm

RF to IF Isolation 77.63 dB

LO to IF Isolation 47.50 dB

LO to RF Isolation 95.88 dB

Conversion Gain 4.65 dB

Noise Figure 21.73 dB

Power Consumption 3.64 mW-40 -30 -20 -10 0 10

-40

-30

-20

-10

0

10

20

30Mixer 1dB Compression and IIP3

Input Power (dBm)

Out

put P

ower

(dB

m)

1dB Compression Point

IIP3

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Cartesian Feedback• Improves distortion by increasing the linearity through feedback

• Uses two independent I and Q feedback loops• Robust for PVT variation

[Dawson] 9

H(s) Loop Filter• Slow rolloff

– 45 deg phase for stability 

C

αC

α2Cα2R

αR

-40

-20

0

20

40

60

80

Mag

nitu

de (d

B)

103

104

105

106

107

108

109

1010

-90

-60

-30

Phas

e (d

eg)

Bode Diagram

Frequency (rad/sec)

sKsH )(

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System Simulations

I

Q

I

Q

I

Q

Ideal Closed LoopOpen Loop

RF output

RF input

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System Simulations

-30 -20 -10 0 100

5

10

15

20

25

30

35

401dB Compression Point for System

Input Power (dBm)

Out

put P

ower

(dB

m)

Red = Open LoopBlack = Closed Loop

1dB Compression Point

Specification Open Loop

Closed Loop

1dBCompression (input ref)

‐12 dBm ‐5 dBm

Max OutputPower

24 dBm 22 dBm

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Results Summary

Specification [5] [6] Open Loop Closed Loop

1dB Compression (input referred)

‐10 dBm ‐31 dBm ‐12 dBm ‐5 dBm

Max Output Power 21.8 dBm 8 dBm 24 dBm 22 dBm

Area ‐ ‐ 1.15mm2 >1.15mm2 

Power Amplifier

Upcon

versionMixer

Downcon

versionMixer

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Future Works• H(s) implementation• Linearity of feedback mixer• Phase alignment design

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Questions?

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References[1] Chih‐Chun Tang; Wen Shih Lu; et al; “A 2.4 GHz CMOS 

downconversion doubly balanced mixer with low supply voltage,” ISCAS, 2001.

[2] Palaskas, Y.; Taylor, S.S.; et al; “A 5 GHz class‐AB power amplifier in 90 nm CMOS with digitally‐assisted AM‐PM correction,” CICC, 2005.

[3] J.L. Dawson, Feedback Linearization of RF Power Amplifiers.  United States: Kluwer Academic, 2004.

[4] J.K. Roberge, Operational Amplifiers: Theory and Practice. New York: Wiley, 1975.

[5] D. Chowdhury; et al, “A 2.4GHz mixed signal polar power amplifier with low‐power integrated filtering in 65nm CMOS,” ISSU, 2010.

[6] L. Perraud; et al, “A direct‐conversion CMOS transceiver for the 802.11a/b/g WLAN standard utilizing a Cartesian feedback transmitter,” JSSC, 2004.

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