ECE 477 Design Review Team 4 Spring 2008 Zach Dicklin Amy Ritter Ian Bacon Eric Yee

ECE 477 Design Review ECE 477 Design Review Team 4 Team 4 Spring 2008 Spring 2008

Zach Dicklin

AmyRitter

Ian Bacon

Eric Yee

OutlineOutline• Project overview Project overview • Project-specific success criteriaProject-specific success criteria• Block diagramBlock diagram• Component selection rationaleComponent selection rationale• Packaging designPackaging design• Schematic and theory of operationSchematic and theory of operation• PCB layoutPCB layout• Software design/development statusSoftware design/development status• Project completion timelineProject completion timeline• Questions / discussionQuestions / discussion

Project OverviewProject OverviewDigiJock

shoppers also like to shop at…

AD

Targeting ads… Reaching demographics…The future of advertising!

Project-Specific Success CriteriaProject-Specific Success Criteria

RFID

DigiJocks

• Decode a valid shopper RFID tag.Decode a valid shopper RFID tag.

Project-Specific Success CriteriaProject-Specific Success Criteria• Retrieve shopper’s characteristics from a Retrieve shopper’s characteristics from a

database indexed by decoded ID.database indexed by decoded ID.

RFID

DigiJocks

What does this DigiJock like?

Project-Specific Success CriteriaProject-Specific Success Criteria• Load “general” and targeted advertisements Load “general” and targeted advertisements

from a database.from a database.

RFID

DigiJocks

Where is this ad?

Project-Specific Success CriteriaProject-Specific Success Criteria• Display targeted advertisement images on a Display targeted advertisement images on a

local LCD in response to current shopper’s ID.local LCD in response to current shopper’s ID.

RFID

DigiJocks

AD

Project-Specific Success CriteriaProject-Specific Success Criteria• Display “general” advertisement images on a Display “general” advertisement images on a

local LCD when valid RFID tag is not detected.local LCD when valid RFID tag is not detected.

RFID

DigiJocks

HI

Block DiagramBlock Diagram

Microcontroller(MC9S12NE64)

LevelShifter

(Max3322)

LCDController

(SLCD)

RFID Reader

(TRRO1OEM)

RFID tags

2

CLOCK1

PushButton

SD CardReader

(BOB-00204)

RJ-45

4

24

7 2

1

Voltage Regulator

3.3V

Microcontroller(MC9S12NE64)

LevelShifter

(Max3322)

LCDController

(SLCD)

RFID Reader

(TRRO1OEM)

RFID tags

2

CLOCK1

PushButton

SD CardReader

(BOB-00204)

RJ-45

4

24

7 2

1

Voltage Regulator

3.3V

SCI

SCI

SPI

Ethernet

SCI

SCI

SPI

Ethernet

Component Selection RationaleComponent Selection Rationale

• Agatha’s Major ComponentsAgatha’s Major Components– MicrocontrollerMicrocontroller

MC9S12NE64

Freescale

FREE + DevKit

On board

2 Channels

Component Selection RationaleComponent Selection Rationale

• Agatha’s Major ComponentsAgatha’s Major Components– RFID ReaderRFID Reader

TRR01OEM

Up to 28.25 inches*

6 x 6 x 1.5 cm

YES

YES

YES (round / 18” diameter)

$78.00

*tag dependent**includes license fee

• Agatha’s Major ComponentsAgatha’s Major Components– Display driverDisplay driver

$429

Component Selection RationaleComponent Selection Rationale

*includes external RAM

SLCD

SCI

$240 (discounted)

Packaging DesignPackaging Design

• Outer KioskOuter Kiosk– 5.7” LCD Display5.7” LCD Display– 5’ for eye-level viewing5’ for eye-level viewing– Wood constructionWood construction– WeightedWeighted

Packaging DesignPackaging Design

• Inner KioskInner Kiosk– Circuitry on floorCircuitry on floor– Power/EthernetPower/Ethernet– LCD ScreenLCD Screen– RS-232 runs 15’RS-232 runs 15’

to RFID readerto RFID reader

Packaging DesignPackaging Design12

0

12

Microprocessor(HC9S12NE64)

31

3.8

2424

Serial Port

15.9

Ethernet

31

Level shifter

3.8

I/O Header

4014

10

2.5

Serial Port

31

10

SPI Header

103

(Dimensions in mm)

Schematic/Theory of OperationSchematic/Theory of Operation

• Main functionsMain functions– Read RFID TagsRead RFID Tags– Choose a display imageChoose a display image– Retrieve image data from updatable SD cardRetrieve image data from updatable SD card– Communicate / update data with Ethernet Communicate / update data with Ethernet – Send image data to LCD screenSend image data to LCD screen– User interaction with displayUser interaction with display

Schematic/Theory of OperationSchematic/Theory of Operation

• Basic Power RequirementsBasic Power Requirements– All components run at 3.3VAll components run at 3.3V– On board voltage regulatorOn board voltage regulator– Microcontroller voltage regulatorMicrocontroller voltage regulator

Schematic/Theory of OperationSchematic/Theory of Operation

MICROI/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI Pinout

ETHERNET

POWERPOWER

POWERHEADER

• Power/Ground header for 5V Wall-wart

DIODE/FUSE

REGULATOR

• 278R33 - 3.3V regulator

• Diode/Fuse for protection

Schematic/Theory of OperationSchematic/Theory of Operation

MICROI/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI Pinout

ETHERNET

POWER

MICRO

MICRO• MC9S12NE64

I/O

SCI SPI

ET

HE

RN

ET

• Decoupling Caps• Interfacing

3.3 Voltage Rail

Ground Rail3.

3 V

olta

ge R

ail

Gro

und

Rai

l

DECOUPLING CAPS

D CAP

CLOCKINGBDM

Schematic/Theory of OperationSchematic/Theory of Operation

MICROI/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI Pinout

ETHERNET

POWER

ETHERNET

ETHERNET

• RJ-45 Connector

RJ-45

DECOUPLING CAPS

PULL UP• Pull Up Resistors

• Freescale’s suggested layout

• Decoupling caps

3.3 Voltage Rail

Schematic/Theory of OperationSchematic/Theory of Operation

MICROI/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI Pinout

ETHERNET

POWER

CLOCKINGBDM

CLOCKINGBDM

• Freescale’s suggested layout

3.3 Voltage Rail

Ground Rail

HEADER

• BDM with external reset switch

• Clocking - 25MHz

RESET SWITCH

25 MHz Oscillator

CAP / RES network

Schematic/Theory of OperationSchematic/Theory of Operation

MICROI/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI Pinout

ETHERNET

POWER

SCI SERIAL

SCI SERIAL

• Both SCI ports

• Pinned out

HEADER

• Level Shifter

MAX3222 Level Shifter

CAP / RES NETWORK

• Suggested Layout

SERIAL PORTS

• SLCD and RFID connections

Schematic/Theory of OperationSchematic/Theory of Operation

MICROI/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI Pinout

ETHERNET

POWER

SPI Pinout

HEADER3.3 Voltage Rail

Ground Rail

• SPI interfaces with SD Card Reader

• Status LED’s using PG port GPIO

STATUSLED’S

3.3

Vol

tage

Rai

l

Schematic/Theory of OperationSchematic/Theory of Operation

MICROI/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI Pinout

ETHERNET

POWER

I/O & USER INPUT

3.3 Voltage Rail

I/O & USER INPUT • I/O Header

• Optical Isolator

GPIO Header

3.3

V

Gro

und

• Header for Push Button

OPTICAL ISOLATORPUSH

BUTTON

Schematic/Theory of OperationSchematic/Theory of Operation

MICROI/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI Pinout

ETHERNET

POWER

PCB LayoutPCB Layout

• Main considerationsMain considerations– Parallel power and ground railsParallel power and ground rails– Decoupling Capacitors near componentsDecoupling Capacitors near components– Transmit and Receive lines uninterruptedTransmit and Receive lines uninterrupted– Ethernet / Clocking circuits isolatedEthernet / Clocking circuits isolated

POWER

PCB LayoutPCB Layout

MICRO

I/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI

ETHER-NET

POWER

PCB LayoutPCB Layout

• Main power and ground rails parallel

• Minimal current looping

• Trace width of 60mil

POWER

PCB LayoutPCB Layout

• Main power and ground rails parallel

• Minimal current looping

• Trace width of 60mil

POWER

• Header easily accessed on edge

HEADER

DIODE&FUSE

• Diode / Fuse protection

REGULATOR

• On board regulator

• Status LED’s

STATUS LEDs

PCB LayoutPCB Layout

MICRO

I/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI

ETHER-NET

POWER

MICRO

• Clocking/BDM

• Ethernet

• Decoupling Caps

CLOCKINGBDM

ETHERNETETHERNET CAPS

CAP

CAPS

PCB LayoutPCB Layout

MICRO

I/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI

ETHER-NET

POWER

ETHER-NET

• RJ-45 on edge

RJ-45

RESIST / CAPS

• Clear , short path for traces

• Resist and Caps

PCB LayoutPCB Layout

MICRO

I/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI

ETHER-NET

POWER

CLOCKINGBDM

SPI

SPI

• SPI for SD pinned out

CLOCKINGCAPS

• Clocking isolated

OSC

• BDM pinned out

BDM HEADER

SWITCH

PCB LayoutPCB Layout

MICRO

I/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI

ETHER-NET

POWER

SCI SERIAL

• SCI Traces

• Layer shifter on bottom

LEVEL SHIFTER

HEADER

• SCI Pinout

• Ports on edge

PORT

PCB LayoutPCB Layout

MICRO

I/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI

ETHER-NET

POWER

I/O & USER INPUT

• Extra I/O Pinouts

PORT

• Optical Isolator

OPTICAL ISOLATORPUSH

BUTTON HEADER

• External User Input

PCB LayoutPCB Layout

MICRO

I/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI

ETHER-NET

POWER

Software Design/Development StatusSoftware Design/Development Status

• Basic interfacing of peripherals Basic interfacing of peripherals – SCI, SPI, GPIOSCI, SPI, GPIO

• RFID system RFID system – Antenna and reader communicatingAntenna and reader communicating

• SD Card SD Card – Attempting card communicationAttempting card communication

• LCD displayLCD display– Transferring of bitmapsTransferring of bitmaps

Project Completion TimelineProject Completion TimelineTASK DESCRIPTION Week 9 Week 10 Week 11 Week 12 Week 13 Week 14 Week 15                 Hardware                  Revise Schematic Design                Revise PCB Layout                                 Component Soldering                Board Testing                               Software                  Initial Peripheral Communication                SLCD Communication                SLCD Image display                RFID Communication                RFID tag reading                SPI/SD card read and write                                 Image Display Algorithm                Ethernet Initialization                FAT File System Design              

  Update Files through Ethernet                               Packaging                  Kiosk Prototyping                Kiosk Construction                Hardware Integration                               Documentation                  User Manual                Final Presentation/Documentation              

Questions / DiscussionQuestions / Discussion

Schematic/Theory of OperationSchematic/Theory of Operation

MICROI/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI Pinout

ETHERNET

POWER

PCB LayoutPCB Layout

MICRO

I/O & USER INPUT

CLOCKINGBDM

SCI SERIAL

SPI

ETHER-NET

POWER