Digital Integrated Circuits - week six -

Gheorghe M. Ştefan http://arh.pub.ro/gstefan/

- 2014 -

Non-recursive definition

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Size = ?Depth = ?Fan-out = ?

Application: computes min-terms

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Example of using DCDs as CLC

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Demultiplexors

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The signal enable is demultiplexed (distributed, scattered) in m = 2n places according to the code xn-1, xn-2, … x0

Formal definition

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The circuit is simpleThe Verilog description is synthesisable Size = ?Depth = ?Complexity = ?

Recursive definition

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Size = ? Depth = ? Fan=out = ? Complexity = ?

Multiplexors

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Gathers data form m=2n placesaccording to the selection code xn-1, xn-2, … x0

Size = ?Depth = ?

Formal definition

The code is ready for synthesis Complexity = ?

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Recursive definition

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Recursive definition (cont)

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Expanding the input size

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Application: logic function implementation

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Increment

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EINC: half-adder Good news: Size O(n)Bad news: Depth O(n)

Adder

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Good news: Size O(n)Bad news: Depth O(n)

Adder: behavioral description

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Carry-Look-Ahead

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Bad news: Size O(n3)Good news: Depth O(log n)

Arithmetic & Logic Unit (ALU)

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Home work 6 Problema 1: Folositi metoda descrisa in slide-ul 4 pentru a

realiza un scazator complet de un bit (tableul de adevar l-ati definit in prima tema de casa)

Problema 2: Folositi metoda descrisa in slide-ul 13 si proiectati un circuit care semnaleaza cand pe intrare majoritea bitilor au valoarea 1.

Problema 3: Desenati cu porti AND si OR un circuit Carry-Look-Ahead pentru un sumator de numere de 4 biti. Care este size-ul si depth-ul circuitului rezultat?

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