vlsics documents

An integrated approach for designing and testing specific processors
Technology An integrated approach for designing and testing specific processors
CROSSTALK MINIMIZATION FOR COUPLED RLC INTERCONNECTS USING BIDIRECTIONAL BUFFER AND SHIELD INSERTION
Technology CROSSTALK MINIMIZATION FOR COUPLED RLC INTERCONNECTS USING BIDIRECTIONAL BUFFER AND SHIELD INSERTION
ESTABLISHING A MOLECULAR COMMUNICATION CHANNEL FOR NANO NETWORKS
Technology ESTABLISHING A MOLECULAR COMMUNICATION CHANNEL FOR NANO NETWORKS
Cost effective test methodology using pmu for automated test equipment systems
Technology Cost effective test methodology using pmu for automated test equipment systems
HARDWARE EFFICIENT SCALING FREE VECTORING AND ROTATIONAL CORDIC FOR DSP APPLICATIONS
Technology HARDWARE EFFICIENT SCALING FREE VECTORING AND ROTATIONAL CORDIC FOR DSP APPLICATIONS
DESIGN OF THREE BIT ANALOG-TO-DIGITAL CONVERTER (ADC) USING SPATIAL WAVEFUNCTION SWITCHED (SWS) FETS
Technology DESIGN OF THREE BIT ANALOG-TO-DIGITAL CONVERTER (ADC) USING SPATIAL WAVEFUNCTION SWITCHED (SWS) FETS
EVALUATION OF OPTICALLY ILLUMINATED MOSFET CHARACTERISTICS BY TCAD SIMULATION
Technology EVALUATION OF OPTICALLY ILLUMINATED MOSFET CHARACTERISTICS BY TCAD SIMULATION
A NEW LOW VOLTAGE P-MOS BULK DRIVEN CURRENT MIRROR CIRCUIT
Technology A NEW LOW VOLTAGE P-MOS BULK DRIVEN CURRENT MIRROR CIRCUIT
Compact low power high slew-rate cmos buffer amplifier with power gating technique
Technology Compact low power high slew-rate cmos buffer amplifier with power gating technique
Vlsics040307DESIGN AND IMPLEMENTATION OF CAR PARKING SYSTEM ON FPGA
Technology Vlsics040307DESIGN AND IMPLEMENTATION OF CAR PARKING SYSTEM ON FPGA
Design of low power cmos logic circuits using gate diffusion input (gdi) technique
Technology Design of low power cmos logic circuits using gate diffusion input (gdi) technique
Low cost reversible signed comparator
Technology Low cost reversible signed comparator
CMOS LOW POWER CELL LIBRARY FOR DIGITAL DESIGN
Technology CMOS LOW POWER CELL LIBRARY FOR DIGITAL DESIGN
Advanced atpg based on fan, testability measures and fault reduction
Technology Advanced atpg based on fan, testability measures and fault reduction
Multisim design and simulation of 2.2 g hz lna for wireless communication
Technology Multisim design and simulation of 2.2 g hz lna for wireless communication
A 20 gbs injection locked clock and data recovery circuit
Technology A 20 gbs injection locked clock and data recovery circuit
POWER EFFICIENT CARRY PROPAGATE ADDER
Technology POWER EFFICIENT CARRY PROPAGATE ADDER
Design and implementation of 4 t, 3t and 3t1d dram cell design on 32 nm technology
Technology Design and implementation of 4 t, 3t and 3t1d dram cell design on 32 nm technology
An operational amplifier with recycling folded cascode topology and adaptive biasing
Technology An operational amplifier with recycling folded cascode topology and adaptive biasing
Vlsics08
Technology Vlsics08
Accelerating system verilog uvm based vip to improve methodology for verification of image signal processing designs using hw emulator
Technology Accelerating system verilog uvm based vip to improve methodology for verification of image signal processing designs using hw emulator