technosindia documents

Design of Testable Reversible Sequential Circuits
Documents Design of Testable Reversible Sequential Circuits
Design of an Error Detection and Data Recovery Architecture for Motion Estimation Testing Applications
Documents Design of an Error Detection and Data Recovery Architecture for Motion Estimation Testing Applications
Improved 8-Point Approximate Dct for Image and Video Compression Requiring Only 14 Additions
Documents Improved 8-Point Approximate Dct for Image and Video Compression Requiring Only 14 Additions
Area Delay Power Efficient Fixed Point Lms
Documents Area Delay Power Efficient Fixed Point Lms
Gate Mapping Automation for Asynchronous
Documents Gate Mapping Automation for Asynchronous
Multicarrier Systems Based on Multistage
Documents Multicarrier Systems Based on Multistage
Efficient Fpga and Asic Realizations Of
Documents Efficient Fpga and Asic Realizations Of
Eliminating Synchronization Latency Using
Documents Eliminating Synchronization Latency Using
High-throughput Multi Standard Transform Core Supporting Mpegh.264vc-1 Using Common Sharing Distributed Arithmetic
Documents High-throughput Multi Standard Transform Core Supporting Mpegh.264vc-1 Using Common Sharing Distributed Arithmetic
Flexible Integer Dct Architectures for Hevc
Documents Flexible Integer Dct Architectures for Hevc
Low-complexity Low-latency Architecture for Matching of Data Encodedwith Hard Systematic
Documents Low-complexity Low-latency Architecture for Matching of Data Encodedwith Hard Systematic
Fast Sign Detection Algorithm for the Rns Moduli
Documents Fast Sign Detection Algorithm for the Rns Moduli
Period Extension and Randomness Enhancement Using High-throughput Reseeding-mixing Prng
Documents Period Extension and Randomness Enhancement Using High-throughput Reseeding-mixing Prng
Low-power, High-throughput, And Low-Area Adaptive Fir Filter Based on Distributed Arithmetic
Documents Low-power, High-throughput, And Low-Area Adaptive Fir Filter Based on Distributed Arithmetic