Hardware Implementation Of QPSK Modulator for Satellite Communications

Hardware Implementation of QPSK Modulator for Satellite Communication

Presented By :Kiran Prajapati

Pradeep Santdasani

Internal Guide :Dhara ShahLecturer (EC Dept.)L C Institute of Tech.

External Guide :E P BalasubramanianGroup Director SPSGSpace Application Center (ISRO)

QPSK Modulator2

Agenda

Overview of Satellite Communication Overview of Digital Modulation Description of QPSK Modulator Steps of Project Implementation Matlab Simulation of QPSK Modulator Hardware Implementation of QPSK Modulator Results Conclusion Future Scope

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Digital Modulation schemes are used in Satellite Communication Systems.

Overview of Satellite Communication

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Overview of Digital Modulation

Any features of a carrier signal – amplitude, frequency, or phase can be digitally modulated .

ASK = Amplitude Shift Keying

FSK = Frequency Shift Keying

PSK = Phase Shift keying

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An M-phase PSK modulator puts the phase of carrier into one of M - states according to the value of a input .

By increasing states , it can transmit more data in same bandwidth

Data

BPSK

QPSK

8PSK

Phase Shift Keying :

Description of QPSK Modulator

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I data

Q data

+

Cos ωct

ModulatorOutput

Block Diagram

sin ωct

I - Signal1 bit = 180 o

0 bit = 0 o

0 bit = 90 o

00 bit = 45 o

10 bit = 315 o

01 bit =135 o

11 bit = 225 o

Q - Signal

1 bit = 270 o

Constellation


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Equations

I - Signal

sin (ωct - 45 )

Q - Signal

-cos ωct

Phasor Diagram

+cos ωct

+sin ωct-sin ωct

sin (ωct - 135 )

sin (ωct + 45 )sin (ωct + 135 )

I Data

Q data

I Mod O/P

Q Mod O/P

QPSK O/P QPSK

O/P

Phase

0 0 sin ωct cos ωct sin ωct + cos ωct

= sin ( wct + 45 )

45˚

0 1 sin ωct -cos ωct sin ωct - cos ωct

= sin (ωct + 135)

135˚

1 0 - sin ωct cos ωct - sin ωct + cos ωct

= sin (ω ct - 45 )

315˚

1 1 - sin ωct -cos ωct - sin ωct - cos ωct

= sin (ωct - 135 )

225˚


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Time Domain


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Steps of Project Implementation

Matlab Simulation Simulation on Xilinx FPGA Implementation on Virtex – 4 Testing and Debugging

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Unipolar to Bipolar

Upsampling

Carrier

Unipolar to Bipolar

Upsampling

90o

I data

Q data

Multiplier

Multiplier

Adder

QPSK Modulator Block Diagram

Matlab Simulation of QPSK Modulator

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Upsampling


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I - Signal Modulation


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Q Signal Modulation


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QPSK Time Domain Signal


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Baseband Spectrum


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QPSK Spectrum


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It is used for band limit the signal bandwidth .

The objective is to create a pulse that resembles the sin x/x shape.

So that receiver samples at intervals of Tb , where Tb is the bit period .

At the sampling instant , the “tails” from all preceding pulses have zero values

Root Cosine Filter


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Unipolar to Bipolar

Upsampling

Carrier

Unipolar to Bipolar

Upsampling

90o

I data

Q data

Shaping

Shaping

Multiplier

Multiplier

Adder



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QPSK Spectrum


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Carrier Frequency ƒc = 25 MHz

Data Frequency ƒd = 25 MHz

Roll off Factor α = 0.3

Bandwidth = 16.25 MHz


QPSK Bandwidth

12

1dfBandwidth

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DSP algorithm has sum of products of equations

DSP systems are required to perform intensive arithmetic operations such as multiplications and additions.

FPGAs can be used to implement DSP system as they provide tremendous computational power by using highly parallel architecture for high performance.

FPGAs dedicated for DSP has Embedded multipliers and distributed RAM for storage of coefficients.

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Digital Signal Processing (DSP) in FPGA :

Hardware Implementation of QPSK Modulator

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It consists of I/O buffers, an array of configuration logic blocks and programmable interconnect structures.

Programming of the interconnect structure is accomplished by RAM cells whose o/p terminals are connected to the gates of MOS pass transistor

Field Programmable Gate Array (FPGA)


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Virtex 4 development kit is based on the 4VSX35 FPGA

SX family is focused for DSP applications

It has embedded multipliers which increases speed in MAC operations

Virtex – 4 (SX Family)


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The Integrated Software Environment (ISE) is the Xilinx design software suite that allows taking design from design entry through Xilinx device programming.

Design Entry

Synthesis ImplementationVerification Device Configuration

Xilinx ISE


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I data

+

Look UpTable sinwct

I Carrier

Q Carrier

Shaping filter

Unipolar to bipolar

Shaping filter

Unipolar to bipolar

Q data

QPSKModulatedSignal

Look UpTable coswct



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The lookup-table method is technique used for generating periodic waveforms.

It involves reading a series of stored data values that represent the waveform.

Lookup Table Method


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I & Q Carrier Signal Generation


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Simulated Implemented

QPSK Modulated Signal


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QPSK Spectrum


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Simulated Implemented

QPSK Spectrum :

Results

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Hardware Setup :

Results

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Conclusion

QPSK modulator has been successfully implemented on the Xilinx Virtex – 4 Development kit. QPSK Modulator is simulated in Matlab Software to verify and compare its functionality taking into account the limitations imposed by the hardware

The modulator algorithm has been implemented on FPGA using the VHSIC hardware description language (VHDL) on Xilinx ISE 8.2i. Simulated waveform is compared with actual output on the digital oscilloscope and spectrum analyzer.

The designed modulator may be used as a test bed for the functional verification of various RF subsystems which requires to be parameterized under modulated signal conditions

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QPSK Demodulator Multi Carrier QPSK Modulator Higher Order Digital Modulator and Demodulator

The hardware module can be functionally extended to the following to support a variety of applications:

Future Scope

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Modern Digital and Analog Communication Systems By B.P. LATHI

Satellite Communication By William Pratt Contemporary Communication Systems using Matlab By

John G. Proakis VHDL Primer By J.Bhasker Digital Systems Design with VHDL and Synthesis By

K.C.Chang User Guide of Xilinx ISE Datasheet of Virtex - 4 Datasheet of P240 Prototype Module

References

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Thanks

Technology

Hardware Implementation Of QPSK Modulator for Satellite Communications