DRESD In a Nutshell July07

POLITECNICO DI MILANO

Marco D. Santambrogio

[email protected]

DRESDDRESD in a Nutshell in a NutshellDynamic Reconfigurability in Embedded System

Design

DRESD @ PdM – July 2007DRESD @ PdM – July 2007

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OutlineOutline

MicroLABReconfiguration

MotivationsBasic DefinitionReconfiguration in everyday lifeSoCNew frontiers

DRESDPhilosophyDRESD @ PdMDRESD in the WorldWhat you can do…

DRESD – Main Pojects

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What’s next…What’s next…





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MicroLAB organization:Thesis works: 50-60/year

Class Projects: 80-100/year

PhD students: 8Researchers: 4Professors: 8

MicroLAB Workstations:Linux: 26Windows: 3Laptop (Linux/Win): 20SUN: 15

MicroLABMicroLAB

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MotivationsMotivations

Increasing need for behavioral flexibility in embedded systems design

Support of new standards, e.g. in media processingAddition of new features

Applications too large to fit on the device all at once

Speedup the overall computation of the final system

However, we need a way to process a specification to make it suitable for reconfigurable implementation

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ReconfigurationReconfiguration

The process of physically altering the location or functionality of network or system elements. Automatic configuration describes the way sophisticated networks can readjust themselves in the event of a link or device failing, enabling the network to continue operation.

Gerald Estrin, 1960

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Reconfiguration in everyday Reconfiguration in everyday lifelife

Soccer

Hockey

Football(Complete – Static)

(Partial – Dynamic)

(Partial – Static)

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SoC ReconfigurationSoC Reconfiguration

fix

Partial TotalEmbedded

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Different Scenarios...Different Scenarios...

Single Device Distributed System

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New frontiersNew frontiers

ArchitecturesQuantum computingReconfigurable computing is not equal to XilinxNanotechnologies

Models and paradigmsIs the turing machine enough?RDL: Reconfiguration Description language

ApplicationsStart from real worls needsBenchmarking...

Knowledge about all these disciplines will help transform reconfigurable computing from an art to a science.

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DRESD – Main PojectsQuestions?

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DRESD PhilosophyDRESD Philosophy

Do or do not! There’s no try!Do or do not! There’s no try! Master Yoda

I need to believe that something I need to believe that something extraordinary is possible!extraordinary is possible!

Alicia Nash

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DRESD @ PdMDRESD @ PdM

and many more…

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DRESD in regular curricula @ PdM a.a. DRESD in regular curricula @ PdM a.a. 06/0706/07

Undergraduate classesLogic Synthesis (projects)

Graduate classesSW Laboratory (projects)Computer Architecture (projects)High Performance Processors and Systems (projects and regular class)Soft Computing (projects)IA and Robotics Lab (projects)Hardware Design Methodologies (projects)Hardware and Software Design Methodologies (projects)Embedded Systems (projects)

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Students OverviewStudents Overview

Undergraduate degree03/04: 7 - 04/05: 18 - 05/06: 33Total (06/07): 19

3° year: 19

Master degreeTotal: 20

4° year: 145° year: 6

PhD involved in DRESDMinor

2°year: 1Major

1°year: 13° year: 1

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DRESD in the WORLD @ June DRESD in the WORLD @ June ‘07‘07

EuropePaderborn University and HNIEPFL

USAUICNorthwestern

CompaniesSynplicityImpulseCSiemens

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What you can do…What you can do…

MeetingRegular meeting every two weeksDRESD Beer3D-DRESD: the DRESD official meeting, July/August

Funding, materials (i.e., boards, tools), sponsorship

Web: www.dresd.orgMailing List: [email protected]

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DRESD – Main ProjectsDRESD – Main Projects

BlanketBlanket - architecturesCaronteCaronte – design flowCITiESCITiES – communication infrastructureDReAMSDReAMS – multi-FPGAsHLRHLR – theoretical aspectsOSyRiSOSyRiS – operating system supportPolarisPolaris – placement and relocationRDLRDL - modeling and system specificationR4RR4R - reliabilitySyCERSSyCERS – simulation

... Retargetable Compiler

... EHW – evolvable HW

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BlanketBlanket

YaRA - Yara is not another Reconfigurable Architecture

Support relocationDifferent communciation infrastructuresHard/Soft-CoreInternal/External Reconfiguration

HARPEHarvard-based Processing Element Tailored for Partial Dynamic Reconfigurable Architectures

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CaronteCaronte

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CITiESCITiES

GOALS:Define a suitable approach (methodology) to the design of a complete communication-centric FPGA-based reconfigurable architecture

Communication infrastructure designComputational layer designMetrics-driven design choices

MOTIVATIONS:Allow the implementation of application-adaptable reconfigurable architectures in order to achieve:

FlexibilityReliabilityPerformance

DReAMSDReAMS

Dynamic ReconfigurabilityApplied to Multi-

FPGA SystemsBranch of DRESD projectInherits architectures and tools

Automatic workflow from VHDL system description to FPGA implementation

VHDL parsing and system simulationSystem creation over a specific architectureBitstream creation and download onto FPGAs

DReAMS

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HLRHLR

What is High Level Reconfiguration...?Theoretical approach to dynamic reconfiguration...

Vision... Reconfigurability has many advantages...

Mission... Exploit these advantages to obtain best performance...

How...? Adapting a system to this execution model managing complexity and drawbacks...

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OSyRiSOSyRiS

Provide software support for dynamic partial reconfiguration on Systems-on-Chip running an operating system (i.e., LINUX).

Issues:OS customization for specific architecturesPartial reconfiguration process management from the OSAddition and removal of hardware reconfigurable componentsAutomatic loading and unloading of specific drivers for the IP-Cores upon components configuration/deconfigurationEasier programming interface for specific drivers

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PolarisPolaris

Create an integrated HW/SW system to manage relocation (1D and 2D) in reconfigurable architecture

Maintain information on FPGA statusDecide of how to efficiently allocate tasksProvide support for effective task allocationPerform bitstream relocation

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RDLRDL

Reconfiguration Design LanguageReconfiguration as an explicit feature in the system designHow to model a reconfigurable architectureHow to model/use reconfiguration at design-timeFrom DD (Desing Descriptio) to Bitstream

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R4RR4R

Designing reliable systems implemented on FPGAs, able to cope with the effects of faults caused by radiations

Appling already known and well studied detection and recovery techniques to novel scenariosExploiting dynamic partial reconfiguration to trigger the reconfiguration of the affected portion of the architecture

… while the rest of the system is still working

… without need to entirely reprogrammed the system

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SyCERSSyCERS

Define a novel model to describe reconfigurable systems

Based on know HDL (no new languages)To be used in the early first stage of the project; to consider the reconfiguration at the system level

Propose a complete framework for the simulation and the design of reconfigurable systems

Providing system specification that can be simulatedAllowing fast parameters setting, e.g. number of reconfigurable blocks, reconfigurable time Taking into account the software side of the final system

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END?END?

Are you ready to see how deep the rabbit-hole goes?…

Technology

DRESD In a Nutshell July07