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DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS FPGA Camp, April 6, 2011 Endric Schubert, Missing Link Electronics Glenn Steiner, Xilinx 4/6/2011 1 FPGA Camp 2011

DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

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DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp. Endric Schubert, Missing Link Electronics Glenn Steiner, Xilinx Visit http://www.fpgacentral.com/fpgacamp for details

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Page 1: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 1

DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS

FPGA Camp, April 6, 2011

Endric Schubert, Missing Link Electronics

Glenn Steiner, Xilinx

4/6/2011

Page 2: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 2

Real-Time Closed-Loop Control Systems

4/6/2011

Page 3: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 3

Embedded Real-Time Control Systems- A Quadruple Whammy

1. Wide variety of I/O

2. Processing in Real-Time

3. Safety Regulations

4. Device Obsolescence

4/6/2011

Page 4: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 4

Processing Steps in Real-Time Control Systems

4/6/2011

An I/O connectivity problem

Processing problem

Customization problem

Processing problem

Reliability problem

Another I/O Connectivity problem

Page 5: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 5

Real-Time Processing on a Microcontroller

Like packet / video streaming …

BUT: must not loose any data!

4/6/2011

Page 6: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 6

Scalability Problems in Multi-Channel Systems

4/6/2011

Page 7: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 7

Von Neumann Needs a Companion!

Sequential Processing with CPU C, C++ Program

Parallel Processing with Logic Gates VHDL, Verilog "Program"

4/6/2011

Courtesy: Dr. Andre DeHon, UPenn

Page 8: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 8

Proposal: FPGA-Based Real-Time Control System

4/6/2011

How to do: I/O connectivity (read sensors, drive actuators) Signal conditioning Closed-loop control

Page 9: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 9

FPGA I/O Interfaces & Communication Peripherals

Covers almost all relevant I/O standards

And CommunicationInterfaces

4/6/2011

PCI

PCI Express

USB Device

IIC

SPI

Gigabit Ethernet MAC

Ethernet MAC Lite

CAN

FlexRay

MOST

General Purpose IO

UART 16550

DelataSigma ADC, DAC

ADC

Glenn Steiner
updated
Page 10: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 10

FPGA-Based Signal Conditioning

4/6/2011

Old School: Analog

Today: Digital Signal Processing

Page 11: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 11

Closed-Loop PID Control

4/6/2011

Courtesy: Dr. Giulio Corradi, Xilinx

Page 12: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 12

PID Control in an FPGA

Delay Optimized Area Optimized

4/6/2011

Zhao et al.: FPGA Implementation of Closed-Loop Control System for Small Scale Robot, IEEE, July 2005

Page 13: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 13

Scale-up Multi-Channel Control with Parallel Processing in the FPGA

4/6/2011

Page 14: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 14

The Need to Run (Sequential) Software

4/6/2011

Page 15: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

History Lesson: FPGAs Continue to Evolve to Meet Processing System Requirements

Incr

easi

ng

FP

GA

Cap

abili

ty

1985 1990 1995 2000

EmbeddedProcessingEmbeddedProcessing

ComplexControl

ComplexControl

ControlLogic

ControlLogic

GlueLogicGlueLogic

2011

Co-processingCo-processing

Processors tightly

coupled

to FPGA fabric

enable extendibility with

co-processing to m

eet

real-time system re

quirements

4/6/2011 15FPGA Camp 2011

Page 16: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 16

Yesterday’s FPGA Designs

Hardware-Centric Design Flow With FPGAs

4/6/2011

Page 17: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 17

It's the Software, Dude!Embedded Processing Today

Software-Centric Design Flow With FPGAs

4/6/2011

Page 18: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 18

FPGA-to-CPU Connectivity

Companion Chips Integrated Solutions

"A symbiosis of CPU and FPGA on one die to reduce cost and PCB space!"

4/6/2011

Page 19: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

ASSP

Proce

ssors

A Convergence of Processing Solutions

General

Purpose

Processors

FPGA Soft

Processors

FPGA Hard

Processors

4/6/2011 19FPGA Camp 2011

Page 20: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

General

Purpose

Processors

FPGA Hard

Processors

ASSP

Proce

ssors

A Convergence of Processing Solutions

7 SeriesProgrammable

Logic

Common Peripherals

CustomPeripherals

Common Accelerators

Custom Accelerators

CommonPeripherals

ProcessingSystem

MemoryInterfaces

ARM®

Dual Cortex-A9 MPCore™ System

FPGA Soft

Processors

ExtensibleProcessing

Platform

4/6/2011 20FPGA Camp 2011

Page 21: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

Zynq-7000 Extensible Processing Platform

Software & Hardware Programmable

7 SeriesProgrammable

Logic

Common Peripherals

CustomPeripherals

Common Accelerators

Custom Accelerators

CommonPeripherals

ProcessingSystem

MemoryInterfaces

ARM®

Dual Cortex-A9 MPCore™ System

Complete ARM®-based Processing System– Dual ARM Cortex™-A9 MPCore™, processor centric– Integrated memory controllers & peripherals– Fully autonomous to the Programmable Logic

Tightly Integrated Programmable Logic– Used to extend Processing System– Scalable density and performance– Over 3000 internal interconnects

Flexible Array of I/O– Wide range of external multi-standard I/O– High performance integrated serial tranceivers– Analog-to-Digital Converter inputs

4/6/2011 21FPGA Camp 2011

Page 22: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

Zynq-7000 Extensible Processing System

2x GigEwith DMA

2x USBwith DMA

2x SDIOwith DMA

Static Memory ControllerQuad-SPI, NAND, NOR

Dynamic Memory ControllerDDR3, DDR2, LPDDR2

AMBA® Switches

ProgrammableLogic:

System Gates,DSP, RAM

AMS PCIe

Multi-Standards I/Os (3.3V & High Speed 1.8V)

Mu

lti-

Sta

nd

ard

s I/

Os

(3

.3V

& H

igh

Sp

ee

d 1

.8V

)

Multi Gigabit Transceivers

ACP

I/OMUX

MIO

ARM® CoreSight™ Multi-core & Trace Debug

512 KB L2 Cache

NEON™/ FPU Engine

Cortex™-A9 MPCore™32/32 KB I/D Caches

NEON™/ FPU Engine

Cortex™-A9 MPCore™32/32 KB I/D Caches

Snoop Control Unit (SCU)

Timer Counters 256 KB On-Chip Memory

General Interrupt Controller DMA Configuration

2x SPI

2x I2C

2x CAN

2x UART

GPIO

Processing System

AMBA® Switches

AMBA® Switches

AMBA® Switches

4/6/2011 22FPGA Camp 2011

Page 23: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

Zynq-7000 EPP Processors

2x GigEwith DMA

2x USBwith DMA

2x SDIOwith DMA

Static Memory ControllerQuad-SPI, NAND, NOR

Dynamic Memory ControllerDDR3, DDR2, LPDDR2

AMBA® Switches

ProgrammableLogic:

System Gates,DSP, RAM

AMS PCIe

Multi-Standards I/Os (3.3V & High Speed 1.8V)

Mu

lti-

Sta

nd

ard

s I/

Os

(3

.3V

& H

igh

Sp

ee

d 1

.8V

)

Multi Gigabit Transceivers

ACP

I/OMUX

MIO

ARM® CoreSight™ Multi-core & Trace Debug

512 KB L2 Cache

NEON™/ FPU Engine

Cortex™-A9 MPCore™32/32 KB I/D Caches

NEON™/ FPU Engine

Cortex™-A9 MPCore™32/32 KB I/D Caches

Snoop Control Unit (SCU)

Timer Counters 256 KB On-Chip Memory

General Interrupt Controller DMA Configuration

2x SPI

2x I2C

2x CAN

2x UART

GPIO

Processing System

AMBA® Switches

AMBA® Switches

AMBA® Switches

4/6/2011 23FPGA Camp 2011

Page 24: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

Zynq-7000 EPP Memory Interfaces

2x GigEwith DMA

2x USBwith DMA

2x SDIOwith DMA

Static Memory ControllerQuad-SPI, NAND, NOR

Dynamic Memory ControllerDDR3, DDR2, LPDDR2

AMBA® Switches

ProgrammableLogic:

System Gates,DSP, RAM

AMS PCIe

Multi-Standards I/Os (3.3V & High Speed 1.8V)

Mu

lti-

Sta

nd

ard

s I/

Os

(3

.3V

& H

igh

Sp

ee

d 1

.8V

)

Multi Gigabit Transceivers

ACP

I/OMUX

MIO

ARM® CoreSight™ Multi-core & Trace Debug

512 KB L2 Cache

NEON™/ FPU Engine

Cortex™-A9 MPCore™32/32 KB I/D Caches

NEON™/ FPU Engine

Cortex™-A9 MPCore™32/32 KB I/D Caches

Snoop Control Unit (SCU)

Timer Counters 256 KB On-Chip Memory

General Interrupt Controller DMA Configuration

2x SPI

2x I2C

2x CAN

2x UART

GPIO

Processing System

AMBA® Switches

AMBA® Switches

AMBA® Switches

4/6/2011 24FPGA Camp 2011

Page 25: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

I/O Connectivity in Zynq-7000 EPP

2x GigEwith DMA

2x USBwith DMA

2x SDIOwith DMA

Static Memory ControllerQuad-SPI, NAND, NOR

Dynamic Memory ControllerDDR3, DDR2, LPDDR2

AMBA® Switches

ProgrammableLogic:

System Gates,DSP, RAM

AMS PCIe

Multi-Standards I/Os (3.3V & High Speed 1.8V)

Mu

lti-

Sta

nd

ard

s I/

Os

(3

.3V

& H

igh

Sp

ee

d 1

.8V

)

Multi Gigabit Transceivers

ACP

I/OMUX

MIO

ARM® CoreSight™ Multi-core & Trace Debug

512 KB L2 Cache

NEON™/ FPU Engine

Cortex™-A9 MPCore™32/32 KB I/D Caches

NEON™/ FPU Engine

Cortex™-A9 MPCore™32/32 KB I/D Caches

Snoop Control Unit (SCU)

Timer Counters 256 KB On-Chip Memory

General Interrupt Controller DMA Configuration

2x SPI

2x I2C

2x CAN

2x UART

GPIO

Processing System

AMBA® Switches

AMBA® Switches

AMBA® Switches

4/6/2011 25FPGA Camp 2011

Page 26: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

Agile Mixed Signal (AMS) for Data Acquisition

2x GigEwith DMA

2x USBwith DMA

2x SDIOwith DMA

Static Memory ControllerQuad-SPI, NAND, NOR

Dynamic Memory ControllerDDR3, DDR2, LPDDR2

AMBA® Switches

ProgrammableLogic:

System Gates,DSP, RAM

AMS PCIe

Multi-Standards I/Os (3.3V & High Speed 1.8V)

Mu

lti-

Sta

nd

ard

s I/

Os

(3

.3V

& H

igh

Sp

ee

d 1

.8V

)

Multi Gigabit Transceivers

ACP

I/OMUX

MIO

ARM® CoreSight™ Multi-core & Trace Debug

512 KB L2 Cache

NEON™/ FPU Engine

Cortex™-A9 MPCore™32/32 KB I/D Caches

NEON™/ FPU Engine

Cortex™-A9 MPCore™32/32 KB I/D Caches

Snoop Control Unit (SCU)

Timer Counters 256 KB On-Chip Memory

General Interrupt Controller DMA Configuration

2x SPI

2x I2C

2x CAN

2x UART

GPIO

Processing System

AMBA® Switches

AMBA® Switches

AMBA® Switches

4/6/2011 26FPGA Camp 2011

Page 27: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

Agile Mixed Signal (AMS) Processing

Dual 12-bit 1 Msps Analog-to-Digital Converters ADCs carry out a 16-bit resolution conversion Factory tested and specified 12-bit accuracy with 1V input range Built in digital gain and offset correction / calibration

Dual Independent Track & Hold (T/H) Amplifiers Separate Track/Hold amplifier ensures maximum throughput using

multiplexed analog input channels

On-chip Voltage Reference External reference input option

On-Chip Thermal and Supply Sensors Flexible External Analog Inputs

Differential analog inputs with high common mode noise rejection

Support for unipolar, bipolar, and true differential input signal types

4/6/2011 27FPGA Camp 2011

Page 28: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

On-Chip and External Environmental Monitoring

Monitoring for higher reliability in industrial applications Factory tested on-chip monitoring Easier to implement than external solutions

e.g., thermal diode monitor

Counter measures against physical attack / tampering in A&D US government mandate: Cryptographic model must have built in

counter measures against manipulation of power supplies and operating temperatures

Protection against reverse engineering and IP theft

Diagnostics for HW design and verification Easy to use JTAG access with ChipScope support Especially difficult to access places

e.g., in enclosures / cabinetsJTAG

4/6/2011 28FPGA Camp 2011

Page 29: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

Integrating It All Together:An Industrial Motor Control Application

4/6/2011 29FPGA Camp 2011

Page 30: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011

Put the Burden Where it Fits Best!

Extensible Processing Platforms Allow optimum system partitioning between software and hardware Build configurable systems that match your application!

4/6/2011 Page 30

Page 31: DESIGN CHOICES FOR EMBEDDED REAL-TIME CONTROL SYSTEMS @ 4th FPGA Camp

FPGA Camp 2011 31

Modern Implementation

4/6/2011

7 SeriesProgrammable

Logic

Common Peripherals

CustomPeripherals

Common Accelerators

Custom Accelerators

CommonPeripherals

ProcessingSystem

MemoryInterfaces

ARM®

Dual Cortex-A9 MPCore™ System

Extensible Processing Platform