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Title: Virtual CPU Speaker: Igor Stasenko Wed, August 20, 10:00am – 10:30am Video Part1: https://www.youtube.com/watch?v=2tY3p3Pk-Lc Video Part2: https://www.youtube.com/watch?v=sfAm1uq87Ps Description Abstract: VirtualCpu models a machine in its basic form: a CPU which operates on machine words. The aim of the project is to create a architecture agnostic DSL, which would allow developers to write low-level code, which then can be translated to machine code and executed directly by machine it runs on. One of the aspects of design is to exploit the robustness and reflectiveness of smalltalk environment to make it extremely easy and natural to write low-level code and enable regular smalltalk developers to use it without need to have deep knowledge in low-level assembler, which considered by most as an arcane art. Another aspect is to provide a platform for debugging the low-level code through using a simulation, so that user can execute operations step by step and see the effect(s) in plain smalltalk debugger. The project currently is in active development and going to support x86 and ARM architectures (and new architecture(s) should be easy to implement). Also, it is possible to simulate the low-level code execution by using a special simulating CPU, written entirely in smalltalk, and therefore not requiring to run machine code. Bio: Igor Stasenko born in 1974 in Kiev, Ukraine. Since '85 i fell in love with computers and programming and dedicated my life and career towards exploring, learning and creating new software using what i learned. I am a software engineer, currently working at INRIA, France.
Citation preview
Virtual CPUESUG, Cambridge 2014
By Igor Stasenko & Max MattoneRMod, Inria
Wednesday, August 20, 14
Highlights
• What?
• Why?
• How?
• Demo
• To Do
Wednesday, August 20, 14
What is VCpu?
• a framework to write low-level code
• can simulate & generate machine code
• multiple backends for ARM, x86/x64 code generation
• 100% implemented in smalltalk
Wednesday, August 20, 14
What is VCpu NOT
• NOT a full-fledged compiler with numerous data “types”, like GCC/LLVM
• NO direct support of calling convention(s)
• it is a bare-bone model of computer with CPU & memory.. to build on top of it
Wednesday, August 20, 14
Requirements
• expressive power of smalltalk
• malleable
• extensible
• simple
• yet powerful
Wednesday, August 20, 14
Architecture
RTL VCPU Interface
Simulating CPU Generating CPU
Low-level intermediate
Liveness analysis
Register allocation
Optimizations
AsmJIT
Platform dependent
Platform neutral
Wednesday, August 20, 14
Why
• there’s no low-level compilers for smalltalk
• on inventing own wheel: adapting existing solutions costly as (h/w)ell
• lets us learn as we do it
Wednesday, August 20, 14
Don’t mode me in
Implementing low-level semantic
Idea Smalltalk Slang C Machine
Idea Machine
Wednesday, August 20, 14
A more correct picture
Idea Machine
Wednesday, August 20, 14
At the end of the day
memory at: x put: y
So, tell me, why you have to be expert in 10+ disciplines to do that?
Wednesday, August 20, 14
There must be a better way
• i was looking for a nice & simple solution since 2006
• VCpu interface, is product of number of painful attempts to get there
• Now i am pleased (almost).
Wednesday, August 20, 14
How
• imperative rather than declarative
• coding with VCpu is just plain smalltalk
Wednesday, August 20, 14
Imperative
• you don’t ‘compile’ or translate code, you just execute own code istructing CPU what to do: cpu doThat
Wednesday, August 20, 14
Dual nature
• can be either simulated or generating machine code, just use different CPU
• you free to choose any style you want to program it
Wednesday, August 20, 14
Machine word
• a facade object representing a virtual CPU register/variable (machine word)
• it easy to manipulate with, since one can define a usual arithmetic operations, like #+ , #- , #*, #/ etc..
• serves as a basis of VCpu ‘DSL’
Wednesday, August 20, 14
Lets learn a new DSL
Wednesday, August 20, 14
Step 1. Creating a new machine word
word := cpu word: 10.
Wednesday, August 20, 14
Step 2. Assigning new value to existing one
word1 := cpu word: 10.
word2 := cpu word: 4.
word2 value: word1.
...
word2 := word1. Wrong!!!
Right
Wednesday, August 20, 14
Step 3. Arithmetic expressions
word := x + y bitAnd: z
just keep in mind, it is not ‘school’ but ‘CPU’ math
Wednesday, August 20, 14
Step 3. Arithmetic expressions
word := x + y bitAnd: z
the result of expression is always new machine word
just keep in mind, maybe you wanted:
word value: x + y bitAnd: z
... instead
Wednesday, August 20, 14
Step 3. Arithmetic expressions
word := x + 5
.. expressions can be intermixed with regular constants
as long as receiver is machine word
Wednesday, August 20, 14
Step 4. Memory access
word := address loadWord
address writeWord: x
Wednesday, August 20, 14
Step 5. Comparisons/control flow
a>b ifTrue: [..] ifFalse: [..]
a to: b do: [:i |..]
x timesRepeat: [ .. ]
Looks familiar?
Wednesday, August 20, 14
Thanks, we have Opal
• disable inlining (ifTrue:/to:do: ..etc)
expression ifTrue: [..] ifFalse: [..]
this is Sparta Pharo!
mustBeABoolean
Wednesday, August 20, 14
Step 6. Call/return
address call
cpu return.
cpu return: x **
** requires a notion of calling convention
Wednesday, August 20, 14
End of tutorial
Wednesday, August 20, 14
NativeBoost integration
abs: x <primitive: #primitiveNativeCall module: #NativeBoostPlugin> ^ self nbCallout function: #( int abs (int x ) ) module: NativeBoost CLibrary
VCpu-style callout
NativeBoost-style callout
?
Wednesday, August 20, 14
NativeBoost integration
abs: x <primitive: #primitiveNativeCall module: #NativeBoostPlugin> ^ self nbCallout function: #( int abs (int x ) ) module: NativeBoost CLibrary
abs: x <primitive: #primitiveNativeCall module: #NativeBoostPlugin> ^ self nbCallout function: #( int abs (int x ) ) module: NativeBoost CLibrary
VCpu-style callout
NativeBoost-style callout
this is Sparta Pharo!Wednesday, August 20, 14
Demo
Wednesday, August 20, 14
To Do
• Finish optimizations
• Test ARM Support (on real hardware)
• Complete NativeBoost VCpu implementation
• Documentation
• Look forward for Spur integration
Wednesday, August 20, 14
?Wednesday, August 20, 14