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LCU14 506- KVM Development Status --------------------------------------------------- Speaker: C. Dall, M. Zyngier & E. Auger Date: September 19, 2014 --------------------------------------------------- ★ Session Summary ★ KVM for arm/arm64 is maturing and reaching its goal of feature parity with x86. In this session we will simply update the audience on the development status since there has been an extraordinarily large amount of patches to the code base recently covering areas including GICv3 emulation, device passthrough (vfio,irqfd), VGIC changes, flexible VM physical address size, live migration, debugging, and performance monitors. Any pressing development issues at the time of the conference will be covered in this session. --------------------------------------------------- ★ Resources ★ Zerista: http://lcu14.zerista.com/event/member/137793 Google Event: https://plus.google.com/u/0/events/cgloikhtbgjts97fs22vjudo7tc Video: https://www.youtube.com/watch?v=XGQrMaUW5Yo&list=UUIVqQKxCyQLJS6xvSmfndLA Etherpad: http://pad.linaro.org/p/lcu14-506 --------------------------------------------------- ★ Event Details ★ Linaro Connect USA - #LCU14 September 15-19th, 2014 Hyatt Regency San Francisco Airport --------------------------------------------------- http://www.linaro.org http://connect.linaro.org
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LCU14 BURLINGAME
C. Dall, M. Zyngier & E. Auger, LCU14
LCU14-506: KVM Development Status
● Finished “VM System Specification for ARM Processors”http://www.linaro.org/docs/vm-system-specification-arm-processors/
● BE/LE patches for KVM (Victor Kamensky)
● ARMv8-A Debug Patches (Marc Zyngier)
● Fixes 64K Pages
KVM for ARM/ARM64 - Since Last
● Read-Only Memory Regions (Christoffer Dall, in kvmarm/next)● VTTBR_MASK (Joel Schopp)
● VGIC cleanup series (Christoffer Dall)
● Dynamic VGIC sizing series (Marc Zyngier)
● GICv3 emulation series (Andre Przywara)
● ARMv8 PMU Support Series (Anup Patel)
● Forwarding physical interrupts series (Marc Zyngier)
● IRQFD patch series (Eric Auger)
● KVM-VFIO IRQ Forward Control (Eric Auger)
In flight
● Currently only addresses the VTTBR_MASK
● We need a proper flexible solution that allows user space to discover the physical address size capabilities of the host
● Policy decision on concatenated first-level stage-2 page tables
● Dynamic size allocation of first-level stage-2 page tables
● Decoupling kernel and KVM page table manipulation functions?
VTTBR_MASK Fixes
● Cleanup: Need to sort out a few minor things● Likely to go in for v3.18
● Dynamic sizing: v3 is out with comments, awaiting new version
● GICv3: Awaiting more review and depends on above
VGIC Patches
● RFC Out with comments, awaiting new version
● Any issues to discuss at this forum?
ARMv8 PMU Support
● irqchip only drops priority on interrupt during EOI (no deactivate)● irqchip provides methods to save/restore interrupt state
● VGIC Sets the LR.HW bit
● VM deactivates interrupt when EOI virtual interrupt
● Active State is part of the Generic Timers state● (Avoids the need for the hypervisor to set CNTV_CTL.IMASK)
● Other use case is VFIO
● Initial patch series is on the list
IRQ Forwarding
● Allows to register a (eventfd, gsi, VM) triplet to KVM: ● when the eventfd is triggered, KVM injects the gsi (virtual IRQ) into the VM
● Virtual IRQ completion is trapped at VGIC level and VGIC supportstriggering a resamplefd on level-triggered EOI
● No GSI routing enabled anymore
● Do we need to support PPI passthrough?
● Use cases in VFIO and vhost-net
● v3 of patch series for ARM is on the list
IRQFD
● Enables VFIO device IRQ forwarding
● KVM-VFIO device programs IRQCHIP, VGIC and VFIO:● IRQ de-activation performed by guest● disable IRQ masking at VFIO driver● Program GICH_LR with HW bit and IRQ
number (no maintenance IRQ)
● RFC v2 is on the list
KVM-VFIO
Kernel
User Space Process
VFIO irqchip KVM
● Ard Biesheuvel has ported UEFI to QEMU’s ARMv8 “virt” platform● Tested with KVM as well● Being reviewed upstream (at time of writing)
● Some changes required to QEMU, patches on the list
● Remaining work is tracked in CARD-1535
UEFI (Image Spec Compliance)
● Some load/store instructions (writeback or ldm/stm, ldp/stp) provide invalid ESR_EL2.ISS
● KVM must decode the instructions to determine:● Load or Store● Size of access (byte, halfword, word, multiple words)● Registers used● Side effects (write-back)
● Old patches with reviewed-by tags did not make it upstream
● Causes UEFI to fail on aarch64
● Time to revive patches?
Instruction Decoding
● Discussions
● Suggestions
● Questions
Open Floor
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